[paper] Harmonic Distortion of GaN HEMT Varactors

Loukas Chevas 1,  Matthias Bucher 1,  Nikolaos Makris 1,2, Ioannis Spiridon Fosteris 1,  Nikolaos Fasarakis 1,  Antonios Stavrinidis 2,1, Maria Kayambaki 2,  Athanasios Kostopoulos 2 

and George Konstantinidis 2

Methodology for Harmonic Distortion Characterization and Modelling of GaN HEMT Varactors

Instruments 2026, 10(3), 37; 

DOI: 10.3390/instruments10030037

1 School of Electrical and Computer Engineering, Technical University of Crete, 73500 Chania, Greece
2 Institute of Electronic Structure and Laser, Foundation for Research and Technology-Hellas, 70013 Heraklion, Greece

Abstract: The bias-dependent capacitance of varactors can introduce harmonic distortion into the circuits where they are utilized. A gate capacitance model valid through inversion–depletion has been presented for GaN HEMT varactors in the drive for their utilization in monolithic GaN ASICs. This work focuses on the circuit and the methodology employed to accurately measure on wafer the harmonic distortion caused by one such device. The circuit is presented and its design considerations and operation trade-offs are discussed, followed by a presentation of the measurements resulting from its use. Second- and third-order harmonic distortion is recorded and presented, with Verilog-A model simulations used to fit the measured data. The model consists of a charge-based expression of the HEMT varactor capacitance, with a minimal number of parameters. The good fit of the model is demonstrated, proving both the suitability of the circuit used for the measurements and the validity of the capacitance model for real-world applications.  

Fig: Measurement setup schematic for the harmonic distortion characterization of HEMT varactors and V(f) characterization of the HEMT varactor. Inset is the parallel impedance combination measured by the LCR meter. (a) Cgc(Vg) for fixed frequencies. (b) Cgc(f) for fixed Vg levels. (c) Rp(Vg) for fixed frequencies. (d) Rp(f) for fixed Vg levels.

Aknowlegements: This research was partially funded by the European Union under the project AGAMI_EURIGAMI (ID:101102983).

Data Availability Statement: The measurement data generated and analyzed during the present study are available from the corresponding author upon reasonable request.

[paper] Heterojunction Nano-HEMT

G. Purna Chandra Rao1, Trupti Ranjan Lenka2, Valeria Vadalà3

and Hieu Pham Trung Nguyen4

Characteristics Study of Heterojunction III-Nitride/β-Ga2O3 Nano-HEMT for THz Applications

Eng. Res. Express (2024) in press
DOI: 10.1088/2631-8695/ad3db1

1 Electronics and Communication Engineering, NIT Silchar, Assam (IN)

2 Electronics and Communication Engineering, NIT Silchar, Assam (IN)

3 Physics, University of Milan-Bicocca (IT)

4 Electrical and Computer Engineering, Texas Tech University (USA)

Abstract: In this research study, a recessed gate III-Nitride high electron mobility transistor (HEMT) grown on a lattice matched β-Ga2O3 substrate is designed. This research investigation aims to enhance DC and RF performance of AlGaN/GaN HEMT, and minimize the short-channel effects by incorporating an AlGaN back layer and field plate technique, which can enhances electron confinement in two-dimensional electron gas (2DEG). A precise comparison analysis is done on the proposed HEMT’s input characteristics, output characteristics, leakage current characteristics, breakdown voltage properties, and RF behaviour in presence and absence of AlGaN back layer in regard to field plate configuration. The inclusion of back barrier aids in raising the level of conduction band, which reduces leakage loss beneath the buffer, and aids in keeping the 2DEG to be confined to a narrow channel. Furthermore, the field plate design offers an essential electric field drift between gate and drain, resulting to enhanced breakdown voltage characteristics.

FIG : Epitaxial schematic illustration of suggested III-nitride HEMT with the proposed back barrier and field plates.

Acknowledgment : The authors acknowledge SERB (Science and Engineering Research Board), Govt. of India sponsored Mathematical Research Impact Centric Support (MATRICS) project no. MTR/2021/000370 for support.

[paper] GaN HEMTs: Past, development, and future

Haorui Luo^ab, Wenrui Hua^a, Yongxin Guo^ab,

On large-signal modeling of GaN HEMTs: Past, development, and future

Chip, 2023, 100052

DOI: 10.1016/j.chip.2023.100052.

^a Department of Electrical and Computer Engineering, National University of Singapore

^b National University of Singapore (Suzhou) Research Institute, China

Abstract : In the past few decades, circuits based on gallium nitride high electron mobility transistor (GaN HEMT) have demonstrated exceptional potential in a wide range of high-power and high-frequency applications, such as the new generation mobile communications, object detection, consumer electronics, etc. As a critical intermediary between GaN HEMT devices and circuit-level applications, GaN HEMT large-signal models play a pivotal role in the design, application and development of GaN HEMT devices and circuits. This review provides an in-depth examination of the advancements in GaN HEMT large-signal modeling in recent decades. Detailed and comprehensive coverage of various aspects of GaN HEMT large-signal model are offered, including large-signal measurement setups, classical formulation methods, model classification, non-ideal effects, etc. In order to better serve follow-up research, this review also explores potential future directions for the development of GaN HEMT large-signal modeling.

FIG : Timeline of some typical GaN HEMT large-signal models.

Funding : This work was supported in part by the National Research Foundation (NRF) of Singapore under Grant NRF-CRP17-2017-08.

[paper] Review of AlGaN/GaN HEMTs Based Devices

Ahmed M. Nahhas

Review of AlGaN/GaN HEMTs Based Devices

American Journal of Nanomaterials. 2019, 7(1), 10-21

DOI: 10.12691/ajn-7-1-2

  

Department of Electrical Engineering, Umm Al Qura University, Makkah (SA)

Abstract: This paper presents a review of the recent advances of the AlGaN/GaN high-electron-mobility transistors (HEMTs) based devices. The AlGaN/GaN HEMTs have attracted potential for high frequency, voltage, power, temperature, and low noise applications. This is due to the superior electrical, electronic properties, high electron velocity of the GaN. These properties include the GaN wideband gap energy, electrical, optical and structural properties. The based structures of GaN such as AlGaN/GaN are driving the interest in the research areas of GaN HEMTs. Recently, the AlGaN/GaN HEMTs have gained a great potential in radio frequency (RF) and power electronics (PE) based devices and applications. The recent aspects of the AlGaN/GaN HEMTs devices are presented and discussed. The performance of different device demonstrated based on AlGaN/GaN HEMTs are reviewed. The structural, electrical, and optical properties of these devices are also reviewed.

Fig: Schematic of AlGaN/GaN HEMTs

[paper] InP HEMTs for future THz applications

J.Ajayan^a, D.Nirmal^b, Ribu Mathew^c, Dheena Kurian^d, P.Mohankumar^e, L.Arivazhagan^b, D.Ajitha^f

A critical review of design and fabrication challenges in InP HEMTs 

for future terahertz frequency applications

Materials Science in Semiconductor Processing

Volume 128, 15 June 2021, 105753

  
a SR University, Warangal, Telangana, India
b Karunya Institute of Technology and Sciences, Coimbatore, Tamilnadu, India
c VIT Bhopal University, Bhopal, Madhya Pradesh, India
d Kerala Technological University, Trivandrum, Kerala, India
e Sona College of Technology, Salem, Tamilnadu, India
f Sreenidhi Institute of Science and Technology, Hyderabad, Telangana, India

Abstract: This article critically reviews the materials, processing and reliability of InP high electron mobility transistors (InP HEMTs) for future terahertz wave applications. The factors such as drain current (ID) over 1200 mA/mm, transconductance (gm) over 3000 mS/mm, cut off frequency (fT) over 700 GHz and maximum oscillation frequency (fmax) over 1300 GHz makes InP HEMTs suitable for Terahertz wave applications. Furthermore, low DC power consumption and outstanding low noise performance makes InP HEMT most appropriate transistor technology for the development of space based receivers. This review article critically assesses the challenges in miniaturization of InP HEMTs, doping strategies in InP HEMTs, buried platinum technology, impact of annealing process and temperature, influence of electron and proton irradiation, thermal and bias stress on the reliability of InP HEMTs, cavity and gating effects and influence of trapping effects. InP HEMTs are very much preferable in applications like radio astronomy, terahertz optical and wireless communication systems, atmospheric imaging and sensing, automotive radar, ground based receivers in deep space networks, terahertz imaging and sensing, biomedical applications, security screening, video conferencing & real time multimedia file transfer, high speed and ultra low power digital integrated circuits.

Fig: 3D representation of InP high electron mobility transistor (InP HEMT)

[paper] Charge-based Modeling of FETs

Jean-Michel Sallese 

Charge-based modeling of field effect transistors, Make it easy

Joint International EUROSOI and EuroSOI-ULIS Workshop (Sept.2020)

DOI: 10.1109/EuroSOI-ULIS53016.2021.956068

 
EDLab, EPFL,  Lausanne  (CH)
 

Abstract: In this presentation, we revisit some charge voltage dependencies for different architectures of field effect transistor, emphasizing on compactness and simplicity while maintaining a close link with physics, which makes these models predictive and accurate for general purposes of compact modeling.

Fig: The gm/I invariant versus the inversion coefficient IC. 

The operation modes of the MOSFET are clearly defined. 

Acknowledgements: I (JMS) would like to thank F. Jazaeri, C. Lallement, W. Grabinski, B. Iniguez and M. Bucher for their constructive interactions. 

[Photos] MOS-AK LADEC Mexico April 18, 2021

Arbeitskreis Modellierung von Systemen und Parameterextraktion

Modeling of Systems and Parameter Extraction Working Group

MOS-AK LAEDC Workshop

(virtual/online) April 18, 2021

Together with local Host and LAEDC Organizers as well as all the Extended MOS-AK TPC Committee, we have organized the 3rd subsequent MOS-AK/LAEDC workshop which was the Virtual/Online event. There are a couple of the event photos:

MOS-AK Session 1 (APR.18) begun: 8:00am Mexico time zone (GMT-5)

T_1 FOSSEE eSIM: An open source CAD software for circuit simulation

Kannan Moudgalya

IIT Bombay (IN)

T_2 Memristor modeling

Arturo Sarmiento

INAOE (MX)

T_3 Modeling Issues for CMOS RF ICs

Roberto Murphy, Jose Valdes and Reydezel Torres

INAOE (MX)

T_4 Improving Time-Dependent Gate Breakdown of GaN HEMTs with p-type Gate

E. Sangiorgi, A. Tallarico, N. Posthuma, S. Decoutere, C. Fiegna

Universita di Bologna

MOS-AK Session 2 (APR.18) begun: 1:00pm Mexico time zone (GMT-5)

T_5 Compact Models of SiC and GaN Power Devices

Alan Mantooth, Arman Ur Rashid, Md Maksudul Hossain

University of Arkansas (US)

T_6 New analytical model for AOSTFTs

Antonio Cerdeira

CINVESTAV-IPN, Mexico City (MX)

T_7 On the Parameter Extraction of Thin-Film Transistors in Weak-Conduction

Adelmo Ortiz-Conde

Solid State Electronics Laboratory, Simon Bolivar University, Caracas (VE)

End of MOS-AK Workshop
Group Photo

[papers] Compact/SPICE Modeling

[1] Wang, Jie; Chen, Zhanfei; You, Shuzhen; Bakeroot, Benoit; Liu, Jun; Decoutere, Stefaan; "Surface-Potential-Based Compact Modeling of p-GaN Gate HEMTs" Micromachines (2021) 12, no. 2: 199; https://doi.org/10.3390/mi12020199

Abstract: We propose a surface potential (SP)-based compact model of p-GaN gate high electron mobility transistors (HEMTs) which solves the Poisson equation. The model includes all possible charges in the GaN channel layer, including the unintended Mg doping density caused by out-diffusion. The SP equation and its analytical approximate solution provide a high degree of accuracy for the SP calculation, from which the closed-form I–V equations are derived. The proposed model uses physical parameters only and is implemented in Verilog-A code.

Fig: The equivalent circuit of the capacitance of field plates (FPs) of a p-GaN gate HEMT.

[2] Chen, H. and He, L.,  The spatial and energy distribution of oxide trap responsible for 1/f noise in 4H-SiC MOSFETs. Journal of Physics Communications, JPCO-101816.R1 (2021)

Abstract: Low-frequency noise is one of the important characteristics of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) that is susceptible to oxide traps. Drain-source voltage noise models of 4H-SiC MOSFETs under low–drain-voltage and inverse condition were proposed by considering the spatial and energy non-uniform distribution of the oxide trap, based on the McWhoter model for uniform trap distribution. This study performed noise experiments on commercial 4H-SiC MOSFETs, and revealed that the non-uniform spatial and non-uniform energy distribution caused new 1/f noise phenomenon, different from that under uniform spatial and energy distribution. By combining experimental data and theoretical models, the spatial and energy distribution of oxide traps of these samples were determined.

Fig: Adaptive circuit for 4H-SiC MOSFET noise measurement

in the frequency 1 Hz-10kHz ranged

[paper] Fabrication EM AlGaN/GaN MIS HEMT

Flavien Cozette¹, Bilal Hassan¹, Christophe Rodriguez¹, Eric Frayssinet², Rémi Comyn², François Lecourt³, Nicolas Defrance⁴, Nathalie Labat⁵, François Boone¹, Ali Soltani¹, Abdelatif Jaouad¹, Yvon Cordier² and Hassan Maher¹

New barrier layer design for the fabrication of gallium nitride-metal-insulator-semiconductor-high electron mobility transistor normally-off transistor

2021 Semicond. Sci. Technol. 36 034002

DOI: 10.1088/1361-6641/abd489

¹LN2, CNRS-UMI-3463, 3IT, Université de Sherbrooke, Canada

²Université Côte d'Azur, CNRS, CRHEA, Valbonne, France

³OMMIC, 94450 Limeil-Brévannes, France

⁴IEMN, CNRS-UMR-8520, University of Lille, France

⁵IMS, CNRS-UMR-5218, University of Bordeaux, France

Abstract: This paper reports on the fabrication of an enhancement-mode AlGaN/GaN metal-insulator-semiconductor-high electron mobility transistor with a new barrier epi-layer design based on double Al0.2Ga0.8N barrier layers separated by a thin GaN layer. Normally-off transistors are achieved with good performances by using digital etching (DE) process for the gate recess. The gate insulator is deposited using two technics: plasma enhance chemical vapour deposition (sample A) and atomic layer deposition (sample B). Indeed, the two devices present a threshold voltage (Vth) of +0.4 V and +0.9 V respectively with ΔVth about 0.1 V and 0.05 V extracted from the hysteresis gate capacitance measurement, a gate leakage current below 2 × 10−10 A mm−1, an ION/IOFF about 108 and a breakdown voltage of VBR = 150 V and 200 V respectively with 1.5 µm thick buffer layer. All these results are indicating a good barrier surface quality after the gate recess. The DE mechanism is based on chemical dissolution of oxides formed during the first step of DE. Consequently, the process is relatively soft with very low induced physical damages at the barrier layer surface.

Fig: SEM image of an E-mode device.

Acknowledgments: This work was supported by Fonds de Recherches du Québec—Nature, Technologies (FRQNT), the Natural Sciences and Engineering Research Council of Canada (NSERC), French technology facility network RENATECH and the French National Research Agency (ANR) through the projects ED-GaN (ANR-16-CE24-0026-02) and the 'Investissements d'Avenir' program GaNeX (ANR-11-LABX-0014).

[PhD Thesis] III-V MOS-HEMTs for 100-340GHz Communications Systems

UNIVERSITY OF CALIFORNIA

Santa Barbara

III-V In_xGa_1-xAs / InP MOS-HEMTs for 100-340GHz Communications Systems

A dissertation for PhD degree in Electrical and Computer Engineering

by Brian David Markman

Abstract: This work summarizes the efforts made to extend the current gain cutoff frequency of InP based FET technologies beyond 1THz. Incorporation of a metal-oxide-semiconductor field effect transistor (MOSFET) at the intrinsic Gate Insulator-Channel interface of a standard high electron mobility transistor (HEMT) has enabled increased g_m,i by increasing the gate insulator capacitance density for a given gate current leakage density. Reduction of RS,TLM from 110 Ω.μm to 75Ω.μm and Ron(0) from 160Ω.μm to 120Ω.μm was achieved by removing/thinning the wide bandgap modulation doped link regions beneath the highly doped contact layers. Process repeatability was improved by developing a gate metal first process and D_it was improved by inclusion of a post-metal H₂ anneal. In_xGa_1-xAs / InAs composite quantum wells clad with both InP and In_xAl_1-xAs were developed for high charge density and low sheet resistance to minimize source resistance. 

Figure a) InP-based HEMT b) III-V DC optimized MOSFET c) proposed InP-based MOS-HEMT

---

[Citation] Markman, B. D. (2020). III-V In_xGa_1-xAs / InP MOS-HEMTs for 100-340GHz Communications Systems. UC Santa Barbara. ProQuest ID: Markman_ucsb_0035D_14853. Merritt ID: ark:/13030/m5v4681j. Retrieved from https://escholarship.org/uc/item/6st812pb

[paper] Scaled GaN-HEMT Large-Signal Model Based on EM Simulation

Scaled GaN-HEMT Large-Signal Model Based on EM Simulation

Wooseok Lee¹, Hyunuk Kang¹, Seokgyu Choi², Sangmin Lee², Hosang Kwon³, Keum cheol Hwang¹, Kang-Yoon Lee¹ and Youngoo Yang¹

Electronics 2020, 9(4), 632

DOI: 10.3390/electronics9040632

¹Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea
²Wavice Inc., Hwaseong-si 18449, Korea
³Agency for Defense Development, Daejeon 34186, Korea

Abstract This paper presents a scaled GaN-HEMT large-signal model based on EM simulation. A large-signal model of the 10-finger GaN-HEMT consists of a large-signal model of the two-finger GaN-HEMT and an equivalent circuit of the interconnection circuit. The equivalent circuit of the interconnection circuit was extracted according to the EM simulation results. The large-signal model for the two-finger device is based on the conventional Angelov channel current model. The large-signal model for the 10-finger device was verified through load-pull measurement. The 10-finger GaN-HEMT produced an output power of about 20 W for both simulation and load-pull measurements. 

Fig: Two-finger GaN-HEMT: a) layout; b) equivalent SPICE subcircuit

Acknowledgement: The research reported in this work has been supported by ADD (Agency of Defense Development) of Korea under an R&D program (UC170025FD).

[webinar] GaN HEMT Devices Characterization Using ASM-HEMT Model

ASM-HEMTモデルを使ったGaN HEMTデバイスの特性評価とモデリング

お知らせ: キーサイト・テクノロジーのウェブセミナー「ASM-HEMTモデルを使ったGaN HEMTデバイスの特性評価とモデリング 」

ライブウェブセミナーの日付: 2020年10月14日

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