Wednesday, July 18, 2018

[mos-ak] [Final Program] MOS-AK Workshop at ESSDERC/ESSCIRC in Dresden, Sept. 3, 2018

MOS-AK Workshop at ESSDERC/ESSCIRC
Dresden, Sept. 3, 2018

Subsequent MOS-AK modeling workshop organized at ESSDERC/ESSCIRC in Dresden on Sept. 3, 2018, aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and TCAD/EDA tool developers and vendors. The MOS-AK workshop program is available online:

Venue:
Technische Universit├Ąt Dresden
room CHE/0184/U
Dresden (D)

Agenda:
  • MOS-AK Workshop: Sept. 3, 2018
  • ESSDERC Track4 "Compact modeling of devices and circuit" Sept. 5-6, 2018
    • Wednesday 14:20-15:40 B4L-G Compact Modeling (3 papers)
      Chair: Wladek Grabinski, Thierry Poiroux
    • Thursday 10:20-12:0 C2L-F Compact Modeling of Electron Devices (4 papers)
      Chair: Daniel Tomaszewski, Benjamin Iniguez
(any related inquiries can be sent to registration@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication
in a special issue of the International Journal of High Speed Electronics and Systems


WG180718

 

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Wednesday, July 11, 2018

SINANO Modelling Summer School in Tarragona (Spain): Registration Open!

The 8th SINANO Modelling Summer School will take place in Tarragona (Catalonia, Spain) from September 25 to 28 2018, co-organized by the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV), in Tarragona. It is also partially sponsored by the SINANO Institute and the DOMINO EU H2020 project.

The official website of the SINAMO Modelling Summer School is:

 

REGISTRATION IS ALREADY OPEN.

The SINANO summer school was established in 2005, in the from of the SINANO Network of Excellence (funded by the 6th Framework Programme of the EU). The previous editions were held in Glasgow (2005) and in Bertinoro, Italy  (2016, 2014, 2012, 2010, 2008, 2006).

The Sinano Modelling Summer School is a bi-annual comprehensive set of classes aimed at doctoral or postdoctoral level researchers from both industry and academia. Via a programme consisting of lectures, tutorials, advanced discussion groups, students will expand and refine their knowledge of the design, optimization, simulation and characterization of cutting edge semiconductor devices, with the world’s leading device simulation and electrical characterization experts.

This year the SINANO Modelling Summer School will target multi-scale modelling of semiconductor devices. It includes a total of 23 lectures targeting topics related to the modelling, simulation and characterization of diferent types of semiconductor devices for nanoelectronics, flexible electronics and photonics. Very hot topics, such as devices for quantum computing, neuromorphic computing, THz electronics and printed electronics will also be addressed. The lecturers are internationally well recognized experts in these fields. Our SINANO Summer School is a unique opportunity for young researchers to become familiar with all scales of device modelling and for many types of device structures, as well as to interact with those top researchers.


 
Invited speakers' short biographies are given in:



Apart from the technical programme, we include a social program consisting of a Welcome Reception and a Gala Dinner in a nice place in front of the Mediterranean Sea. And I hope you can find some time to walk down Tarragona streets and see its main landmarks, many of them dating back to the Roman Empire. Besides, September 23 is Tarragona Patron Saint Day (“Santa Tecla”), and around that date there will be many nice celebrations and musical performances in the city.

Therefore, I encourage researchers in semiconductor device technology, modeling and circuit design to attend this 8th SINANO Modelling Summer School,a.

Monday, July 9, 2018

Thursday, July 5, 2018

Evaluation of #10nm Bulk #FinFET #RF Performance -Conventional vs. NC-FinFET - IEEE Journals & Magazine #paper https://t.co/dH5G1DQJCm https://t.co/dH5G1DQJCm


from Twitter https://twitter.com/wladek60

July 05, 2018 at 06:46PM
via IFTTT

Evaluation of #10nm Bulk #FinFET #RF Performance -Conventional vs. NC-FinFET - IEEE Journals & Magazine #paper https://t.co/dH5G1DQJCm


from Twitter https://twitter.com/wladek60

July 05, 2018 at 06:46PM
via IFTTT

Heterogeneously Integrated Impedance Based Biosensors (technology scaling on low-noise transimpedance amplifiers was studied using the Enz-Krummenacher-Vittoz (#EKV) model) https://t.co/p91Kn839bj #paper https://t.co/VWfQDyeDJy https://t.co/O8mutPeYJc


from Twitter https://twitter.com/wladek60

July 05, 2018 at 06:40PM
via IFTTT

Heterogeneously Integrated Impedance Based Biosensors (technology scaling on low-noise transimpedance amplifiers was studied using the Enz-Krummenacher-Vittoz (#EKV) model) https://t.co/p91Kn839bj #paper https://t.co/VWfQDyeDJy


from Twitter https://twitter.com/wladek60

July 05, 2018 at 06:40PM
via IFTTT

High accuracy large-signal #SPICE model for silicon carbide (#SiC) #MOSFET https://t.co/93yZ8JEbv8 #paper


from Twitter https://twitter.com/wladek60

July 05, 2018 at 04:27PM
via IFTTT

Distributed Unique-Size MOS Technique: A Promising Universal Approach Capable of Resolving Circuit Design Bottlenecks of Modern Era https://t.co/vmVDYfMPcH #paper https://t.co/Lu5f4UXm47 https://t.co/G3A9t83dDd


from Twitter https://twitter.com/wladek60

July 05, 2018 at 04:26PM
via IFTTT

Distributed Unique-Size MOS Technique: A Promising Universal Approach Capable of Resolving Circuit Design Bottlenecks of Modern Era https://t.co/vmVDYfMPcH #paper https://t.co/Lu5f4UXm47


from Twitter https://twitter.com/wladek60

July 05, 2018 at 04:26PM
via IFTTT

Toward a sustainable materials system https://t.co/Z5j8ezhTSm #paper https://t.co/MjjavPoXEv


from Twitter https://twitter.com/wladek60

July 05, 2018 at 10:46AM
via IFTTT

A bright future for microelectronics at CERN | EP Department newsletter https://t.co/QoB8YqI8KZ #paper https://t.co/ID31W3qp3Z


from Twitter https://twitter.com/wladek60

July 05, 2018 at 10:30AM
via IFTTT