tag:blogger.com,1999:blog-25965859328793324772024-03-18T15:39:01.047+01:00Sedemos NewsBlog dedicated to the world of compact/SPICE modeling and its Verilog-A standardization. We are discussing the most recent developments and also a bit of history. Obviously, all comments are welcome.Rodrigo Picoshttp://www.blogger.com/profile/01528564261559455522noreply@blogger.comBlogger2888125tag:blogger.com,1999:blog-2596585932879332477.post-74772859103222044812024-03-18T15:38:00.000+01:002024-03-18T15:38:29.112+01:00[paper] in-memory computing using FeFETTaha Soliman, Swetaki Chatterjee, Nellie Laleni, Franz Müller, Tobias Kirchner, Norbert Wehn, Thomas Kämpfe, Yogesh Singh Chauhan and Hussam AmrouchFirst demonstration of in-memory computing crossbar using multi-level Cell FeFETNat Commun 14, 6348 (2023)DOI: 10.1038/s41467-023-42110-y1 Robert Bosch GmbH, Renningen, Germany2 Semiconducture Test and Reliability, University of Stuttgart, Stuttgart, W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-74450582783629642082024-03-18T15:08:00.001+01:002024-03-18T15:08:52.519+01:00[paper] Symmetric BSIM-SOIChetan Kumar Dabhi, Dinesh Rajasekharan, Girish Pahwa, Debashish Nandi, Naveen Karumuri, Sreenidhi Turuvekere, Anupam Dutta, Balaji Swaminathan, Srikanth Srihari, Yogesh S. Chauhan, Sayeef Salahuddin, and Chenming HuSymmetric BSIM-SOI: A Compact Model for Dynamically Depleted SOI MOSFETs in IEEE TED (2024)Part I DOI: 10.1109/TED.2024.3363110Part II DOI: 10.1109/TED.2024.33631171 W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-71137214381885585642024-03-17T16:43:00.002+01:002024-03-17T16:43:43.217+01:00SSCS April Technical WebinarSSCS April Technical WebinarGetting Started with Open Source Silicon, Presented By: Matthew VennAbstract: In this presentation, Matt Venn will share his experience of getting started with chip design using the free and open source tools. Going from zero to 20 chips in 3 years, there are plenty of successes and failures to share. Matt will then move on to sharing the best resources, inspirational W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-58691672601737002742024-03-15T15:38:00.003+01:002024-03-15T15:40:43.437+01:00[paper] Topological Transistor Compact ModelMd. Mazharul Islam1, Shamiul Alam1, Md. Shafayat Hossain2, Ahmedullah Aziz1Compact Model of a Topological Transistor IEEE Access; Feb.7, 2024DOI: 10.1109/ACCESS.2024.33636451 Department of Electrical Engineering and Computer Science, The University of Tennessee, USA2 Department of Physics, Princeton University, USAAbstract: The precession of a ferromagnet leads to the injection of spin W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-51574531260837107322024-03-15T08:53:00.001+01:002024-03-15T08:53:14.786+01:00[paper] Next Wave for AI/ML in Physical DesignAndrew B. KahngSolvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical DesignISPD ’24 ProceedingsMarch 12–15, 2024, Taipei, Taiwan.DOI 10.1145/3626184.3635277Abstract: It has been six years since an ISPD-2018 invited talk on “Machine Learning Applications in Physical Design”. Since then, despite considerable activity across both academia and industry, many R&D targets remain W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-28218558551796813732024-03-11T10:47:00.000+01:002024-03-11T10:47:22.428+01:00Importance of Open-Source EDA Tools for AcademiaImportance of Open-Source EDA Tools for AcademiaOpen Letter on European Strategic and Funding Directionshttps://open-source-eda-letter.eu/Initial Signatories of the Open-Source-EDA-Letter, as of March 8, 2024, are:Luca BeniniUniversity of Bologna, Italy & ETH Zürich, SwitzerlandProfessor, Lead of the RISC-V PULP platformGiovanni De MicheliEPFL Lausanne, SwitzerlandProfessor and Director,W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-40918157661790686552024-03-11T08:46:00.001+01:002024-03-11T08:46:26.911+01:00AACD 2024 Final ProgramWe are proud to announce the final programof the 32nd Advances in Analog Circuit Design Workshop (AACD24),which will be held at University of Pavia, Italy on April, 9th-11th, 2024Registration to AACD24 is open at:https://www.mbtechnoservices.com/aacd24/index.php?page=Registration.html Registration to AACD24 is open at: https://www.mbtechnoservices.com/aacd24/index.php?page=Registration.html W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-88682704958171827982024-03-05T20:10:00.002+01:002024-03-10T15:06:34.436+01:00[Open PDK] IEEE EDS DL at IISc Banglare
IEEE EDS/SSCS Bangalore Chapter Presents DL Series
FOSS TCAD/EDA Tools SPICE and Verilog-A
Modeling Flow Technology - Devices - Applications
W.Grabinski, MOS-AK (EU)
DATE AND TIME
LOCATION
HOSTS
Date: 07 Mar 2024
Time: 04:00 PM to 05:00 PM
All times are (UTC+05:30) Chennai
Add Event to
Calendar iCal
Google W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-47720915109079362742024-03-04T19:07:00.002+01:002024-03-12T11:05:18.348+01:00[EDTM] Open PDK Initiative8th IEEE EDTMMarch 3-6, 2024Strengthening Globalization in SemiconductorsThe EDTM Conference to host two contributions discussing the status of Open PDK Initiative:[6C-1] [Invited] Disrupting Conventional Chip Design through the Open Source EDA EcosystemMehdi Saligane; University of Michigan, USA[P2-36] FOSS CAD for the Compact Verilog-A Model Standardization in Open PDKsWladek Grabinski, et al. W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-55176743326611015032024-03-04T18:46:00.002+01:002024-03-04T18:54:09.103+01:00[EDTM] Inauguration Session8th IEEE EDTMMarch 3-6, 2024Strengthening Globalization in SemiconductorsThe 8th Electron Devices Technology and Manufacturing Conference (IEEE EDTM 2024) will be held for the first time in India at Bangalore; the Silicon Valley of India and the hub of semiconductor companies. IEEE EDTM 2024 will be a full four-day conference to be held during March 3-6, 2024. IEEE EDTM 2024 aims to be a premier W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-81069269036788736762024-02-28T16:59:00.000+01:002024-02-28T16:59:01.450+01:00[paper] La:HfO2 gate stacked ferroelectric tunnel FET
Neha Parasa, Shiromani Balmukund Rahib, Abhishek Kumar Upadhyayc,
Manisha Bhartid, Young Suh Songe
Design and analysis of novel La:HfO2 gate stacked ferroelectric tunnel FET
for non-volatile memory applications
Memories - Materials, Devices, Circuits and Systems
Volume 7, April 2024, 100101
DOI: 10.1016/j.memori.2024.100101
a Jawaharlal Nehru University, New Delhi, India
b Indian W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-32033946515070300372024-02-28T16:17:00.000+01:002024-02-28T16:17:46.889+01:00[FOSSDEM 2024] Open PDK InitiativeFOSDEM 2024 was a two-day event organized by volunteers to promote the widespread use of free and open source software. Took place at the ULB Solbosch campus in the beautiful city of Brussels (Belgium), FOSDEM is widely recognized as the best FOSS conference in Europe.There were two DevRooms to discuss the status and further FOSS CAD/EDA IC design tools developments and open PDK initiative:W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-22934824447472930102024-02-28T10:38:00.007+01:002024-02-28T10:38:45.594+01:00[paper] Fast-SPICE Circuit SimulationA New Second Order Nonlinear Formulation for Fast-SPICE Circuit SimulationA. Elhamshary1, Y. Ismail2, Y. A. Aziz3 and H. Ragae1IEEE Access, DOI: 10.1109/ACCESS.2024.33679921 Electronics and Communication Engineering, Faculty of Engineering, Ain Shams University2 Center Nanoelectronics and Device, American University, Cairo, Egypt3 Department of Physics, School of Sciences and Engineering, W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-18995609726212166282024-02-14T16:45:00.002+01:002024-02-14T16:45:57.977+01:00Summer School on Organic Electronics and Neuromorphic SystemsSummer School on Organic Electronics and Neuromorphic SystemsJune 17-20, 2024will consist of a comprehensive set of classes aimed at doctoral or postdoctoral level researchers from both industry and academia. By means of a programme consisting of lectures, tutorials, advanced discussion groups, students will expand and refine their knowledge of organic materials, devices and circuits for W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-74527512315510343872024-01-31T15:14:00.000+01:002024-01-31T15:14:10.366+01:00[paper] THz Measurements, Antennas, and SimulationsFawad Sheikh 1, Andreas Prokscha 1, Johannes M. Eckhardt 2, Tobias Doeker 2, Naveed A. Abbasi 3, Jorge Gomez-Ponce 3,4, Benedikt Sievert 5, Jan Taro Svejda 5, Andreas Rennings 5, Jan Barowski 6, Christian Schulz 6, Ilona Rolfes 6, Daniel Erni 5, Andreas F. Molisch 3, Thomas Kürner 2, and Thomas Kaiser 1THz Measurements, Antennas, and Simulations: From the Past to the FutureInvited Paper in IEEE W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-1337519933651483632024-01-29T20:10:00.001+01:002024-01-29T20:10:59.380+01:00List of the publications using or referring to DEVSIMList of the publications using or referring to DEVSIM[1] K. Wang et al.; Design and simulation of a novel 4H-SiC LGAD timing device; Radiation detection technology and methods; (2023) https://doi.org/10.1007/s41605-023-00431-y[2] J. Lauwaert; Technology computer aided design based deep level transient spectra: Simulation of high-purity germanium crystals; Journal of Physics D: Applied W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-71443786093779063852024-01-29T17:29:00.002+01:002024-01-29T17:29:33.189+01:00Postdoc in Semiconductor Devices, and circuit designPostdoc in Semiconductor Devices, and circuit designSønderborg, DenmarkWe [sdu.dk] are seeking an enthusiastic new colleague as a PostDoc in the field of Semiconductor Devices, and circuit design. As a postdoc in our team, you will have the opportunity to contribute to cutting-edge research and innovation in this rapidly evolving field with a strong collaboration with international industry W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-41937813467468577762024-01-29T14:28:00.000+01:002024-01-29T14:28:53.697+01:00Open PhD Position at THMOpen PhD PositionCompact Modeling of Reconfigurable Transistors(full-time) Payment depending on qualification up to salary group 13 TV-H(approx. 60k€ … 65k€ per year)
The position in Prof. Dr. Alexander Kloes' Research Group Nanoelectronics/Device Modeling at Technische Hochschule Mittelhessen (THM), University of Applied Sciences, Campus Giessen, is expected to be filled from May 2024 for a W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-64980176061692440022024-01-28T19:45:00.000+01:002024-01-28T19:45:28.731+01:00[paper] Modeling a 2D Electrostatic Potential in MOS DevicesFrancois Lim, Benjamin Iñiguez, Alexander KloesA new analytical method for modeling a 2D electrostatic potential in MOS devices, applicable to compact modelingJ. Appl. Phys. 28 January 2024; 135 (4): 044501DOI: 10.1063/5.0188863Abstract: This paper presents a new conformal mapping method to solve 2D Laplace and Poisson equations in MOS devices. More specifically, it consists of an W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-38580635807295071362024-01-28T17:49:00.000+01:002024-01-28T17:49:15.883+01:00[C4P] NEWCAS 2024The 22nd IEEE International NEWCAS ConferenceSherbrooke, Quebec, CanadaJune 16-19, 2024.The NEWCAS Conference will reflect the wide spectrum of topics, research and practice in the field of circuits and systems and offer an international forum for exchanging ideas and results. There will also be tutorials, special sessions and keynote talks by prominent experts on current topics in microsystems W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-83118930223623100662024-01-24T10:13:00.000+01:002024-01-24T10:13:23.575+01:00[C4P] RISC-V Summit Europe
https://riscv-europe.org/summit/2024/
The RISC-V Summit Europe is the premier event that connects the European movers and shakers - from industry, government, research, academia and ecosystem support - that are building the future of innovation on RISC-V.
RISC-V, the open standard
instruction set architecture (ISA), is enabling a range of new applications and research that will W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-38987289481009046322024-01-23T21:33:00.001+01:002024-01-23T21:34:53.005+01:00[C4P] OSDA 20244th Workshop on Open-Source Design Automation OSDA 2024March 25, 2024, 14:00-18:00and will be co-hosted with DATE Conferencein VCC in Valencia, SpainThere is no doubt that proprietary EDA tools are successful, mature, and fundamental for hardware development. However, the “walled garden” approach created by closed-source tool flows can hamper novel FPGA/ASIC-based applications and EDA W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com1tag:blogger.com,1999:blog-2596585932879332477.post-32776997771697997932024-01-18T13:46:00.000+01:002024-01-18T13:46:23.000+01:00[paper] Open-source design of integrated circuitsPatrick Fath, Manuel Moser, Georg Zachl. Harald PretOpen-source design of integrated circuitsElektrotech. Inftech. (2024)DOI: 10.1007/s00502-023-01195-5* Institute for Integrated Circuits, Johannes Kepler University Linz, AustriaAbstract: This paper presents the design of a self-clocked 12-bit non-binary fully differential SAR-ADC using the SKY130 open-source PDK. The entire mixed-signal circuit W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-64210597034509987042024-01-17T21:16:00.000+01:002024-01-17T21:16:34.681+01:00[paper] RF NMOS Transistor in a 0.25 µm SiGe-C BiCMOS ProcessEngin Cagdas, Huseyin Aniktar, M. Emin Tunbak, Volkan Fenercioglu, S. Ebru Arikan, A. Ulvi CaliskanModeling and Validation of an Isolated NMOS Transistorin a 0.25 µm SiGe-C BiCMOS Process30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye, 2023, pp. 1-4DOI: 10.1109/ICECS58634.2023.10382848*Semiconductor Technologies Research Laboratory, W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0tag:blogger.com,1999:blog-2596585932879332477.post-28171894960555430802024-01-15T16:22:00.002+01:002024-01-15T16:22:28.831+01:00DEVSIM as TCAD mobile app DEVSIM: TCAD mobile appNow through January 18, 2024, the TCAD app is free for download. After this, you will be entitled to any free future updates [read more...]App is renamed to “TCAD app”Impact ionization model addedMenus updatedEasier plot navigationSeries resistance available to aid in impact ionization model resultsStop simulation and keep partial results to stop long-running simulation W.G.http://www.blogger.com/profile/01651915264570373782noreply@blogger.com0