Tuesday, 19 September 2017

A Large-Signal Monolayer Graphene Field-Effect Transistor Compact #Model for RF-Circuit Applications https://t.co/zoPkw74IK2

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September 19, 2017 at 03:55PM

Conduction Mechanisms in Metal-Base Vertical Organic Transistors by DC and LF-Noise Measurements https://t.co/ZSiOLFMquC #paper

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September 19, 2017 at 03:07PM

#Modeling of #Electromechanical Sensors & Systems https://t.co/K40OGzRV4U https://t.co/rdih9lNeei https://t.co/748KTEgqk7

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September 19, 2017 at 12:08PM

#Modeling of #Electromechanical Sensors & Systems https://t.co/K40OGzRV4U https://t.co/rdih9lNeei

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September 19, 2017 at 12:08PM

Monday, 18 September 2017

[paper] Design techniques for low-voltage analog integrated circuits

Matej Rakus, Viera Stopjakova, Daniel Arbet
Institute of Electronics and Photonics, Faculty of Electrical Engineering
and Information Technology Slovak University of Technology in Bratislava, Slovakia,
Journal of ELECTRICAL ENGINEERING, Vol.68 (2017), No.4, 245–255
DOI: 10.1515/jee-2017–0036

ABSTRACT: In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.
Fig: Parameter gm/ID versus the normalized drain current. MOS transistor operates in weak inversion (WI) for ic < 0.1. Strong inversion (SI) is for ic < 10. Everything in between belongs to the moderate inversion (MI) with center in ic = 1 

Friday, 15 September 2017

[paper] Principles and Trends in Quantum Nano-Electronics and Nano-Magnetics for Beyond-CMOS Computing

Ian A. Young and Dmitri E. Nikonov 
Components Research, Technology & Manufacturing Group
Intel Corp., Hillsboro, Oregon, USA
ESSDERC/ESSCIRC Leuven Sept.12-14, 2017

Abstract: An analysis of research in quantum nanoelectronics and nanomagnetics for beyond CMOS devices is presented. Some device proposals and demonstrations are reviewed. Based on that, trends in this field are identified. Principles for development of competitive computing technologies are formulated. Results of beyond-CMOS circuit benchmarking are reviewed.

TABLE I: Voltage Limitations For Computation Variables

Principle 1: Beyond-CMOS circuits require CMOS as an integral part. They will work alongside and augment CMOS computing blocks.

Principle 2: Some devices utilize collective states; this confers advantages of non-volatility or more energy efficient operation.

Principle 3: The choice for an optimal beyond-CMOS device will be determined by compatibility with an efficient and effective interconnect.

Principle 4: Low voltage devices – most direct way to low energy operation.

Principle 5: Start benchmarking with bottom up modeling of devices, build up from simple to more complicated circuits.

Principle 6: Majority gates (if easily implemented in a certain technology) enable more efficient circuits, especially for more complex computation functions.

Principle 7: Use electrical interconnects for longer propagation spans.

Principle 8: To convince the wider community, a non- volatile computing paradigm needs to be general enough to prove that it is valid for more than one architecture; while it needs to be specific enough to dispel claims that an essential aspect is missed.

Principle 9: Neuromorphic computing can be done more efficiently with beyond-CMOS circuits.

Conclusions: In summary, we have presented our view on the recent trends in quantum nanoelectronics and nanomagnetics for beyond CMOS devices, and outlined a few principles to make them realize practical computing technologies. We can pose a question for ourselves: What are the most promising directions of research? Where to double down on the effort? Among many equally important thrusts, our subjective preference is for magnetoelectric switching and neuromorphic beyond-CMOS circuits.

Tuesday, 12 September 2017

[book] Systematic Design of Analog CMOS Circuits

Paul G. A. Jespers, Boris Murmann
Cambridge University Press; 31 Oct 2017; 342pp

Discover a fresh approach to efficient and insight-driven analog integrated circuit design in nanoscale-CMOS with this hands-on guide. Expert authors present a sizing methodology that employs SPICE-generated lookup tables, enabling close agreement between hand analysis and simulation. This enables the exploration of analog circuit tradeoffs using the gm/ID ratio as a central variable in script-based design flows, and eliminates time-consuming iterations in a circuit simulator. Supported by downloadable MATLAB code, and including over forty detailed worked examples, this book will provide professional analog circuit designers, researchers, and graduate students with the theoretical know-how and practical tools needed to acquire a systematic and re-use oriented design style for analog integrated circuits in modern CMOS.

Monday, 11 September 2017

Current state of the art in #modeling heating effects in nanoscale devices - Books - IOPscience https://t.co/E0UlkDDJVk

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September 11, 2017 at 06:43PM