Planned 12th International MOS-AK Workshop aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring academic and industrial experts in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors.
2811 Mission College Blvd., 6th Floor
Santa Clara, California 95054
- Compact Modeling (CM) of the electron devices
- Advances in semiconductor technologies and processing
- Verilog-A language for CM standardization
- New CM techniques and extraction software
- Open Source (FOSS) TCAD/EDA modeling and simulation
- CM of passive, active, sensors and actuators
- Emerging Devices, TFT, CMOS and SOI-based memory cells
- Microwave, RF device modeling, high voltage device modeling
- Nanoscale CMOS, BiCMOS, SiGe, GaN, InP devices and circuits
- Technology R&D, DFY, DFT and reliability/ageing IC designs
- Foundry/Fabless Interface Strategies
- Call for Papers - Sept. 2019
- 2nd Announcement - Oct. 2019
- Final Workshop Program - Nov. 2019
- MOS-AK Workshop: Dec. 11, 2019
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