Sunday, January 31, 2016

Jonathan Riddell: #FOSDEM Photos #opensource #feedly

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January 31, 2016 at 08:07PM

Distro or Desktop? You Say Both #opensource #feedly #fosdem

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January 31, 2016 at 07:57PM

Costales: My #Ubuntu Phone is my 'mini' PC for #traveling #opensource #feedly

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January 31, 2016 at 01:57PM

Friday, January 29, 2016

postdoctoral positions in Compact Modeling in Tarragona (Spain)

As Professor in the Universitat Rovira i Virgili (Tarragona, Catalonia, Spain), I am going to apply for two  postdoctoral positions (funded by the Spanish Ministry and the Catalan Government) related to our research projects about Compact Modeling of semiconductor devices: in particular, the European Union -funded "DOMINO" project (of which I am the coordinator, and which targets modeling of organic and oxide TFTs), and our national projects addressing the modeling of GaN HEMTs and nanowire MOSFETs.

The candidate for one of the position should be a person who holds a PhD as awarded between January 1 2014 and December 31 2015. The candidate for the other 
position should be a person who holds a PhD as awarded between January 1 2011 and December 31 2013. The duration of both fellowships will be 24 months.

The candidate should have enough research experience in the field of semiconductor devices, and must have a very good knowledge of the physics of electron devices. The research project to be carried out can be adapted to the candidate's profile. In any case, it will be related to the research projects in which we participate. Our contribution in these projects is the physics and modeling (in particular compact modeling) of the novel devices addressed by our projects: organic and oxide Thin Film Transistors (TFTs), GaN HEMTs, nanowire FETs, multi-gate MOSFETs (FinFETs, DG MOSFETs,...), ...

The postdoc positions, which will be a contract, will have a duration of 2-3 years. The net salary will be around 1900 Euro/months.

The postdoctoral researcher will work in the compact device team, led by Prof Benjamin Iñiguez, belonging to the Nanoelectronics and Photonics Systems Group (NEPHOS) in the Department of Electronic, Electrical and Automatic Control Engineering of the Universitat Rovira i Virgili (URV). This team is a worldwide well recognized pioneering group in the development of compact models for advanced and emerging semiconductor devices. The team has participated in a number of European Union funded projects aout this topic and has led some of them.

Interested applicants should send me their CV by e-mail.


Benjamin Iñiguez
Nanoelectronics and Photonics Systrems Group (NEPHOS)
Department of Electronic Engineering
Universitat Rovira i Virgili (URV)
Avinguda dels Paisos Catalans 26
43007 Tarragona

About Tarragona:
Tarragona is located on the Mediterranean, in the heart of the Costa Daurada, in the south of Catalonia, about 100 Km south from Barcelona. Tarragona is well connected to Barcelona by highway, and frequent trains and buses. It has also a direct bus connection with Barcelona Airport. Besides, it has high-speed rail connection with Madrid and Barcelona.

Tarraco (the Roman name for Tarragona) was one of the most important cities in the Roman Empire. F On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tàrraco a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public. Among the citizens of Tarragona, it has moreover fomented knowledge of, pride in and respect for the city.
Speaking about Tarraco’s climate, the famous Roman poet Virgil wrote: “The climate blends and confuses the seasons singularly, so that all the year seems an eternal spring.” Thanks to its temperate climate, with an average yearly temperature of 23ºC, its clean beaches with fine and gloden sand, and its singular artistic and architectural heritage, Tarragona is one of the most important tourism hubs in EuropeThe city has a population of 120,202 inhabitants

8 non-code ways to contribute to open source #opensource #feedly

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January 29, 2016 at 03:56PM

8 non-code ways to contribute to open source #opensource #feedly

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January 29, 2016 at 03:48PM

Journal of Luminescence | Vol 170, Part 3, Pgs 749-888, (February 2016) #papers

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January 29, 2016 at 03:14PM

Thursday, January 28, 2016

Silicon Photonics - from promise to reality in datacentres #semi #feedly #papers

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January 28, 2016 at 02:12PM

Silicon Photonics - from promise to reality in datacentres #semi #feedly #papers

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January 28, 2016 at 02:06PM

Special Issue: Planar Fully-Depleted SOI technology #papers

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January 28, 2016 at 07:49AM

Wednesday, January 27, 2016

How quality control could save your science #papers #feedly

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January 27, 2016 at 04:59PM

Linux and #opensource are the future #opensource #feedly

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January 27, 2016 at 03:33PM

Building a FOSS Force Community #opensource

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January 27, 2016 at 12:03AM

Tuesday, January 26, 2016

Nanowire Transistors Could Let You Talk, Text, and Tweet Longer #papers

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January 26, 2016 at 11:33PM

[mos-ak] [2nd Announcement and Call for Papers] Spring MOS-AK Workshop Dresden March 18, 2016

Spring MOS-AK Workshop 
 Dresden March 18, 2016
 2nd Announcement and Call for Papers 

Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu, local workshop organizers Martin Claus and Sandra Bley as well as Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Workshop which will be held in Dresden in the DATE Conference timeframe. Planned MOS-AK workshop is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Important Dates:
Call for Papers - Dec. 2015
2nd Announcement - Jan. 2016
Final Workshop Program - Feb. 2016

MOS-AK Workshop: March 18, 2016
09:00 - 10:30 - Morning MOS-AK Session
11:00 - 12:00 - CM Standardization Panel
12:00 - 13:00 - Lunch
13:00 - 16:00 - Afternoon MOS-AK Session 

Center for Advancing Electronics Dresden (CFAED)
Technische Universität Dresden
Würzburger Str. 46
01187 Dresden

Topics to be covered include the following:
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • Open Source TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D, DFY, DFT and reliability/ageing IC Designs
  • Foundry/Fabless Interface Strategies
Online MOS-AK Abstract Submission:
Authors should submit an abstract using on-line MOS-AK submission form:
(any related inquiries can be sent to

Free Online Workshop Registration:
(any related inquiries can be sent to

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee

(WG 26012016)

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ArduinoPhone 2.0 - An #opensource mobile phone #todo #feedly

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January 26, 2016 at 10:56AM

Visit Brussels and learn about open source at #FOSDEM 2016 #opensource #feedly

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January 26, 2016 at 10:45AM

Unified Compact #Model Covering Drift-Diffusion to Ballistic Carrier Transport #papers #feedly

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January 26, 2016 at 08:09AM

Monday, January 25, 2016

ISSCC Focuses on Image Processors for Autonomous Cars #modeling

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January 25, 2016 at 08:43PM

Friday, January 22, 2016

Compact #Model Parameter Extraction Using Bayesian Inference, Incomplete New Measurements, and Optima...

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January 22, 2016 at 11:18PM

Leakage current minimisation and power reduction techniques using sub-threshold design #modeling

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January 22, 2016 at 05:17PM

Analytical #Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire Transistors

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January 22, 2016 at 02:59PM

Compact #Modeling of Magnetic Tunneling Junctions

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January 22, 2016 at 02:52PM

Parasitic Capacitance Analytical #Modeling for Sub-7-nm Multigate Devices

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January 22, 2016 at 02:47PM

Parasitic Capacitance Analytical Model for Sub-7-nm Multigate Devices #modeling

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January 22, 2016 at 02:44PM

Tuesday, January 19, 2016

FOSDEM 2016 EDA Devroom

FOSDEM 2016: EDA Devroom
Room: AW1.121 
Saturday, 30 January 2016

Software developers have a much easier time sharing their developments than hardware designers. When you put a piece of code on the Web, you don't ask yourself if others will have the freedom and resources to access a text editor to look at it and modify it, or a compiler or interpreter to have the code do something useful. The landscape for hardware designs is more complicated. The dominant design and simulation tools are proprietary, and there is not even a de-facto proprietary standard format to share designs. The Electronic Design Automation (EDA) Devroom looks at recent progress in Free CAD/EDA Tools for hardware design and simulation, and serves as a meeting place for discussion about future collaborations and FOSS developments. Come and see how some of these tools are actually catching up, and sometimes even more, in terms of features and quality.

[EDA Devroom Detailed Agenda]

Monday, January 18, 2016

NEEDS Berkeley Workshop 2016

Modelling using Verilog-A in MAPP: A Hands-On Workshop

8 AM - 6 PM
Thursday, Feb 4, 2016

University of California, Berkeley
Berkeley, CA 94720

Berkeley's Model and Algorithm Prototyping Platform (MAPP) is a MATLAB-based platform that provides a complete environment for developing, testing, experimentally validating, and inserting compact models in open source simulation platforms. It is also useful for prototyping new simulation algorithms.
This hands-on workshop will focus on the newly developed Verilog-A to ModSpec device model translator for MAPP, dubbed VAPP (Verilog-A Parser and Processor). The goal of the workshop is to illustrate how VAPP/MAPP facilitates the development of simulation ready compact models. An overview of MAPP's multi-physics modelling and simulation capabilities will also be provided. A hands-on refresher on MAPP will be provided for those who have no prior experience with it.
Please bring your laptop (running linux, OSX or Windows). It would be very helpful if you already have MATLAB installed and running on your laptop; otherwise you may need to access the hands-on components through the web.

For more information about MAPP, see:

Travel support will be available for NEEDS students. Please try to share a room, and ask your advisor to e-mail Mark Lundstrom at for travel support.

For other questions, please contact Vicki Johnson at