[paper] InP HEMTs for future THz applications

J.Ajayan^a, D.Nirmal^b, Ribu Mathew^c, Dheena Kurian^d, P.Mohankumar^e, L.Arivazhagan^b, D.Ajitha^f

A critical review of design and fabrication challenges in InP HEMTs 

for future terahertz frequency applications

Materials Science in Semiconductor Processing

Volume 128, 15 June 2021, 105753

  
a SR University, Warangal, Telangana, India
b Karunya Institute of Technology and Sciences, Coimbatore, Tamilnadu, India
c VIT Bhopal University, Bhopal, Madhya Pradesh, India
d Kerala Technological University, Trivandrum, Kerala, India
e Sona College of Technology, Salem, Tamilnadu, India
f Sreenidhi Institute of Science and Technology, Hyderabad, Telangana, India

Abstract: This article critically reviews the materials, processing and reliability of InP high electron mobility transistors (InP HEMTs) for future terahertz wave applications. The factors such as drain current (ID) over 1200 mA/mm, transconductance (gm) over 3000 mS/mm, cut off frequency (fT) over 700 GHz and maximum oscillation frequency (fmax) over 1300 GHz makes InP HEMTs suitable for Terahertz wave applications. Furthermore, low DC power consumption and outstanding low noise performance makes InP HEMT most appropriate transistor technology for the development of space based receivers. This review article critically assesses the challenges in miniaturization of InP HEMTs, doping strategies in InP HEMTs, buried platinum technology, impact of annealing process and temperature, influence of electron and proton irradiation, thermal and bias stress on the reliability of InP HEMTs, cavity and gating effects and influence of trapping effects. InP HEMTs are very much preferable in applications like radio astronomy, terahertz optical and wireless communication systems, atmospheric imaging and sensing, automotive radar, ground based receivers in deep space networks, terahertz imaging and sensing, biomedical applications, security screening, video conferencing & real time multimedia file transfer, high speed and ultra low power digital integrated circuits.

Fig: 3D representation of InP high electron mobility transistor (InP HEMT)

[paper] Bulk CMOS Technology at Sub-Kelvin Temperature

Characterization and Modeling of 0.18µm Bulk CMOS Technology 

at Sub-Kelvin Temperature 

Teng-Teng Lu^1,2, Zhen Li^1,2, Chao Luo^1,2, Jun Xu², Weicheng Kong³, 

and Guoping Guo¹ (Member, IEEE) 

IEEE J-EDS, vol. 8, pp. 897-904, 2020

DOI: 10.1109/JEDS.2020.3015265.

¹Key Laboratory of Quantum Information, University of Science and Technology of China, Hefei 230026, China 

²Department of Physics, University of Science and Technology of China, Hefei 230026, China 

³Department of Quantum Hardware, Origin Quantum Computing Company Limited, Hefei 230026, China

Abstract: Previous cryogenic electronics studies are mostly at 77K and 4.2K. Cryogenic characterization of a 0.18μm standard bulk CMOS technology (operating voltages: 1.8V and 5V) is presented in this paper. Several NMOS and PMOS devices with different width to length ratios (W/L) were extensively tested and characterized under various bias conditions at sub-kelvin temperature. In addition to devices dc characteristics, the kink effect and current overshoot phenomenon are observed and discussed at sub-kelvin temperature. Especially, the current overshoot phenomenon in PMOS devices at sub-kelvin temperature is shown for the first time. The transfer characteristics of MOSFET devices (1.8V W/L = 10μm/10μm) at sub-kelvin temperature are modeled using the simplified EKV model. This work facilitates the CMOS circuits design and the integration of CMOS circuits with silicon-based quantum chips at extremely low temperatures.

FIG: IDS-VGS curves of large thin TOX NMOS (a,b,e,f) and PMOS (c,d,g,h) devices at sub-kelvin temperature measured (symbols) and simulated (solid lines). 

Aknowlegement: This work was supported in part by the National Key Research and Development Program of China under Grant 2016YFA0301700, in part by the National Natural Science Foundation of China under Grant 11625419, in part by the Anhui initiative in Quantum information Technologies under Grant AHY080000, and in part by the USTC Center for Micro and Nanoscale Research and Fabrication.