Free And Open Source Simulator Software For Engineers

Free And Open Source Simulator Software For Engineers

0. Qucs
Download Link: http://qucs.sourceforge.net/download.html
Supported OS: Windows, Linux, Mac OSX
License:  Qucs is released under the GPL license and so it is free for free programmers and users !
Qucs stands for Quite Universal Circuit Simulator. So far Qucs is not yet finished, but it is already packed with features. Take a look at the screenshots to get a feel for what it can do.

1. CEDAR
Download Link: http://sourceforge.net/projects/cedarlogic/files/latest/download
Supported OS: Windows
License: Freeware
CEDAR LS is an interactive digital logic simulator to be used for teaching of logic design or testing simple digital designs. It features both low-level logic gates as well as high-level components, including registers and a Z80 microprocessor emulater

2. Logisim
Download Link: http://sourceforge.net/projects/circuit/files/latest/download
Supported OS: Windows, Linux
License: Freeware
Logisim is an educational tool for designing and simulating digital logic circuits. With its simple toolbar interface and simulation of circuits as you build them, it is simple enough to facilitate learning the most basic concepts related to logic circuits.

3. FreeMat
Download Link: http://sourceforge.net/projects/freemat/files/latest/download?source=files
Supported OS: Windows, Linux
License: GPL
FreeMat is a free environment for rapid engineering and scientific prototyping and data processing. It is similar to commercial systems such as MATLAB from Mathworks, and IDL from Research Systems, but is Open Source. FreeMat is available under the GPL license.

4. Logic Gate Simulator
Download Link: http://sourceforge.net/projects/gatesim/files/latest/download
Supported OS: Windows
License: GPL
Logic Gate Simulator is an open-source tool for experimenting with and learning about logic gates. Features include drag-and-drop gate layout and wiring, and user created "integrated circuits".

5. Maxima
Download Link: http://sourceforge.net/projects/maxima/files/latest/download?source=recommended
Supported OS: Windows
License: GPL
Maxima is a fairly complete computer algebra system written in Common Lisp with an emphasis on symbolic computation.

6. Ngspice
Download Link: http://sourceforge.net/project/showfiles.php?group_id=38962
Supported OS: Windows, Linux
License: GPL
Ngspice is a mixed-level/mixed-signal circuit simulator. Its code is based on three open source software packages: Spice3f5, Cider1b1 and Xspice. Ngspice is part of gEDA project, a full GPL'd suite of Electronic Design Automation tools.

7. Qfsm
Download Link: http://sourceforge.net/projects/qfsm/files/latest/download
Supported OS: Windows, Linux
License: GPL
A graphical tool for designing finite state machines

8. QSapecNG
Download Link: http://sourceforge.net/projects/qsapecng/files/latest/download?source=directory
Supported OS: Windows
License: GPL
QSapecNG is a Qt-based symbolic analysis program for linear analog circuits. In fact, it consists of two indipendently parts: the SapecNG framework engine, and the application gui QSapecNG.

[source for 1-8]

SISPAD2014: 2nd Call for Papers

Second Call for Papers

SISPAD2014

September 9 – 11, 2014

Workshop, September 8, 2014

Mielparque Yokohama, Yokohama, JAPAN

Co-sponsored by Japan Society of Applied Physics Technical 

Co-sponsored by IEEE Electron Devices Society

This conference provides an opportunity for the presentation and discussion of the latest advances in modeling and simulation of semiconductor devices, processes, and equipment for integrated circuits.

Topics:

• Modeling and simulation of all sorts of semiconductor devices, including FinFETs, ultra-thin SOI devices, emerging memory devices, optoelectronic devices, TFTs, sensors, power electronic device, widegap semiconductor devices, spintronic devices, tunnel FETs, SETs, carbon-based nanodevices, organic electronic devices, and bioelectronic devices
• Modeling and simulation of all sorts of semiconductor processes, including first-principles material design and growth simulation of nano-scale fabrication
• Fundamental aspects of device modeling and simulation, including quantum transport, thermal transport, fluctuation, noise, and reliability
• Compact modeling for circuit simulation, including low-power, high frequency, and power electronics applications
• Process/device/circuit co-simulation in context with system design and verification
• Equipment, topography, lithography modeling
• Interconnect modeling, including noise and parasitic effects
• Numerical methods and algorithms, including grid generation, user-interface, and visualization
• Metrology for the modeling of semiconductor devices and processes

Plenary Speakers:

• Augusto Benvenuti, Micron Technology,
  “Current status and future prospects of non-volatile memory modeling”
• Massimo V. Fischetti, University of Texas at Dallas,
  “Physics of electronic transport in low-dimensionality materials for future FETs”
• Kimimori Hamada, Toyota Motor Corporation,
  “TCAD challenge on development of power semiconductor devices for automotive applications”

Invited Speakers:

• Mario Ancona, Naval Research Laboratory,
  “Nonlinear thermoelectroelastic simulation of III-N devices”
• Asen Asenov, University of Glasgow,
  “Progress in the simulation of time dependent statistical variability in nano CMOS transistors”
• Jean-Pierre Colinge, Taiwan Semiconductor Manufacturing Company,
  “Nanowire transistors: pushing Moore's law to the limit”
• Tibor Grasser, Vienna University of Technology,
  “Advanced modeling of charge trapping: RTN, 1/f noise, SILC, and BTI”
• Kohji Mitsubayashi, Tokyo Medical and Dental University,
  “Novel biosensing devices for medical applications”
• Christian Sandow, Infineon Technologies,
  “Exploring the limits of the safe operation area of power semiconductor devices”
• Mark Stettler, Intel Corporation,
  “Device and process modeling: 20 years at Intel's other fab”

Workshops:

Two companion workshops will run concurrently prior to the start of the conference on Monday September 8, 2014:

• Compact Modeling "Enabling Better Insight of Device Features"
  Organizer: Mitiko Miura-Mattausch (Hiroshima University)
• Carrier Transport in Nano-Transistors: Theory and Experiments
  Organizer: Hideaki Tsuchiya (Kobe University) and Yoshinari Kamakura (Osaka University)

Abstract Submission: 

Authors are invited to submit a two-page abstract (A4 or 22×28cm) including figures. Full submission information is available at the ing web page: <https://sites.google.com/site/sispad2014/>. Authors of accepted papers will be notified by May 15, 2014. Camera-ready copy of a four-page manuscript will be required from the authors for inclusion in the Conference Proceedings by June 30, 2014.

Deadline for submission of abstract: March 31, 2014

Chip in Aracaju 2014 - Call for Papers

27th SBCCI 2014 29th SBMICRO 2014 4th WCAS 2014
September 1st to 5th 2014, Aracaju (SE), Brazil         

http://www.chip-in-aracaju.ufs.br

CHIP IN ARACAJU 2014 Conference to be held in the city of Aracaju, Brazil, from September 1^st to 5^th 2014. The conference co-locates two main symposia (SBCCI, SBMicro), one student forum (SFORUM), one workshop (WCAS) and the industrial exhibition.

27^th SBCCI (Symposium on Integrated Circuits and Systems Design) is an international symposium with an estimated attendance of about 200 experts from academia and industry. Among those 25% are expected to come from outside Brazil. This symposium represents the main event in chip design and design automation in Brazil. It is co-sponsored by the Brazilian Computing Society (SBC), the Brazilian Microelectronics Society (SBMicro), ACM SigDA and, the IEEE Circuits and Systems Society (CASS), and IFIP W 10. The proceedings will be published by the IEEE and will remain available at the IEEE Xplore and ACM Digital Library. 

Abstract Submission: March 23^th 2014          

Paper Submission Deadline: March 30^th 2014

Call for papers: 

http://www.chip-in-aracaju.ufs.br/archives/CFP%20-%20SBCCI2014.pdf

SBMicro 2014 (29^th Symposium on Microelectronics Technology and Devices) is an international symposium that usually counts with about 100 attendees focusing on process technologies. It is co-sponsored by the Brazilian Microelectronics Society (SBMicro), the Brazilian Computing Society (SBC), the Electrochemical Society (ECS) and, the IEEE Electron Devices Society (EDS). The proceedings will be published by the IEEE and ECS Digital Library.

Submission Deadline: March 31^th 2014        

Notification of Acceptance: May 18^th, 2014

Call for papers: 

http://www.chip-in-aracaju.ufs.br/archives/CFP%20-%20SBMICRO2014.pdf

WCAS 2014 (4th Workshop on Circuits and System Design) is devoted to the presentation and discussion of design experiences with a high degree of relevance in industrial and educational contexts, as well as innovative design methodologies and applications of specific design technologies in an industrial context. The main idea of the workshop is to offer the chance (primarily to industry) of pointing out to the community real-life design and technology challenges that should be addressed in the short-to-medium term.

Submission deadline (2 to 4 pages): June 1^st 2014        

Acceptance notification: July 13^th

Call for papers: http://www.chip-in-aracaju.ufs.br/archives/CFP%20WCAS2014.pdf

SFORUM 2014 (14th Microeletronics Students Forum) is an event promoted by the Brazilian Microelectronics Society (SBMicro) and the Brazilian Computer Society (SBC).

Paper Submission Deadline:June 2^nd 2014         

Notification of Acceptance: July 16^th, 2014

Call for papers: 

http://www.chip-in-aracaju.ufs.br/archives/SFORUM2014CFP.pdf

Companies and Industries: In addition to the technical sessions associated with the regular papers, each symposium normally invites 6 distinguished speakers to present tutorials and invited talks on state-of-the art topics. Furthermore, traditionally, the conference includes an exhibition with stands for microelectronics and

electronic vendors.

[mos-ak] [Final Program] Spring MOS-AK Workshop in London

Spring MOS-AK Workshop in London

Together with the workshop host, Prof. Bal Virdee, Londonmet, FIET MIEEE, and Prof. Mike Brinson, Londonmet, as well as Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the spring MOS-AK Workshop in London

Venue:

London Metropolitan University 

Graduate Centre

166-220 Holloway Road

London N7 8DB

Workshop Agenda <http://www.mos-ak.org/london_2014/>: 

with On-line Free Registration 

• March 28, 2013
  
• 9:00-9:30 Open On-site Registration 
• 9:30-12:00 Morning Session
  
• 13:00-16:00 Afternoon Session
• 17:00-19:00 Welcome Reception and Networking
• March 29, 2013
  
• 9:00-12:00 Qucs and ngspice GPL circuit simulation session

Extended MOS-AK/GSA Committee

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14 Free Resources To Learn About MOSFETs

Metal Oxide Field Effect Transistors (MOSFET) are commonly used for amplifying or switching electronic signals. They have a wide usage in the field and learning about these is crucial for any electronic engineer. So, with that in mind, here are 14 resources that will get you up and running!

[Tutorials, Videos, Free Reference Materials at efytimes.com]

Custom IC Design & Device Modeling - Tools and Technologies

Synopsys University Symposium

Friday, March 7; 9:00 a.m. to 5:30 p.m; The Lalit New Delhi Hotel

The Synopsys University Symposiums are for members of the academic community to get the latest information on design automation solutions, methodologies and standards. These FREE technical seminars are a resource to help accelerate innovation. Join us at this symposium to learn how you can achieve the highest value and productivity from your Synopsys tool investment.

Device Modeling

With growing device and design complexity, device-circuit co-design is becoming an increasingly important area of research. Today, devices and circuits are designed and optimized together for superior performance, yield and reliability. Synopsys TCAD tools are indispensable for device design and optimization.

[Agenda on-line]

postdoc position in Spain related to semiconductor device modeling

As Professor in the Universitat Rovira i Virgili (Tarragona, Catalonia, , Spain), I am going to apply for a postdoctoral position (funded by the Spanish Ministry) related to modeling (in particular compact modeling) and/or parameter extraction of emerging devices we are targeting, such as Multi-Gate MOSFETs, junctionless nanowires, III-V MOSFETs, GaN HEMTs, Tunnel FETs, and also organic and metal oxide TFTs.

The candidate should be a person who holds a PhD as awarded after September 1 2009, or who is committed to defend his Ph D thesis in the coming months (before the start of the contract).

Contracts are expected to start after September 2014.
The candidate should have enough research experience in the field of semiconductor devices, and must have a very good knowledge of the physics of electron devices. The research project to be carried out can be adapted to the candidate's profile.

The work may continue the work we did in the framework of some EU-funded projects, such as COMON (about Multi-Gate MOSFETs, GaN HEMTs, and High Voltage MOSFETs), SQWIRE (junctionless Si nanowires) and FlexNET (organic TFTs) . Our contribution in these projects was the physics and modeling (in particular compact modeling) of the novel devices addressed by these European projects.

The postdoc position, which will be a contract, will have a duration of up to 2 years. The net salary will be around 1900 Euro/months.

Interested applicants should send me their CV by e-mail.
DEADLINE TO RECEIVE APPLICATIONS: February 24 2014

MY E-MAIL ADDRESS IS: benjamin.iniguez@urv.cat

Address:
Benjamin Iñiguez
Nanoelectronics and Photonics Systrems Group (NEPHOS)
Department of Electronic Engineering
Universitat Rovira i Virgili (URV)
Avinguda dels Paisos Catalans 26
43007 Tarragona, Catalonia
SPAIN.