Apr 26, 2024

[paper] Compact Modeling of Hysteresis in OTFTs

Compact modeling of hysteresis in organic thin-film transistors
A. Romeroa, J.A. Jiménez-Tejadaa, R. Picosb, D. Laraa, J.B. Roldána, M.J. Deenc
Organic Electronics 129 (2024) 107048
DOI : 10.1016/j.orgel.2024.107048

a Departamento de Electrónica y Tecnología de Computadores, CITIC-UGR, Uni Granada, Spain
b Department of Industrial Engineering and Construction, Universitat de les Illes Balears, Spain
c Department of Electrical and Computer Engineering, McMaster University, Canada


Abstract: In this work, we propose a model that describes the temporal evolution of the threshold voltage and trapped charge density in Thin-Film Transistors (TFTs) under dynamic conditions, paving the way for the characterization and modeling of memory transistors. The model is expressed as a first-order differential equation for the trapped charge density, which is controlled by a time constant and an independent term proportional to the drain current. The time-dependent threshold voltage is introduced in a previously developed compact model for TFTs with special consideration to the contact effects. The combination of both models and the use of an evolutionary parameter extraction procedure allow for reproducing the experimental dynamic behavior of TFTs. The results of the model and the evolutionary procedure have been validated with published experimental data of pentacene-based transistors. The procedure is able to simultaneously reproduce three kinds of experiments with different initialization routines and constraints in each of them: output and transfer characteristics with hysteresis and current transients characteristics
FIG: a.) Modeling the contact regions and intrinsic channel of an OTFT structure (a bottom contact configuration); b.)  Comparison of experimental transfer characteristics


Acknowledgements : The authors acknowledge support from the project PID2022 139586NB-44 funded by MCIN/AEI/10.13039/501100011033 and FEDER, EU. Funding for open access charge: Universidad de Granada / CBUA.

Appendix: Supplementary material related to this article can be found online.

Apr 25, 2024

[PhD] Transient Simulation of Frequency Domain Devices in Gnucap

Adding transient simulation of frequency domain devices to the Gnucap circuit simulator
Phd Thesis by Seán Higginbotham
Supervisor: Assistant Prof. Justin King
April 2024
Trinity College Dublin, The University of Dublin
College Green, Dublin 2, Ireland

Abstract: Radio frequency design constitutes a dominant element in the development of key communications technologies. Having accurate, robust, and widely accessible simulation methods is critical to ensuring continued advancements in this field, and guaranteeing the associated infrastructural and societal shifts that such technologies enable.
High frequency circuits invariably contain multiple non-linear components, which are naturally dealt with via time marching simulation of their time-domain analytic equations. However, including this alongside linear, generally dispersive, devices and effects, which are typically only characterised through a set of frequency-domain data describing the scattering response of an associated port-network, has traditionally been a problem for designers. Frequency-domain methods such as the harmonic balance technique and its successors have dominated radio frequency design for decades. However, such methods exhibit disadvantages in the context of modern circuits which are increasingly non-linear, and which operate with increasingly complicated modulated signals.
Various alternatives have been proposed, though as of yet no universally accepted method has emerged. Though harmonic balance will likely not be replaced, this project seeks to implement one such pure transient technique as an alternative. The proposed technique is based on using the vector-fitting algorithm to produce a model of the frequency response of the linear portnetwork, and then using a recursive convolution formulation to allow the time-domain response to be efficiently obtained from the port’s impulse response. An equivalent circuit companion model is developed from the resulting time-domain power-wave relation. This companion model allows the linear device to be directly included in a transient simulation alongside the analytic non-linear components, by way of providing a manner of computing the voltage and current on the network’s ports.
We implement the technique for one-port networks in a circuit driven by baseband signals. It is added to the free, open-source Gnucap circuit simulator as a ‘device plugin’. This report details how the implementation was done and provides results illustrating that it works as intended; the plugin can be installed by a user, who simply provides it with a file of frequency-domain data representing the port-network, and the plugin works naturally with the Gnucap transient solver to allow obtaining a transient solution of the overall circuit. A pure transient technique such as this does not require limiting assumptions or approximations on any components in the circuit and they are therefore preferable in certain contexts to frequency-domain methods like harmonic balance.
The project offers a significant contribution towards increasing the accessibility of radiofrequency electronics design and teaching.

 FIG: Summary of the traditional approach to simulating RF/MW circuits via HB, and the proposed pure transient approach implemented in this PhD Thesis

Acknowledgements: Seán Higginbotham would like to thank my M.A.I supervisor Dr. Justin King, whose previous work was the basis for this project. He provided invaluable insights and guidance which made the project both possible and an enjoyable experience, instilling curiosity at each discussion. Relevant academic references are included in the bibliography section. Acknowledgements of the dependancies used in the project code follow.

Gnucap is the creation of Albert Davis and is developed by him and others. It is provided under the GNU GPLv3, which is also the license that this project code is provided under on the associated GitHub repository.
See https://www.gnu.org/licenses/gpl-3.0.html. For the GNU GPLv3 license. Additionally, see the Gnucap repository here https://savannah.gnu.org/projects/ gnucap/.

LAPACK is a co-creation of The University of Tennessee and The University of Tennessee Research Foundation, The University of California Berkeley, and The University of Colorado Denver. See the user guide here https://netlib.org/lapack/.
The LAPACKE C bindings are the creation of Intel Corp.

The relevant licensing files are found within the source code and on the respective website.

Should the reader of this report have any questions or suggestions, please feel free to reach out at higginbs@tcd.ie, or via other channels such as the project GitHub located at https: //github.com/SHigginbotham/transient-sparam-gnucap. The project supervisor may also be of interest, available at justin.king@tcd.ie.

[paper] Flexible TFT Electronics

Hikmet Çeliker, Wim Dehaene and Kris Myny
Multi-project wafers for flexible thin-film electronics by independent foundries.
Nature (2024)
DOI: 10.1038/s41586-024-07306-2

1. ESAT, KU Leuven, Leuven, Belgium
2. imec, Leuven, Belgium

Abstract: Flexible and large-area electronics rely on thin-film transistors (TFTs) to make displays large-area image sensors, microprocessors, wearable healthcare patches, digital microfluidics, and more. Although silicon-based complementary metal–oxide–semiconductor (CMOS) chips are manufactured using several dies on a single wafer and the multi-project wafer concept enables the aggregation of various CMOS chip designs within the same die, TFT fabrication is currently lacking a fully verified, universal design approach. This increases the cost and complexity of manufacturing TFT-based flexible electronics, slowing down their integration into more mature applications and limiting the design complexity achievable by foundries. Here we show a stable and high-yield TFT platform for the fabless manufacturing of two mainstream TFT technologies, wafer-based amorphous indium–gallium–zinc oxide and panel-based low-temperature polycrystalline silicon, two key TFT technologies applicable to flexible substrates. We have designed the iconic 6502 microprocessor in both technologies as a use case to demonstrate and expand the multi-project wafer approach. Enabling the foundry model for TFTs, as an analogy of silicon CMOS technologies, can accelerate the growth and development of applications and technologies based on these devices.

FIG:  Photograph of all three chips at once: the vintage WDC 65C02 in a 40-pin DIP package (left), the flex LTPS 6502 (middle) and the flex IGZO 6502 (right)


Acknowledgements: We thank PanelSemi (a system-on-film foundry service provider in Taiwan) for providing LTPS panels and Pragmatic for providing IGZO wafers as a verification of our designs, using their foundry-mode panel and wafer delivery services. Part of this work has received funding under the Horizon Europe programme from the European Research Council under grant agreement no. 101088591 ‘ORISON project’. Views and opinions expressed are, however, those of the authors only and do not necessarily reflect those of the European Union or the European Research Council. Neither the European Union nor the granting authority can be held responsible for them.

Apr 22, 2024

[C4P] Orbitaly2024 in Bologna

8th International Conference on Organic Bioelectronics
Orbitaly2024
Bologna Sept. 23-25, 2024

OrBItaly (Organic BIoelectronics Italy) is an international conference, organized by the Italian scientific community and dedicated to the most recent results in the field of bioelectronics, with a particular focus on the employment of organic materials. OrBItaly has attracted in the years a growing interest of the scientists coming from all over the world. The 2024 edition is the seventh one of this cross-disciplinary conference, and will be held in Bologna, on September 23rd-25th, 2024, at the San Giovanni in Monte historic building in the centre of Bologna.

The abstract submission is open, with its deadline on 15th June 2024. 

All details about the conference can be found on the website: https://eventi.unibo.it/orbitaly2024

Looking forward to meeting you in Bologna

The OrBItaly 2024 Organizing Committee
Beatrice Fraboni, 
Francesco Decataldo, 
Marta Tessarolo, 
Tobias Cramer,
Vito Vurro




Apr 21, 2024

[webinar] Open Source EDA Development of Chips in Europe

Professor Marie-Minerve Louerat, Sorbonne Université-CNRS, GoIT Project, has announced the upcoming webinar on Open Source EDA fostering development of Chips in Europe


"Introduction to the open-source EDA ecosystem"
online webinar to foster engagement for Open-Source EDA and Open-Silicon development in Europe

📅 Tuesday May 14, 2024 🕙 10:00-12:00 (CEST) with Free Online Registration

Workshop Agenda:
  • European Semiconductor Design Ecosystem (10 min)
    • Matthew Xuereb, European Commission
  • Open-Source Semiconductor Ecosystem (15 min)
    • Luca Alloatti, Free Silicon Foundation (I) ETS
  • Open-Source EDA Software and Semiconductor Design (15 min)
    • Jean-Paul Chaput, Sorbonne Université, Coriolis Foundation
  • European Roadmap on the Advancement of Open-Source EDA Tools, next steps (15 min)
    • Rihards Novickis, Latvian Institute of Electronics and Computer Science
  • Q&A session / Feedback (up to 1 hour)
NB: 2nd event - to be announced
Location: Paris, Sorbonne Université
📅 Date: June 18, 2024, before FSiC2024 conference