Jul 8, 2016

An improved model for substrate in RF SOI MOSFET varactor https://t.co/iK16GyX82y #papers #feedly


from Twitter https://twitter.com/wladek60

July 08, 2016 at 10:12PM
via IFTTT
Posted by at No comments:
Labels: ,

[mos-ak] [2nd Announcement and Call for Papers] MOS-AK ESSDERC/ESSCIRC Workshop; Lausanne September 12, 2016

 MOS-AK ESSDERC/ESSCIRC Workshop  
  Lausanne September 12, 2016 
   2nd Announcement and Call for Papers  

 Together with International MOS-AK Board of R&D Advisers: Larry Nagel, Omega Enterprises Consulting (USA), Andrei Vladimirescu, UCB (USA); ISEP (FR) and local workshop coordinator Jean-Michel Sallese, EPFL (CH) as well as all the Extended MOS-AK TPC Committee, we have pleasure to invite to the 14th consecutive MOS-AK ESSDERC/ESSCIRC Workshop which will be held at Swisstech Convention Centre in Lausanne on September 12, 2016. Planned MOS-AK workshop is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Important Dates:
  • Call for Papers - June 2016
  • 2nd Announcement - July 2016
  • Final Workshop Program - August 2016
  • MOS-AK Workshop - Sept.12 2016
Venue:
Swisstech Convention Centre EPFL                                        
Route Louis-Favre 2
CH-1024 Ecublens

Topics to be covered include the following among other related to the compact/SPICE modeling :
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • Open Source TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, TFT, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D, DFY, DFT and reliability/ageing IC Designs
  • Foundry/Fabless Interface Strategies
Speakers: tentative list of MOS-AK Experts:
  • Marco Bellini, ABB (CH)
  • Mike Brinson, LondonMet, (UK)
  • Matthias Bucher, TUC (GR)
  • Mansun Chan, UST (HK)
  • James Greer, ASCENT, Tyndall (IE)
  • Benjamin Iniguez, URV (SP)
  • Alexander Kloes, THM (D)
  • Muhammad Nawaz, ABB (SE)
  • Denis Rideau, ST (F)
  • Jean-Michel Sallese, EPFL (CH)
  • Andrei Vladimirescu, UCB (USA); ISEP (FR); Keynote
  • Lining Zhang, UST (HK)
Online MOS-AK Abstract Submission:
Prospective authors should submit an abstract to abstracts@mos-ak.org

Online Workshop Registration:
http://esscirc-essderc2016.epfl.ch/registration
(any related inquiries can be sent to register@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee
--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To post to this group, send email to mos-ak@googlegroups.com.
Visit this group at https://groups.google.com/group/mos-ak.
For more options, visit https://groups.google.com/d/optout.
Posted by at No comments:
Labels: ,
Location: Lausanne, Switzerland

Jul 6, 2016

"Measurement and analysis techniques for device agnostic electrical cha" #papers by James E Moore https://t.co/ryg6hgFn5f


from Twitter https://twitter.com/wladek60

July 06, 2016 at 08:56AM
via IFTTT
Posted by at No comments:
Labels: ,

Jul 1, 2016

Dual-Gate JFET #Modeling https://t.co/Cwroa516sK


from Twitter https://twitter.com/wladek60

July 01, 2016 at 04:20PM
via IFTTT
Posted by at No comments:
Labels: , ,

Tutorial on Signal Processing in Linux with Octave https://t.co/Lzoeytzqwt #todo #feedly #papers


from Twitter https://twitter.com/wladek60

July 01, 2016 at 08:13AM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 30, 2016

The #EAGLE has landed: at #Autodesk! #papers #opensource #kicad https://t.co/pKRvYSLMhd


from Twitter https://twitter.com/wladek60

June 30, 2016 at 10:13AM
via IFTTT
Posted by at No comments:
Labels: ,

TFT Small Signal Model and Analysis #DOMINO #papers https://t.co/NcRpCSjCQk


from Twitter https://twitter.com/wladek60

June 30, 2016 at 10:05AM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 24, 2016

Is a Road To #5nm https://t.co/ks8mDGXr2g #papers


from Twitter https://twitter.com/wladek60

June 24, 2016 at 09:27PM
via IFTTT
Posted by at No comments:
Labels: ,

Large-Signal Verilog-A Model of Graphene Field-Effect Transistors #papers https://t.co/YvjUJBBp9n


from Twitter https://twitter.com/wladek60

June 24, 2016 at 09:24PM
via IFTTT
Posted by at No comments:
Labels: ,

Power Semiconductor Devices and Smart Power IC Technologies CFP https://t.co/1N4eQf5ufj #papers #feedly


from Twitter https://twitter.com/wladek60

June 24, 2016 at 07:58PM
via IFTTT
Posted by at No comments:
Labels: ,

#Science in #China https://t.co/dZfpCgzuVs #papers #feedly


from Twitter https://twitter.com/wladek60

June 24, 2016 at 07:46PM
via IFTTT
Posted by at No comments:
Labels: ,

Proposal of Physics-Based Equivalent Circuit of Pseudo-#MOSCap Structure for Impedance Spectroscopy https://t.co/yjZkpnrwQo #papers #feedly


from Twitter https://twitter.com/wladek60

June 24, 2016 at 07:37PM
via IFTTT
Posted by at No comments:
Labels: ,

#China #R&D by the numbers https://t.co/43JN3uARBC #papers #feedly https://t.co/s6vOoDT9ir


from Twitter https://twitter.com/wladek60

June 24, 2016 at 07:35PM
via IFTTT
Posted by at No comments:
Labels: ,

#China #R&D by the numbers https://t.co/43JN3uARBC #papers #feedly


from Twitter https://twitter.com/wladek60

June 24, 2016 at 07:35PM
via IFTTT
Posted by at No comments:
Labels: ,

Assessment of InAs/AlGaSb Tunnel-FET Virtual Technology Platform for Low-Power Digital Circuits https://t.co/1gydKvYkKV #papers #feedly


from Twitter https://twitter.com/wladek60

June 24, 2016 at 09:10AM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 21, 2016

Analysis and Performance Study of III–V Schottky Barrier Double-Gate MOSFETs Using a 2-D Analytical Model https://t.co/vLSMO52Cys #papers


from Twitter https://twitter.com/wladek60

June 21, 2016 at 03:24PM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 18, 2016

New Y-function based MOSFET parameter extraction method from weak to strong inversion range https://t.co/qIhncY55c7 #papers #feedly


from Twitter https://twitter.com/wladek60

June 18, 2016 at 09:13PM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 17, 2016

Organic Semiconductors Books to Download https://t.co/7ccToLje3o #papers


from Twitter https://twitter.com/wladek60

June 17, 2016 at 09:37AM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 16, 2016

Near-Threshold Computing https://t.co/KUUFizDja3 #papers


from Twitter https://twitter.com/wladek60

June 16, 2016 at 02:37PM
via IFTTT
Posted by at No comments:
Labels: ,

A practical guide to SOI by Incize https://t.co/9JPT9AbwT1 #papers


from Twitter https://twitter.com/wladek60

June 16, 2016 at 08:43AM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 15, 2016

[mos-ak] [Final Program] International MOS-AK Workshop Shanghai June 26-28 2016

 International MOS-AK Workshop
 Shanghai, June 26-28, 2016
 The Final MOS-AK Workshop Technical Program

 Together with the MOS-AK Honorary Committee: Xi Wang (SIMIT), Tzu-Yin Chiu, (SMIC),  Ming-Kai Tsai, (MediaTek SRC/CMC), the Extended MOS-AK TPC Committee as well as local organizers Min Zhang (SIMTAC) and Eva Tu (SIMTAC), we have pleasure to invite to the MOS-AK Workshop which will be held in Shanghai between June 26-28, 2016. The MOS-AK workshop is organized with aim to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. In addition, on June 26, 2016, dedicated compact modeling/characterization tutorial courses are also prepared for all workshop attendees.

Venue:   
865 Changning Road, Building No. 5, on the 3rd Floor, 
Conference Hall,
Changning District, Shanghai (CN)

Online Workshop Registration:
<http://www.simtac.org/?p=156&lang=zh>
(or contact MOS-AK Workshop Secretary: Eva Tu (Shanghai) <wanv.tu@simtac.org>)

The Workshop Agenda and its Program is available online:
<http://www.mos-ak.org/shanghai_2016/>
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG15062016
--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To post to this group, send email to mos-ak@googlegroups.com.
Visit this group at https://groups.google.com/group/mos-ak.
For more options, visit https://groups.google.com/d/optout.
Posted by at No comments:

[mos-ak] [Final Program] International MOS-AK Workshop in Shanghai on June 26-28, 2016

 International MOS-AK Workshop
 Shanghai, June 26-28, 2016
 The Final MOS-AK Workshop Technical Program

 Together with the MOS-AK Honorary Committee: Xi Wang (SIMIT), Tzu-Yin Chiu, (SMIC),  Ming-Kai Tsai, (MediaTek SRC/CMC), the Extended MOS-AK TPC Committee as well as local organizers Min Zhang (SIMTAC) and Eva Tu (SIMTAC), we have pleasure to invite to the MOS-AK Workshop which will be held in Shanghai between June 26-28, 2016. The MOS-AK workshop is organized with aim to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. In addition, on June 26, 2016, dedicated compact modeling/characterization tutorial courses are also prepared for all workshop attendees.

Venue:   
865 Changning Road, Building No. 5, on the 3rd Floor, 
Conference Hall,
Changning District, Shanghai (CN)

Online Workshop Registration:
<http://www.simtac.org/?p=156&lang=zh>
(or contact MOS-AK Workshop Secretary: Eva Tu (Shanghai) <wanv.tu@simtac.org>)

The Workshop Agenda and its Program is available online:
<http://www.mos-ak.org/shanghai_2016/>
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG15062016
--
You received this message because you are subscribed to the Google Groups "mos-ak" group.
To unsubscribe from this group and stop receiving emails from it, send an email to mos-ak+unsubscribe@googlegroups.com.
To post to this group, send email to mos-ak@googlegroups.com.
Visit this group at https://groups.google.com/group/mos-ak.
For more options, visit https://groups.google.com/d/optout.
Posted by at No comments:

[book] Compact Models for Integrated Circuit Design

 Compact Models for Integrated Circuit Design: 
 Conventional Transistors and Beyond
 Samar K. Saha
Taylor & Francis, 26 Aug 2015 - Technology & Engineering - 545 pages - ISBN 9781482240665

Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond provides a modern treatise on compact models for circuit computer-aided design (CAD). Written by an author with more than 25 years of industry experience in semiconductor processes, devices, and circuit CAD, and more than 10 years of academic experience in teaching compact modeling courses, this first-of-its-kind book on compact SPICE models for very-large-scale-integrated (VLSI) chip design offers a balanced presentation of compact modeling crucial for addressing current modeling challenges and understanding new models for emerging devices.
Starting from basic semiconductor physics and covering state-of-the-art device regimes from conventional micron to nanometer, this text:
  • Presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models
  • Discusses the major issue of process variability, which severely impacts device and circuit performance in advanced technologies and requires statistical compact models
  • Promotes further research of the evolution and development of compact models for VLSI circuit design and analysis
  • Supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices
  • Includes exercise problems at the end of each chapter and extensive references at the end of the book

Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond is intended for senior undergraduate and graduate courses in electrical and electronics engineering as well as for researchers and practitioners working in the area of electron devices. However, even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts from this book. [more...]
Posted by at No comments:
Labels: , , , , ,

Jun 13, 2016

Programme of the 4th Training Course on Compact Modeling

The 4th Training Course on Compact Modeling (TCCM) will take place in Tarragona (Catalonia, Spain) from June 27 to 28 2016.

The 4th TCCM is partially sponsored by the DOMINO EU H2020 project. It will consist a series of lectures conducted by prestigious researchers in the field of modeling of semiconductor devices, dealing with several issues related to the semiconductor device modeling, mostly compact/SPICE modeling. It is a very interesting event to PhD students and young researchers, but can interest senior researchers too. These lectures will be conducted by top experts in the field. 

No doubt the 4th TCCM will be useful to researchers working on compact modeling, but also to researchers working on circuit design, numerical modeling, device characterization and semiconductor device technology.

TCCM is organized by the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV), in Tarragona. The General Chair of TCCM is Prof. Benjamin Iñiguez, who is also the Coordinator of the DOMINO project.

Programme of TCCM:

June 27 2016
8:30
Opening
Benjamin Iñiguez (Universitat Rovira i Virgili)
8:55
"Compact modeling for biological applications".
Morgan Madec (Université de Strasbourg, France)
10:05
"TCAD and semiclassical device modeling"
 Christoph Jungemann (RWTH-AAchen, Germany)
11:15
Coffe Break
11:40
"Modeling and experimental verification of mechanical stress effects in  ultra-thin Si MOSFET devices integrated into flexible packages. "
Heidrun Alus (AdMOS GmbH, Germany)
12:50
"Device simulation for Organic Electronics using GENIUS"
Heinz Olav Müller (Plastic Logic GmbH, Germany))
14:00
Lunch
15:15
"TCAD for compact model development"
Ahmed Nejim (Silvaco Europe Ltd. , UK)
16:25
"Modelling of Amorphous-Oxide-Semiconductors TFTs for large-area flexible electronics"
Fabrizio Torricelli (University of Brescia, Italy)
20:30
Gala Dinner


June 28 2016
8:45-14:00  Mini-Colloquium on Compact Modeling and Parameter Extraction
8:45
"An Integrated Approach for Circuit Performance and Reliability Simulation"
Mansun Chan (Hong Kong University of Science and Technology)
9:55
"Static and dynamic characterization of SiC based MOSFETs/IGBTs"
Muhammad Nawaz (ABB Sweden)
11:05
Coffee Break
11:30
“Model parameter extraction”
Antonio Cerdeira (CINVESTAV Mexico)
12:50
"Compact modeling for AlGaN/GaN HEMTs"
Benjamin Iñiguez (URV)
14:00
Lunch
15:15
"Application of compact models for organic circuit design"
Eugenio Cantatore (TU-Eindhoven, The Netherlands)
16:25
« Mathematical and Semi-physical compact modeling for emerging technologies”
Firas Mohamed (Infiniscale, France)
17:35
End of the Training Course

Besides, on June 29 1016, the  Workshop on Flexible Electronics (WFE) will take place in Tarragona, too. Attendees to TCCM who work on Flexible Electronics (not necessarily modeling) will have a chance to present recent results on their own. But WFE is open to all researchers.


Registration to both events is open. It is possible to register only to TCCM, or only to WFE or to both. It is quite cheap, in partular for students, and includes lunches, coffee breaks, and in the case of TCCM, a gala dinner.

Finally, on June 30-July 1 the Annual Graduate Student Meeting on Electronic Engineering will be held, consisting of plenary talks by prestigious researchers and student presentations. Registration is free.



I encourage researchers on semiconductor devices and circuit design to attend TCCM!

Posted by at No comments:

Jun 11, 2016

Modeling and simulation of nanomagnetic logic with cadence virtuoso using Verilog-A https://t.co/J8R9fcdtDu #papers #feedly


from Twitter https://twitter.com/wladek60

June 11, 2016 at 01:22PM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 8, 2016

Improved modeling of GaN HEMTs for predicting thermal and trapping-induced-kink effects https://t.co/YanqSVXH3q #papers #feedly


from Twitter https://twitter.com/wladek60

June 08, 2016 at 01:44PM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 6, 2016

A novel approach for the modeling of HEMT high power device https://t.co/rDLgFItU1g #papers #feedly


from Twitter https://twitter.com/wladek60

June 06, 2016 at 06:38PM
via IFTTT
Posted by at No comments:
Labels: ,

Jun 2, 2016

A new constituent of electrostatic energy in semiconductors

 A new constituent of electrostatic energy in semiconductors
 An attempt to reformulate electrostatic energy in matter
 
 Swiss Federal Institute of Technology Lausanne Switzerland 

Received: 30 October 2015
Received in final form: 29 January 2016
Published online: 1 June 2016

Eur. Phys. J. B, 89 6 () 136
DOI: http://dx.doi.org/10.1140/epjb/e2016-60865-4

Abstract: The concept of electric energy is revisited in detail for semiconductors. We come to the conclusion that the main relationship used to calculate the energy related to the penetration of the electric field in semiconductors is missing a fundamental term. For instance, spatial derivate of the electrostatic energy using the traditional formula fails at giving the correct electrostatic force between semiconductor based capacitor plates, and reveals unambiguously the existence of an extra contribution to the standard electrostatic free energy. The additional term is found to be related to the generation of space charge regions which are predicted when combining electrostatics with semiconductor physics laws, such as for accumulation and inversion layers. On the contrary, no such energy is needed when relying on electrostatics only, as for instance when adopting the so-called full depletion approximation. The same holds for neutral and charged insulators that are still consistent with the customary definition, but these two examples are in fact singular cases. In semiconductors for instance, this additional energy can largely exceed the energy gained by the dipoles, thus becoming the dominant term. This unexpected result clearly asks for a generalization of electrostatic energy in matter in order to reconcile basic concepts of electrostatic energy in the framework of classical physics.

Keywords: Solid State and Materials

© The Author(s) 2016. This article is published with open access at Springerlink.com
Posted by at No comments:
Labels: , , ,

May 27, 2016

Workshop on Flexible Electronics

The Workshop on Flexible Electronics (WFE) will be held on June 29 2016 in Tarragona (Catalonia, Spain) in combination with the 4th Training Course on Compact Modeling (TCCM, June 27-28).

 The Workshop on Flexible Electronics (WFE) will provide a forum for discussions and current trends and practices on Flexible Electronics, including materials, technology, device characterization, device modeling and circuit design.  The WFE workshop is organized by the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV), in Tarragona and the Fundació Universitat Rovira i Virgili (FURV), and is co-sponsored by the EU-funded DOMINO projecct and the Spanish Thematic Network REFLEXIO.  

 The General Chair of WFE is Prof. Benjamin Iñiguez, who is also the Coordinator of the DOMINO project.

  A partial list of the areas of interest includes:
  • Organic and Flexible Photovoltaic device technologies
  • Organic and Flexible LED technologies
  • TFT technologies for Flexible and Printed Electronics
  • Interconnects in Flexible Electronics
  • Physics, characterization and modeling of devices for Flexible Electronics
  • Circuit design for Flexible and Printed Electronics
The deadline for a 500 word abstract submission is May 29 2016.

Attendees to TCCM who work on Flexible Electronics (not necessarily modeling) will have a chance to present recent results on their own. But WFE is open to all researchers.

Besides, attending TCCM can be of interest to potential WFE participants, since several TCCM lectures target modeling issues of devices for Flexible Electronics (in particular, Thin-Film Transistors), or modeling aspects that can be applied to many semiconductor devices.

Registration to both events is open. It is possible to register only to WFE, or only to TCCM or to both. It is quite cheap, in partular for students, and includes lunches, coffee breaks, and in the case of TCCM, a gala dinner.

Finally, on June 30-July 1 the Annual Graduate Student Meeting on Electronic Engineering will be held, consisting of plenary talks by prestigious researchers and student presentations. Registration is free.

Tarragona is about 100 Km south from Barcelona, on the coast (the so-called "Costa Daurada", Golden Coast). Traveling to Tarragona from Barcelona is easier. There are frequent direct buses between Tarragona and Barcelona Airport, and also frequent trains between Tarragona and Barcelona. Besides, from some European cities it is possible to fly to Reus Airport, which is about 10 Km from Tarragona.

Tarragona is one of the most  important hubs of tourism in Europe, not only because of the nice beaches around the city, but also because of its historical landmarks.. Tarragona was a very important city of the Roman Empire. In 2000 UNESCO committee officially declared the Roman archaeological complex of Tarraco (name of Tarragona during the Roman Empire) a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.

I encourage researchers on  Flexible Electronics to send abstracts to  WFE!
Posted by at No comments:

4th Training Course on Compact Modeling

The 4th Training Course on Compact Modeling (TCCM) will take place in Tarragona (Catalonia, Spain) from June 27 to 28 2016.

The 4th TCCM is partially sponsored by the DOMINO EU H2020 project. It will consist a series of lectures conducted by prestigious researchers in the field of modeling of semiconductor devices, dealing with several issues related to the semiconductor device modeling, mostly compact/SPICE modeling. It is a very interesting event to PhD students and young researchers, but can interest senior researchers too. These lectures will be conducted by top experts in the field. 

No doubt the 4th TCCM will be useful to researchers working on compact modeling, but also to researchers working on circuit design, numerical modeling, device characterization and semiconductor device technology.

TCCM is organized by the Department of Electronic, Electrical and Automatic Control Engineering (DEEEiA) of the Universitat Rovira i Virgili (URV), in Tarragona. The General Chair of TCCM is Prof. Benjamin Iñiguez, who is also the Coordinator of the DOMINO project.

Invited TCCM Lecturers:
  • Morgan Madec (Univ of Strasbourg, France): Compact modeling for biological applications
  • Mansun Chan (Hong Kong University of Science and Technology): An Integrated Approach for Circuit Performance and Reliability Simulation
  • Mohammed Nawaz (ABB Sweden): Static and dynamic characterization of SiC based MOSFETs/IGBTs
  • Christoph Jungemann (RWTH-Aachen): TCAD and semiclassical device modeling
  • Antonio Cerdeira (CINVESTAV, Mexico): Model parameter extraction techniques
  • Fabrizio Torricelli (Univ. of Brescia, Italy): Modelling of Amorphous-Oxide-Semiconductors TFTs for large-area flexible electronics
  • Eugenio Cantatore (TU-Eindhoven): Application of compact models for organic circuit design
  • Ahmed Nejim (Silvaco): TCAD for compact model development
  • Firas Mohammed (Infiniscale): Mathematical and Semi-physical compact modeling for emerging technologies
  • Heinz Olaf Müller (Plastic Logic): Device simulation for Organic Electronics using Genius
  • Heidrun Alus (AdMOS GmbH, Germany): Modeling and experimental verification of mechanical stress effects in  ultra-thin Si MOSFET devices integrated into flexible packages
  • Benjamin Iñiguez: Compact modeling of AlGaN/gaN HEMT devices 

Besides, on June 29 1016, the  Workshop on Flexible Electronics (WFE) will take place in Tarragona, too. Attendees to TCCM who work on Flexible Electronics (not necessarily modeling) will have a chance to present recent results on their own. But WFE is open to all researchers.


Registration to both events is open. It is possible to register only to TCCM, or only to WFE or to both. It is quite cheap, in partular for students, and includes lunches, coffee breaks, and in the case of TCCM, a gala dinner.


Finally, on June 30-July 1 the Annual Graduate Student Meeting on Electronic Engineering will be held, consisting of plenary talks by prestigious researchers and student presentations. Registration is free.

Tarragona is about 100 Km south from Barcelona, on the coast (the so-called "Costa Daurada", Golden Coast). Traveling to Tarragona from Barcelona is easier. There are frequent direct buses between Tarragona and Barcelona Airport, and also frequent trains between Tarragona and Barcelona. Besides, from some European cities it is possible to fly to Reus Airport, which is about 10 Km from Tarragona.

Tarragona is one of the most  important hubs of tourism in Europe, not only because of the nice beaches around the city, but also because of its historical landmarks.. Tarragona was a very important city of the Roman Empire. In 2000 UNESCO committee officially declared the Roman archaeological complex of Tarraco (name of Tarragona during the Roman Empire) a World Heritage Site. This recognition is intended to help ensure the conservation of the monuments, as well as to introduce them to the broader international public.

I encourage researchers on semiconductor devices and circuit design to attend TCCM!


Posted by at No comments:

May 25, 2016

[Summer Tutorial] Verified Measurements for Successful Device Models

 Verified Measurements for Successful Device Models 
 at IHP in Frankfurt (Oder), June 15-17, 2016 

Good electronic device modeling results depend directly on reliable, qualified and verified measurements. It is a known fact that problems with device models are – to a big part – rather due to measurement problems. Within the measurement chain of DC, Impedance (CV), S-Parameter, Nonlinear RF, and Noise, there are several challenges to overcome like device self-heating, contact resistance, max. applicable RF power, calibration, de-embedding etc.

IHP Summer Tutorial will take place at IHP in Frankfurt (Oder), June 15-17, 2016. It will cover in detail all these measurement domains, will explain the setups, the data verification methods, the traps to be avoided, and give best-practice recommendations and examples. It will be enhanced by live measurements in IHP’s measurement labs.

As a wrap-up, an introduction into device modeling, applying the qualified and verified measurements, will be given at the end.

Who should attend: Semiconductor manufacturing and measurement engineers, device modeling engineers, scientists and students working/interested in measurement techniques.


Posted by at No comments:
Labels: , , , , ,
Location: Frankfurt an der Oder, Germany

May 14, 2016

Charge-based compact analytical model for triple-gate junctionless nanowire transistors https://t.co/UW5FtHzp4G #papers #feedly


from Twitter https://twitter.com/wladek60

May 14, 2016 at 10:05AM
via IFTTT
Posted by at No comments:
Labels: ,

May 12, 2016

Europe-wide plastic microelectronics project

A research group of THM is operating in a Europe-wide joint project on the development of electronic circuits made of plastics. Head of the project at the THM is Prof. Dr. Alexander Klös of the competence center nanotechnology and photonics. Partners are the Spanish Universitat Rovira i Virgili, the École Polytechnique in Palaiseau France and the University of Cambridge in England.

The research projec are also participating two research institutes in France and the Netherlands and three software companies. The European Union funded the project with almost 750,000 euros to promote in particular the exchange of researchers between the participating institutions. 

Organic semiconducting materials allow the production of electronic components by conventional printing methods such as silk screen or offset printing. This alternative is far less powerful than the classic silicon technology. However, it has advantages in certain application fields and is significantly cheaper. When using chip cards or electronic labels the reduced efficiency does not matter. The market research company IDTechEx expects in 2026 a growth of the global market volume for organic electronics from currently 26.5 to 69 billion US dollars [read more...]
Posted by at No comments:
Labels: , ,

May 10, 2016

#BOOK: Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology

 
Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology:
 Circuit Design, and Process Technology
 Luciano Lavagno, Igor L. Markov, Grant Martin, Louis K. Scheffer
 CRC Press, 27 Apr 2016 - Technology & Engineering - 786 pages, 2nd Edition

The second of two volumes in the Electronic Design Automation for Integrated Circuits Handbook, Second Edition, EDA for IC Implementation, Circuit Design, and TCAD thoroughly examines real-time logic (RTL) to GDSII (a file format used to transfer data of semiconductor physical layout) design flow, analog/mixed signal design, physical verification, and technology computer-aided design (TCAD). Chapters contributed by leading experts authoritatively discuss design for manufacturability (DFM) at the nanoscale, power supply network design and analysis, design modeling, and much more.

Recommended book sections:

SECTION II Analog and Mixed-Signal Design
Chapter 17: Simulation of Analog and RF Circuits and Systems (pp.417)
Jaijeet Roychowdhury and Alan Mantooth
Chapter 18: Simulation and Modeling for Analog and Mixed-Signal Integrated Circuits (pp.455)
Georges G.E. Gielen and Joel R. Phillips
Chapter 19: Layout Tools for Analog Integrated Circuits and Mixed-Signal Systems-on-Chip: A Survey (pp.479)
Rob Rutenbar, John M. Cohn, Mark Po-Hung Lin, and Faik Baskaya

SECTION IV Technology Computer-Aided Design
Chapter 27: Process Simulation (pp.691)
Mark Johnson
Chapter 28: Device Modeling: From Physics to Electrical Parameter Extraction (pp.715)
Robert W. Dutton, Chang-Hoon Choi, and Edwin C. Kan
Chapter 29: High-Accuracy Parasitic Extraction (pp.745)
Mattan Kamon and Ralph Iverson



Posted by at No comments:
Labels: , ,

May 7, 2016

#papers Avalanche Microwave Noise Sources in Commercial 90-nm CMOS Technology https://t.co/pCIGdXmKQ9


from Twitter https://twitter.com/wladek60

May 07, 2016 at 12:43PM
via IFTTT
Posted by at No comments:
Labels: ,

May 4, 2016

Will Si SJ MOSFETs maintain their lead over GaN power devices? https://t.co/eEbFw1Mcvk #papers


from Twitter https://twitter.com/wladek60

May 04, 2016 at 06:58PM
via IFTTT
Posted by at No comments:
Labels: ,

May 3, 2016

4th Training Course on Compact Modeling

 4th Training Course on Compact Modeling 
 (TCCM) 
 in Tarragona on June 27-28 2016

The 4th TCCM is partially sponsored by the DOMINO H2020 project. It will consist a series of lectures conducted by prestigious researchers in the field of modeling of semiconductor devices, dealing with several issues related to the semiconductor device modeling, mostly compact/SPICE modeling. It is a very interesting event to PhD students and young researchers, but can interest senior researchers too.

Invited TCCM Lecturers:
  • Morgan Madec (Univ of Strasbourg, France): Compact modeling for biological applications
  • Mansun Chan (Hong Kong University of Science and Technology): An Integrated Approach for Circuit Performance and Reliability Simulation
  • Mohammed Nawaz (ABB Sweden): Static and dynamic characterization of SiC based MOSFETs/IGBTs
  • Christoph Jungemann (RWTH-Aachen): TCAD and semiclassical device modeling
  • Antonio Cerdeira (CINVESTAV, Mexico): Model parameter extraction techniques
  • Fabrizio Torricelli (Univ. of Brescia, Italy): Modelling of Amorphous-Oxide-Semiconductors TFTs for large-area flexible electronics
  • Eugenio Cantatore (TU-Eindhoven): Application of compact models for organic circuit design
  • Ahmed Nejim (Silvaco): TCAD for compact model development
  • Firas Mohammed (Infiniscale): Mathematical and Semi-physical compact modeling for emerging technologies
  • Heinz Olaf Müller (Plastic Logic): Device simulation for Organic Electronics using Genius
Besides, on June 29 1016, a Workshop on Flexible Electronics will be organized, too. Attendees to TCCM who work on Flexible Electronics (not necessarily modeling) will have a chance to present recent results on their own. 

Finally, on June 30-July 1 we will organize the Annual Graduate Student Meeting on Electronic Engineering, consisting of plenary talks by prestigious researchers and student presentations. 

[more about DOMINO H2020 project at ww.domino-rise.eu]

Posted by at No comments:
Labels: , , , ,
Location: Tarragona, Tarragona, Spain

Apr 29, 2016

CMOS-SOI-MEMS Uncooled Infrared Security Sensor With Integrated Readout https://t.co/FRVIoqutaL #papers #feedly


from Twitter https://twitter.com/wladek60

April 29, 2016 at 10:37PM
via IFTTT
Posted by at No comments:
Labels: ,

Realizing Efficient Volume Depletion in SOI Junctionless FETs https://t.co/F3sOQxVV30 #papers #feedly


from Twitter https://twitter.com/wladek60

April 29, 2016 at 09:52PM
via IFTTT
Posted by at No comments:
Labels: ,

Apr 27, 2016

Bipolar Resistive RAM Based on HfO2 : Physics, #Compact #Modeling, and Variability Control https://t.co/DEoGJpqLUA #papers


from Twitter https://twitter.com/wladek60

April 27, 2016 at 02:50PM
via IFTTT
Posted by at No comments:
Labels: ,

Bipolar Resistive RAM Based on HfO2 : Physics, #Compact #Modeling, and Variability Control https://t.co/DEoGJpqLUA #papers


from Twitter https://twitter.com/wladek60

April 27, 2016 at 02:50PM
via IFTTT
Posted by at No comments:
Labels: , ,

Apr 25, 2016

5 Eclipse tools for processing and visualizing data https://t.co/XNd6R5dQW3 #papers


from Twitter https://twitter.com/wladek60

April 25, 2016 at 08:56PM
via IFTTT
Posted by at No comments:
Labels: ,

Apr 23, 2016

Analytical Surface Potential and Drain Current Models of Dual-Metal-Gate Double-Gate Tunnel-FETs https://t.co/3hTmr2Kwmv #papers #papers


from Twitter https://twitter.com/wladek60

April 23, 2016 at 01:33PM
via IFTTT
Posted by at No comments:
Labels: ,

III–V Tunnel FET Model With Closed-Form Analytical Solution https://t.co/mExcthY64C #papers #feedly #papers


from Twitter https://twitter.com/wladek60

April 23, 2016 at 01:27PM
via IFTTT
Posted by at No comments:
Labels: ,

Apr 22, 2016

#Compact #Model for MetalOxide Resistive Random Access Memory With Experiment Verification https://t.co/DhlMo2ZenF #papers


from Twitter https://twitter.com/wladek60

April 22, 2016 at 05:53PM
via IFTTT
Posted by at No comments:
Labels: , ,

Physically Based Compact Mobility Model for Organic Thin-Film Transistor https://t.co/2iRX20ogJL #papers


from Twitter https://twitter.com/wladek60

April 22, 2016 at 06:39PM
via IFTTT
Posted by at No comments:
Labels: ,

#Compact #Model for MetalOxide Resistive Random Access Memory With Experiment Verification https://t.co/DhlMo2ZenF #papers


from Twitter https://twitter.com/wladek60

April 22, 2016 at 05:53PM
via IFTTT
Posted by at No comments:
Labels: ,

Apr 21, 2016

SPICE models for Precision DACs https://t.co/evOjXzJZYd #papers


from Twitter https://twitter.com/wladek60

April 21, 2016 at 08:20PM
via IFTTT
Posted by at No comments:
Labels: ,
Subscribe to: Posts (Atom)