May 8, 2009
TNT'09
TNT aims to present a broad range of top research in Nanoscience and Nanotechnology worldwide as well as related policies (European Commission, etc.) and initiatives (iNANO, IEEE, GDR-E, FinNano, etc.). TNT events have shown that they are particularly instrumental to disseminate information and establishing contacts among researchers in this field. Graduate students attending TNT have the chance to learn the importance of interdisciplinary skills, thereby becoming more effective in their future research.
TNT conferences provide an ideal venue for industrial, academic and governmental organizations to discuss common objectives and drive the commercialisation of nanotechnology discoveries.
One of the main goals of the Trends in Nanotechnology conference is to provide a platform where young researchers can present their latest work and also interact with high-level scientists. For this purpose, the Organising Committee provides every year travel grants for students. In addition, more than 20 awards are given to young PhD students for their contributions presented at TNT.
This year, TNT2009 organisation will provide around 100 graduate grants for PhD students:
- 10 Basque Country graduate grants (covering student fee) sponsored by NanoBasque / 325 Euros each - on the basis first come / first served
- 10 European graduate grants (travel bursaries) sponsored by GDR-I (topic of research: Nanotubes & Graphene) / 300 Euros each
- 40 nanoaracat graduate grants sponsored by nanoaracat:
-20 graduate grants for Aragon (travel bursaries) / 250 Euros each
-20 graduate grants for Cataluña (reduced fee) / student fee: 175 Euros (instead of 325)**after notification, a specific registration form will be available online to be able to register with the specific reduced fee.
- 20 Canadian PhD students: 1000 Canadian dollars travel-ship grants
- 20 graduate grants (travel bursaries) sponsored by TNT2009 organisation / 150 Euros each
The TNT2009 Organisation will also provide awards to the best posters presented by students
TNT2009 Deadlines:
Abstract Submission (Oral request): May 11,
2009 Student Grant (Travel bursary) Request: May 11, 2009
Submission (Poster request): July 20, 2009
Weather is usually very nice in Barcelona during the first half of September. Warm enough to go to the nice beaches that are at the city, or close to it, and swim on the sea. And not too hot to walk around.
IEEE SCV EDS upcoming meetings
- EDS Meeting “Power and Variability”- May 12th (Tue)
- Joint EDS-CPMT meeting “Through-Si vias” – May 13th (Wed)
- EDS Meeting “NBTI in PMOS”- June 9th (Tue)
May 7, 2009
ICECS'09, Dec. 13-16 2009, Hammamet, Tunisia
The IEEE International Conference on Electronics, Circuits, and Systems (ICECS) is the flagship conference of the IEEE Circuits and Systems (CAS) Society in region 8 (Europe, Middle East and Africa). It presents design methodologies, techniques and experimental results in emerging electronics, circuits and systems topics. ICECS 2009 will include tutorials, regular sessions (lecture and poster), Special sessions and exhibitions.
May 6, 2009
MIT OpenCourseWare
visit: MIT OpenCourseWare
May 5, 2009
[EDN] Andy Grove, Gordon Moore, other engineers honored by National Inventors Hall of Fame
By Suzanne Deffree, Managing Editor, News -- Electronic News, 5/4/2009
Andy Grove and Gordon Moore were among a chosen few honored at the 2009 National Inventors Hall of Fame induction ceremony held on Saturday (May 2, 2009) at the Computer History Museum in Mountain View, Calif., USA.
The annual induction ceremony was held in Silicon Valley for the first time in celebration of 50 years of the IC and to honor 15 new inductees who have made significant contributions related to or enabled by semiconductors.
As credited by the National Inventors Hall of Fame, this year's 15 new inductees included:
Martin M (John) Atalla and Dawon Kahng, who worked to invent the first practical field-effect transistor;
Alfred Y Cho, who is credited as having achieved molecular beam epitaxy while at Bell Labs;
Ross Freeman, the co-founder of Xilinx who is credited as having invented the FPGA;
Dov Frohman-Bentchkowsky of Intel and founder of Intel Israel, who is credited as having created the EPROM (electrically programmable read-only memory) chip;
George Heilmeier, a liquid crystal display pioneer, former White House fellow, and former Texas Instruments CTO;
Jean Hoerni, co-founder of Fairchild Semiconductor and one of the Fairchild Eight, who is credited as having invented the planar manufacturing process;
Texas Instruments' Larry Hornbeck, who holds a series of patents that form the foundation for the digital micromirror device;
John Macdougall and Ken Manchester, who worked together to develop a commercially viable method of ion implantation;
Carver Mead, a professor emeritus at Caltech who helped to develop the standards and tools that permitted VLSI (very large-scale integration);
Gordon Moore, co-founder of both Fairchild and Intel and the author of Moore’s Law;
Gordon Teal, who is credited as having created the first functioning silicon transistor while at Texas Instruments;
Frank Wanlass, who is credited as having invented CMOS; and
Robert Widlar, who is credited with having designed the first commercially successful analog IC and who also co-founded Linear Technology Corp.
Andy Grove, who with Moore and Robert Noyce participated in the founding of Intel in 1968, was honored with the National Inventors Hall of Fame's Lifetime Achievement Award during the ceremony. Grove (pictured) was chairman of Intel's board from May 1997 to May 2005. From 1987 to 1998 he served as the company’s CEO and from 1979 to 1997 he served as president. Grove currently acts as a senior advisor to Intel.
The National Inventors Hall of Fame said it chose to honor Grove’s tenure because while at Intel's helm the company "dramatically contributed to the power, utility, and ubiquity of computing devices."
“The world we live in today is scarcely imaginable without the contributions of Andy Grove and all 15 of this year’s inductees,” said James Pooley, chairman of the National Inventors Hall of Fame, in a statement. “So many of the technologies we take for granted nowadays, including everyday consumer electronics like cell phones, computers, and DVD players, rely on semiconductor technologies that only exist thanks to their hard work and spirit of invention.”
Grove reportedly discussed patent laws and their impact on innovation at the event.
The National Inventors Hall of Fame is a not-for-profit organization dedicated to honoring and fostering creativity and invention. Headquartered in Akron, Ohio, it was founded in 1973 by the US Patent and Trademark Office and the National Council of Intellectual Property Law Associations.
ICOE'09
Just 7 weeks to go. The icoe shop is now live and open so that you can now register and the provisional programme has been organised (attached). The icoe registration fee is £270 while Ph.D. students are free. The oral/poster provisional programme is on the website as well as accommodation details. There is a Liverpool football club Tour and museum taking place on Wednesday afternoon (17th June) at a cost of £10 per person while an organic roadmap talk/discussion is taking place at the same time. Further details and information can be found on the web site http://www.icoe09.com
Apr 29, 2009
4th Silicon Saxony Day
- Photovoltaic
- MEMS – Sensors – Photonic
- Smart Electronics and Applications
- Services and Networking
- SATNAV Saxony Kick-off Meeting
- Cool Silicon Kick-off Meetings
IEEE Papers in April 2009
A Compact Model for Undoped Silicon-Nanowire MOSFETs With Schottky-Barrier Source/Drain
Zhu, G.; Zhou, X.; Lee, T. S.; Ang, L. K.; See, G. H.; Lin, S.; Chin, Y. K.; Pey, K. L.
Abstract
Metal-Gate FinFET Variation Analysis by Measurement and Compact Model
O'uchi, S.; Matsukawa, T.; Nakagawa, T.; Endo, K.; Liu, Y.; Sekigawa, T.; Tsukada, J.; Ishikawa, Y.; Yamauchi, H.; Ishii, K.; Suzuki, E.; Koike, H.; Sakamoto, K.; Masahara, M.
Abstract
2009 IEEE RFIC Symposium Boston, Massachusetts June 7-9, 2009
Conference highlights are now online!
- Plenary talks
- Christopher Snowden, Ph.D., Vice-Chancellor and CEO of the Uni Surrey, Guildford, UK,
“Cost-effective Semiconductor Technologies for RF and Microwave Applications.” - George W. Everhart, CEO of Alien Technology Corporation
“Real world RFID Deployments: What Makes Them Work.” - Workshops
- Panel Sessions
For all the details, please check the program book.
Apr 22, 2009
IMEC presented 22nm CMOS SRAM 0.099µm2 cell:
Further information on IMEC can be found at www.imec.be
Apr 18, 2009
IBM 28nm CMOS Technology
>>> Press releases
Apr 17, 2009
Process for the Selection of the Next Generation Multigate Compact Models
- Model pre-evaluation (reference data, test circuits, etc)
- Physical model accuracy evaluation
- Model functionality in IC simulation
- Formal CMC balloting
CMOS vs. Bipolar Operational Amplifiers: Which is best for my application?
- Power Consumption
- Voltage Offset
- Noise Performance
Apr 16, 2009
Process for the Selection of the Next Generation SOI MOSFET Compact Models
The Compact Modeling Council (CMC) is carrying out Process for the Selection of the Next Generation SOI MOSFET Compact Models.
The CMC is going to select SOI models for both partially-depleted (PD) and dynamic depletion (DD) applications. DD refers to SOI devices which exhibit PD behavior forsome bias regions, but are fully-depleted (FD) for others.
The selected model developers presented their models in the to the CMC Meeting in Boston, MA on 6/5/2008.
The selected developers were : PSP-SOI-PD (for PD SOI), HiSIM SOI (for PD/DD SOI), XSIM (for DD SOI), ULTRA-SOI (for DD SOI) and PSP-SOI-DD
OKIsemi is sponsoring HiSIM SOI, FSL is sponsoring PSP-SOI-DD and IBM is sponsoring PSP-SOI-PD.
Developers are currently carrying out the required tests.
MIGAS'09
MIGAS 2009 will take place in Autrans (French Alps) from June 20 to 26 2009.
MIGAS is addressed to PhD students, engineers and researchers coming both from the university and from industry of the semiconductors.
The attendees will be able to improve their knowledge on nanoelectronic devices by means a set of lectures conducted by top international scientists.
The scienfific programme will consists of the following lectures:
1) Introduction to SOI
- What is SOI ?, J.P. Colinge, Tyndall (confirmed)
- SOI zoo
- Technology modules
2) SOI Material
- Smart-Cut and beyond, L. Clavelier(confirmed)
- SOI zoo
3) SOI transistors device physics
- Mechanisms in PDSOI and FDSOI devices, O. Faynot, Leti (confirmed)
- Transport in double-gate and nanowire MOSFET, T. Hiramoto, University of Tokyo (confirmed)
- Quantum and tunneling SOI devices, A. Zaslavsky,USA (confirmed)
- Advanced simulation, F. Gamiz, UGR (confirmed)
4) Electrical characterization and reliability
- Advanced techniques for material and device characterization, S. Cristoloveanu,IMEP-LAHC (confirmed)
- Radiation effect and reliability, R. Schrimpf, USA (confirmed)
- How SOI can solve variability issues ?, A. Asenov, Glasgow University (confirmed)
5) Designing SOI circuits
- SOI circuit design plateform, P. Flatresse,STMicroelectronics (confirmed)
- Radiation effect and reliability, R. Schrimpf, USA (confirmed)
- How SOI can solve variability issues ?, A. Asenov, Glasgow University (confirmed)
Besides, MIGAS includes a great social programme, with activities such as excursions the day before the beginning of the school, wine tastings, and copious dinners based on the excellent Dauphinoise and Vercors cuisine, and with great wines. Of course, the area around Autrans offers excellent opportunities for hiking, mountaineering, mountain-biking, lake swimming and more.
Registration includes accomodation in the resort as well as all meals.
Second International Symposium on Organic Semiconductor Materials, Devices and Processing
E9) will be held during the 216th ECS Meeting in Vienna, Austria. It will be the second
symposium in this series and the objective is to link processing and materials studies to devices
and technological applications. The symposium will cover a wide range of topics related to
broadly understood science and technology of organic/polymeric semiconductor materials,
processes, devices and applications. The list of topics of interests includes, but is not limited to,
the following:
• Chemistry of organic semiconductors and its impact on material and device characteristics;
organic and polymer semiconductors
• Physical phenomena underlying operation of organic/polymeric semiconductor devices
• Deposition methods: PVD, solution processing, printing and others
• Substrates: conductive and non-conductive, mechanically rigid and flexible
• Electronic devices: TFTs; ohmic contacts, dielectric-organic semiconductor material systems,
charge transport, modeling
• Photonic devices: light emitting diodes and solar cells
• Display and lighting applications
• Patterning of organic semiconductors to create desired device geometries
• Large area organic semiconductor electronics and photonics; roll-to-roll processing
• Reliability, stability, reproducibility of device characteristics
a one-page abstract must be
submitted electronically to ECS by 24 April 2009. A copy of the abstract must also be submitted
to the lead symposium organizer Prof. Jamal Deen, and be accompanied by a cover letter with full
contact details of the presenting author. This abstract should clearly indicate the purpose of the
work, the approach, the manner and the degree to which the work advances the field, and specific
results and their significance. All submitted abstracts will be peer-reviewed. Instructions for
preparing ECS meeting abstract and other relevant information are available on the ECS World
Wide Web Home Page at http://www.electrochem.org. Any additional information can be
obtained from the symposium organizers listed below.
M. Jamal Deen, McMaster University, Electrical and Computer Engineering Department (CRL 226), 1280
Main Street West Hamilton, ON L8S 4K1, Canada. Tel: (905) 525-9140 ext. 27137, Fax: (905) 523 4407,
E-mail: jamal@mcmaster.ca
David Gundlach, National Institute of Standards and Technology , Semiconductor Electronics Division
(Bldg. 225, Room A369, M.S. 8120), 100 Bureau Drive, Gaithersburg, MD 20899-8120 USA. Tel: (301)
975-2048; Fax: (301) 975-8069, Email:David.Gundlach@NIST.gov
Benjamin Iñiguez, Department of Electronic Engineering, Universitat Rovira i Virgili, Avda. Països Catalans, 26, 43007 Tarragona-Spain. Tel: +34 977 558 521, Fax: +34977559605, Email:
benjamin.iniguez@urv.cat
Hagen Klauk, Max Planck Institute for Solid State Research, Heisenbergstr. 1, 70569 Stuttgart, Germany.
Tel: +49 711 689-1401; Fax: +49 711 689-1472; E-mail: H.Klauk@fkf.mpg.de
Apr 15, 2009
7th IEEE EWDTS SYMPOSIUM
Symposium Deadlines:
- Submission deadline: May 30th, 2009
- Notification of acceptance: August 1st, 2009
Apr 14, 2009
Olympics of semiconductors
(source: Nikkei Electronics Asia -- April 2009)
“Living with Variability” - Are You Ready?
- How to understand and manage variability impact at 45nm and below?
- What impact does variability have on interfacing the Foundry?
- How will the industry characterise and model variability?
Apr 12, 2009
36th Birthday Party for SPICE
http://signal-integrity-tips.com/2009/circuit-simulation-part-one-spice-turns-thirty-six/
Apr 11, 2009
MOS-AK/GSA Frankfurt(O) meeting on-line publications
http://www.mos-ak.org/frankfurt_o
http://www.mos-ak.org/frankfurt_o/posters.php
Together with the IHP Team we have also issued the press release:
"Europäische Experten beraten zu konkreten Problemen der Beschreibung von
CMOS Bauelementen "
http://www.ihp-microelectronics.com/fileadmin/press/PM_AK_MOS020409.pdf
(an English version will be available soon)
in the meantime, read info about coming modeling events:
* Munich: June 2-3, http://www.gsaietsemiconductorforum.com/
* Warsaw: June 22-24, http://www.dy.imio.pw.edu.pl/
* Lodz: June 25-27, http://www.mixdes.org/Special_sessions.htm
* Athens: Sept. 18, http://www.mos-ak.org/athens
==================================================
The Global MOS-AK/GSA CM Working Group Committee:
==================================================
North America: Pekka Ojala, Exar Corporation
South America: Gilson I Wirth; UFRGS; Brazil
Europe: Ehrenfried Seebacher, austriamicrosystems AG
Asia/Pacific: Al Kordesch, Silterra Malaysia
-=================================================
Apr 8, 2009
April 14, 2009: ESSDERC/ESSCIRC submission deadlines
Visit the conference web site: http://www.essderc2009.org
ESSDERC/ESSCIRC FRINGE POSTER SESSION
Athens Fringe Poster Session
Following a successful 'fringe' event during last Conference in Edinburgh, ESSCIRC and ESSDERC will be holding also a "fringe" event in addition to the main conference in Athens. The Fringe forum is ideally suited for the submissions of recent progress which may, in some cases, not be ready for a full paper submission. The emphasis of fringe submissions should be on the presentation of the latest data (both measurement and/or simulation) and new ideas. This forum provides the opportunity to network with the ESSDERC/CIRC community to discuss these ideas and latest results. Reviewing will be undertaken by a sub-committee under the main Technical Programme committee, and a separate proceedings will be published on CD for this event. To attract the latest results, submissions close at the later date of 12 June 2009. Submissions will be in the form of abstracts of one page of text and two pages of figures. Submission will be via the website fridge section, where further details can be found.
After MOS-AK at IHP in Frankfurt(O)
Mar 30, 2009
after Analogschaltungen'09 in Hannover
- Novel CMOS/BiCMOS circuit architectures for the GHz range applications
- Models of semiconductor devices for analog/RF (GHz range) applications
- Influences of the system design and optimization on the components in the analog circuit applications
- Classical and quantum mechanical effects in analog/RF nano-silicon circuits at GHz frequencies
- Prof. Dr. -Ing. Wolfgang Mathis, Leibniz Universität Hannover, Institut für Theoretische Elektrotechnik; Appelstr. 9A, 30167 Hannover
- Prof. Dr.rer. nat. Doris Schmitt- Landsiedel, TU MĂĽnchen; Lehrstuhl fĂĽr Technische Elektronik
- Prof. Dr. -Ing. Heinrich Klar, TU Berlin; Institut fĂĽr Technische Informatik und Mikroelektronik
- Prof. Dr.-Ing. Y. Manoli, Universität Freiburg; IMTEK
Mar 23, 2009
BOOK: Planar Double-Gate Transistor: From technology to circuit
Planar Double-Gate Transistor: From technology to circuit
Amara, Amara; Rozeau, Olivier (Eds.)
2009, VIII, 212 p., Hardcover
ISBN: 978-1-4020-9327-2
Online version available
Mar 21, 2009
SOI Technology Goes Mainstream
The unique characteristics of silicon on insulator are opening the door to new applications and the infrastructure needed to boost and support expanding markets.
Ruth DeJule, Contributing Editor -- Semiconductor International, 3/1/2009
Mar 19, 2009
MOS-AK/GSA Workshop: 2-3 April 2009 at IHP in Frankfurt /Oder
- Final program (COMON Project Meeting & MOS-AK Workshop)
- Free on-line registration
- Driving directions
NanoTech WCM 2009: Workshop on Compact Modeling
May 3-7, 2009
George R. Brown Convention Center
Houston, Texas, U.S.A.
Symposium Program http://www.nsti.org/Nanotech2009/WCM2009/
NB: Late News Abstracts Due: March 27th 2009 (POSTER Presentation Only)
Mar 15, 2009
ESSDERC'09
Due to its prestige, many researchers from outside Europe use to submit contributions to ESSDERC too.The main themes for original contributions to be submitted to ESSDERC'09 are:
-Advanced CMOS devices
-Processing and Integration
-Telecommunication and Power Devices
-Modeling and Simulation
-Characterization and Reliability
-Memories
,-MEMs, Sisplays and SoC
-Emerging non-CMOS Devices and Technologies.
This year, "Compact circuit modeling for devices and interconnects" is explicitly mentioned as one of the topics in the "Modeling and Simulation" theme.
The deadline for paper submission is April 4 2009.
ESSCIRC and ESSDERC also hold a "Fringe Poster Session" event in addition to the main conference in Athens. This Fringe forum is ideally adequate for the submissions of recent scientific progress which may, in some cases, not be ready for a full paper submission. This forum provides the opportunity to network with the ESSDERC/ESSCIRC community to discuss these ideas and latest results. Reviewing will be carried out by a sub-committee under the main Technical Programme committee, and a separate proceedings will be published on CD for this event. The deadline for submissions for the Fringe Poster Session will be 12 June 2009.
Besides, several related workshops will take place on September 19 2009 at the same location. One of them will be the Autumn MOS-AK Meeting on Compact Modeling.
And no doubt mid-September is a very nice time to visit Athens. Sunny and warm, but not too hot.
Mar 14, 2009
CICC'09
The paper submission deadline is April 21.
CICC 2009 will include technical paper presentations (both oral presentations and posters), panel discussions, educational sessions as well as topcial events and exhibits.
CICC is the premier conference devoted to IC development. It is the right conference to find out how to solve design problems and improve circuit design and design techniques
CICC 2009 will intend to show the latest developments in Compact Modeling, for the training of designers and to facilitate a close interaction between designers and compact model developers. It is a wonderful city with many other attractions: golf courses, wineries, and for hikers and nature lovers, the Alum Rock Park. Besides, San Jose, which is called the "Safest Big City in America", has an intense nightlife, with many dance clubs and sports bars.
Mar 11, 2009
TCAD Central
You can found all these things plus others, like some nice TCAD jokes (yes, it is actually possible to do jokes about that...) in http://www.tcadcentral.com ...
Thank you very much, Juan!
Mar 10, 2009
Exploration of (sub-) 45nm CMOS for Analog, RF and mm-wave Applications (ST-190)
The workshop highlights :
* Fully functional complex analog building blocks in FinFET technology (10 bit 300MS/s DAC, charge pump PLL)
* 5 GHz small band LNAs and DC-5 GHz wideband LNAs in planar bulk and FinFET technology
* 24 GHz LNA, VCO and Mixer for FinFET technology
* PSP-based compact model for FinFETs
* Optimization of the 1/f noise of high-k/metal gate planar bulk and FinFET transistors
* Optimized matching performance for narrow fin FinFET transistors
* ESD protection for FinFET circuits
Read more about the workshop pogram
The NANO-RF Project contact: Stefaan.Decoutere {@} imec.be
Mar 4, 2009
The 2009 IEEE ICMTS Program
Final ICMTS Program: http://www.see.ed.ac.uk/ICMTS/prog09.pdf
Mar 3, 2009
Device Research Conference 2009
DRC is one of the oldest conferences in the field of electron devices. Every year, DRC brings together top scientists, researchers and graduate students from both the industry and academia. Their latest research results are not only presented, but also frankly discussed. The fact that DRC is always held in one university encourages the exchange of creative ideas.
Student participation in DRC is always strong. Travel support for students is offered. Besides, there is a very prestigeous Best Student Paper Award.
The technical program will include oral and poster presentations as well as three rump sessions.
The deadline for abstract submission is March 9 2009.
A limited number of late news abstracts will be accepted for presentation at DRC'09. The deadline for late news abstracts is June 9 2009.
Topics include all aspects related to electronic and optoelectronic devices, including "modeling and simulation of devices". The Call for Papers indicates with detail the types of devices addressed. Even biological devices are mentioned.
A number of prestigeous researchers will give invited talks.
Finally, there will be an excellent social programme, as can be expected when a conference takes place in a university.
ICOE'09
The ICOE conference was created by means of the European Integrated Project called PolyApply, one of the major projects about organic electronics. It has become one of the main conferences on organic electronics.
ICOE covers all aspects of organic electronics including Materials and Chemistry, OTFTs, OLED, PV devices, device modeling, organic circuits and circuit design, manufacture as well as their inclusion in systems. Therefore, it can be a good conference to present papers about compact models of organic devices, since many organic circuit designers may attend ICOE.
The deadline for a 1-or 2-page abstract submission is March 27 2009.
The Conference Chair is Professor Bill Eccleston, from the University of Liverpool.
If you are working on organic electronics, I truly recommend you to attend this conference. The quality of contributions is very good. It has consolidated as the top European conference on Organic Electronics.
Call for ICREA Senior Research Positions in Catalonia
The successful candidates will have PERMANENT CONTRACTS and can work, as "ICREA Senior Researchers", at universities or research centers in Catalonia. They can choose the institution where they can work. Usually, Catalan institutions are very happy to have ICREA Senior Researchers, so they use to accept the candidate with pleasure.
ICREA Senior Researcher positions are very prestigeous at international level. The selection procedure is tough. Only very strong candidates with excellent leadership capabilities and an outstanding research record will be considered. It is recommended that the candidates have previously led big or ambitious research projects.
The salaries will be in line with those paid in Catalan universities for full professors. They are very good salaries. ICREA research professors will be subject to an evaluation of their research progress and general performance after a three-year period and subsequently every five years. The evaluations will be carried out by external evaluation committees that will assess scientific production as well as research activity. A positive evaluation will lead to a salary increase. So, salaries can be even better.
The candidates must submit:
1) A single .pdf file (maximum 4 Mb) containing the candidate's CV in English.
2) Two reference letters in English in .pdf or .doc format.
3) An expression of interest document from the host institution(s).
The candidate must directly contact each institution (university or research centre in Catalonia) that he/she is interested in and obtain the institution's acceptance. The host institution's expression of interest form must be downloaded directly by the institution using the link provided by the applicant. At the link, the institution will find the information needed to submit the form (both electronically and by post). The form must be received by ICREA before 2:00pm (local time) on Thursday, 16 April 2009.
The candidate may seek acceptance at more than one institution. In this case each institution must submit a separate expression of interest form to ICREA (both electronically and by post).
ALL THE DOCUMENTS MUST BE SUBMITTED IN ENGLISH. KNOWLEDGE OF THE CATALAN NOR THE SPANISH LANGUAGE ARE NECESSARY TO OBTAIN SUCH A POSITION.
Well, if a senior researcher in semiconductor device modelling is interested in applying for one of this position, I will be happy to host him/her in my University (Universitat Rovira i Virgili, in Tarragona, not far from Barcelona), in the Department of Electronic Engineering. We are the most powerful group in Catalonia in the area of device modelling, and one of the strongets teams in Europe in compact modeling. We participate in several European projects and we are leading the first European project on Compact Modeling. Besides, I obtained this year the ICREA Academia Award, a new award granted by ICREA to the best researchers working in Catalan universities.
So, if you are an outstanding researcher working on semiconductor device physics or modelling and if you are interested in those permanent, please contact me at:
I will be very happy to make the expression of interest from my institution!!!
Why not a permanent job as a senior researcher in a place with Tarragona, with a comfortable Mediterranean climate, with a very nice and interesting city life, with beaches and mountains, close to Barcelona but much cheaper, and working in a very strong research group, with young and motivated researchers?
Mar 2, 2009
International Conference on Organic Electronics'09
I copy the e-mail from Bill Eccleston, announcing the ICOE'09:
ICOE09 STOP PRESS
The Final Call for abstracts for ICOE(09) runs from 2nd March to 27th March 09 at
Among the invited talks are
Richard Friend (
Stephen Choe (
Jan Genoe (IMEC): Circuits and rfid
Jiro Kasahara ( just out of Sony)
Feb 27, 2009
MOS-AK/GSA merge
visit: EDA/Design Working Groups
Feb 26, 2009
MIXDES'09
I'd like to kindly remember you that the MIXDES Conference deadline is approaching, and that they have a special session on Compact Modelling... I paste here the relevant parts of the email from the Organizing Committee:
Due to some requests and to make this schedule less tight we would like to extend the deadline by one week, thus the paper the paper registrations and file uploads ready for scientific reviews should be completed till March 8th, 2009. Please note that the files for registered papers can be later updated till the final papers deadline (May 18th).
As the organising committee is willing to start reviewers assignment at the very beginning of March, I would like to kindly ask you to proceed with papers' basic data registration (the title, keywords, preliminary abstract) as soon as they are ready. It will be very helpful for us with the assignments. The file uploads can be completed till the deadline.
Spring MOS-AK Meeting at IHP in Frankfurt (Oder) // 2nd announcement
I post the mail from Wladek Grabinski:
Note that the MOS-AK is in Frankfurt oder, NOT in Frankfurt.... (see the distance in this gmaps link)
Please visit the MOS-AK/IHP Meeting web page
http://www.mos-ak.org/frankfurt_o/
with updated:
* April 2-3 meeting agenda
* Driving directions and recommended hoter
* New tentative list of the MOS-AK presenters
To register, use available Free On-line Registration form:
http://www.mos-ak.org/frankfurt_o/pre_register.php
*Important dates
* Final workshop program - March.21
* MOS-AK Workshop - April 2-3
* MOS-AK/IHP Committee
* Prof. Tillack Bernd, IHP; Meeting Chair
* Prof. Benjamin Iniguez Technical Program Chair
* Dr. Rene Scholz, IHP; Technical Program Chair
* Richter Christine, IHP; Executive Assistant
* Wladek Grabinski, GMC Suisse; Workshop Manager
Feb 19, 2009
Variations in Analog Design
If anybody has tested it, I'd like to read first-hand opinions....
Feb 18, 2009
Rising salaries in technological sector in 2009?
Anyway, the full article is here... What do you think?
Feb 10, 2009
1/f noise in (100) and (110) Si
They discuss the differences in both orientacions, and present some nice experimental results, with some theory explaining the differences. If you're interested in noise (other than pub music, I mean), perhaps this can interest you.
Jan 30, 2009
10.000 visits!!!
2009 Spring MOS-AK Meeting
--- Spring MOS-AK Meeting
--- April 2-3 2008 at IHP GmbH in Frankfurt (Oder)
--- 1st announcement
On behalf of the MOS-AK Organizing Committee, I would like to invite you to the MOS-AK Meeting to be held on April 2-3 at IHP in Frankfurt (Oder). Frankfurt (Oder) and, in particular, the IHP is the place where many electronics systems and semiconductor devices are designed and manufactured. The IHP has a large community of academic researchers and industrial practitioners who are eager to interact with the compact modeling world and EDA community. Moreover, thru it border location, the IHP bridges broad range of HiTech activities between Europe West and East.
The MOS-AK Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, create an open platform for information exchange related to compact/Spice modeling, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development, implementation, deployment and standardization within the
main theme - compact models for mainstream CMOS/SOI circuit simulation. The specific workshop goal will be to classify the most important directions for the future development of the compact models and to clearly identify areas that need further research. This workshop is designed for device process engineers (CMOS, SOI, BiCMOS, SiGe) who are interested in device modeling; ICs designers (RF/IF/Analog/Mixed- Signal/SoC) and those starting in that area as well as device characterization, modeling and parameter extraction engineers.
The content will be beneficial for anyone who needs to learn what is really behind IC simulation in modern device models. The technical program of MOS-AK Workshop consists of one day of tutorials given by noted academic and industry experts, also a poster session is foreseen. The meeting program will be available soon at: http://www.mos-ak.org
--- Tentative Agenda
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--- APRIL.2:
* COMON Project Meeting (morning)
* IHP tutorials and fab visit (afternoon)
* MOS-AK Networking Reception (evening)
--- APRIL.3:
* MOS-AK Meeting (all day)
* two session and poster briefing
--- Important dates:
--------------------
* 2nd MOS-AK announcement - Feb.21
* Final workshop program - March.21
* MOS-AK Workshop - April 2-3
Further information including recommended hotels and driving directions will be posted at our web site, soon; please visit regularly: http://www.mos-ak.org
--- Organizing Committee:
* Prof. Tillack Bernd, IHP; Meeting Chair
* Prof. Benjamin Iniguez Technical Program Chair
* Dr. Rene Scholz, IHP; Technical Program Chair
* Richter Christine, IHP; Executive Assistant
* Wladek Grabinski, GMC Suisse; Workshop Manager
Jan 23, 2009
A post in EDN: Simulation gets speed, capacity boost
"Spice remains only part of the simulation picture as designers add RF/wireless-communications capability to an increasing array of products. And even products that offer no RF/wireless features are exhibiting RF performance as process geometries shrink, digital speeds increase, and high-speed serial-I/O ports proliferate. Furthermore, in many cases, as frequencies rise and designers squeeze more functions into smaller and smaller spaces, chip and board design cannot occur in isolation; co-design and simulation of chip, chip package, and board must take place."
If you wish to read more (which I recommend), follow the link to EDN.
Jan 15, 2009
Papers in Solid-State Electronics
Surface potential equation for bulk MOSFET, by G. Gildenblat, Z. Zhu, and C.C. McAndrew... (Don't miss this one... it's short, but interesting, mainly for starters)
PSP-SOI: An advanced surface potential based compact model of partially depleted SOI MOSFETs for circuit simulations, by W. Wu, X. Li, G. Gildenblat, G.O. Workman, S. Veeraraghavan, C.C. McAndrew, R. van Langevelde, G.D.J. Smit, A.J. Scholten, D.B.M. Klaassen and J. Watts... this is another must, since it's the presentation in society of the latests efforts in SOI modelling of the PSP team!
Modeling short-channel effects in channel thermal noise and induced-gate noise in MOSFETs in the NQS regime, by Sunil Vallur and R.P. Jindal
A charge-based compact model for predicting the current–voltage and capacitance–voltage characteristics of heavily doped cylindrical surrounding-gate MOSFETs, by Feilong Liu, Jian Zhang, Frank He, Feng Liu, Lining Zhang, and Mansun Chan
Analytic resolution of Poisson–Boltzmann equation in nanometric semiconductor junctions, by Hugues Murray... another must, with well explained mathematics...
Jan 6, 2009
Spam!
PS: happy new year 2009!