Friday, 23 January 2009

A post in EDN: Simulation gets speed, capacity boost

A nice article to read. It's not very technical, but interesting anyway (may because of its not-technicallity...). I copy a paragraph:

"Spice remains only part of the simulation picture as designers add RF/wireless-communications capability to an increasing array of products. And even products that offer no RF/wireless features are exhibiting RF performance as process geometries shrink, digital speeds increase, and high-speed serial-I/O ports proliferate. Furthermore, in many cases, as frequencies rise and designers squeeze more functions into smaller and smaller spaces, chip and board design cannot occur in isolation; co-design and simulation of chip, chip package, and board must take place."

If you wish to read more (which I recommend), follow the link to EDN.

No comments: