Nov 9, 2021

8th EuroSOI-ULIS 2022 at University of Udine (Italy)

Organized by:
University of Udine (Italy)

Conference chair:
Pierpaolo Palestri

Local organizing Committee:
Francesco Driussi
David Esseni
Daniel Lizzit

Conference Secretariat:
Centro Congressi Internazionali 

Steering Committee:
  • Francis BALESTRA
    (IMEP Minatec, France)
  • Maryline BAWEDIN
    (IMEP-LAHC, France)
  • Cor CLAEYS
    (KU-Leuven, Belgium)
  • Bogdan CRETU
    (ENSICAEN, France)
  • Sorin CRISTOLOVEANU
    (IMEP-LAHC, France)
  • Francisco GAMIZ
    (UnivGranada, Spain)
  • Elena GNANI
    (Univ. of Bologna, Italy)
  • Benjamin INIGUEZ 
    (URV, Spain)
  • Joris LACORD
    (CEA-Leti, France)
  • Enrico SANGIORGI
    (Univ.Bologna, Italy)
  • Luca SELMI
    (Univ. of Modena, Italy)
  • Viktor SVERDLOV
    (TU Wien, Austria)
  • Andrei VLADIMIRESCU
    (ISEP, France)
Sponsors:





8th Joint International EuroSOI Workshop and International Conference
on Ultimate Integration on Silicon (EuroSOI-ULIS) 2022
May 18-20, 2022 – Udine, Italy

https://eurosoiulis2022.com

The Conference aims at gathering together scientists and engineers working in academia, research centers and industry in the field of SOI technology and nanoscale devices in More-Moore and More-Than-Moore scenarios. High quality contributions in the following areas are solicited:
  • Advanced SOI materials and structures, innovative SOI-like devices.
  • Alternative transistor architectures (FDSOI, Nanowire, FinFET, MuGFET, vertical MOSFET, FeFET and TFET, MEMS/NEMS, Beyond-CMOS).
  • New channel materials for CMOS (strained Si/Ge, III-V, carbon nanotubes; graphene and other 2D materials).
  • Properties of ultra-thin semiconductor films and buried oxides, defects, interface quality; thin gate dielectrics: high-κ and ferroelectric materials for switches and memory.
  • New functionalities and innovative devices in the More than Moore domain: nanoelectronic sensors, biosensor devices, energy harvesting devices, RF devices, imagers, integrated photonics (on SOI), etc.
  • Transport phenomena, compact modeling, device simulation, front- and back-end process simulation.
  • CMOS scaling perspectives; device/circuit level performance evaluation; switches and memory scaling; three-dimensional integration of devices and circuits, heterogeneous integration.
  • Advanced test structures and characterization techniques, parameter extraction, reliability and variability assessment techniques for new materials and novel devices.
Original 2-page abstracts with illustrations will be reviewed by the Scientific Committee. The accepted contributions will be published as 4-page letters in a special issue of the Elsevier journal Solid-State Electronics. Extended versions of outstanding papers will be published in a further special issue of Solid-State Electronics. A best poster award will be attributed by ELSEVIER. 

The “Androula Nassiopoulou Best Paper Award"
will be attributed by the SINANO institute.

Important dates:
  • abstract submission deadline: March 1, 2022
  • notification of acceptance: March 15, 2022

Nov 8, 2021

and in the same time



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[Malinkiewicz' interview] We want to be a global leader



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#SIA #EU #semi #chips #supplychains



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#3nm Mac and iPhone chips coming as soon as 2023



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Nov 7, 2021

[paper] 3nm Nano-Sheet FETs

Etienne SICARD* and Lionel TROJMAN**
Introducing 3-nm Nano-Sheet FET technology in Microwind
hal-03377556: Submitted on 14 Oct 2021

  
*INSA-Dgei, Toulouse (F)
**ISEP, Issy les Moulineaux (F)


Abstract: This paper describes the implementation of the novel Nano-sheet FET (NS-FET) for the 3-nm CMOS technology node in Microwind. After a general presentation of the electronic market and the roadmap to the atomic scale, design rules and basic metrics for the 3-nm node are presented. Concepts related to the design of NS-FET and design for manufacturing are also described. The performances of a ring oscillator, basic cells, sequential cells and a 6-transistor RAM memory are also analyzed.
Fig: A simple 3-stage ring oscillator based on compiled inverters “Fast” mode.

[ref] MICROWIND software allows the designer to simulate and design an integrated circuit at physical description level. Born in Toulouse (France), Microwind is an innovative CMOS design tool for educational market.

Nov 5, 2021

[TED paper] SPICE-Augmented ML to train machines to identify defects



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Oct 28, 2021

[paper] SET and CMOS circuits

Tetsufumi Tanamoto1, and Keiji Ono2
Simulations of hybrid charge-sensing single-electron-transistors and CMOS circuits
Appl. Phys. Lett. 119, 174002 (2021)
DOI: 10.1063/5.0068555

1Department of Information and Electronic Engineering, Teikyo University (J)
2Advanced Device Laboratory, RIKEN (J)


Abstract: Single-electron transistors (SETs) have been extensively used as charge sensors in many areas, such as quantum computations. In general, the signals of SETs are smaller than those of complementary metal–oxide–semiconductor (CMOS) devices, and many amplifying circuits are required to enlarge the SET signals. Instead of amplifying a single small output, we theoretically consider the amplification of pairs of SETs, such that one of the SETs is used as a reference. We simulate the two-stage amplification process of SETs and CMOS devices using a conventional SPICE (Simulation Program with Integrated Circuit Emphasis) circuit simulator. Implementing the pairs of SETs into CMOS circuits makes the integration of SETs more feasible because of direct signal transfer from the SET to the CMOS circuits.

Fig: (a) Six transistor SRAM cells applied in the second-stage amplification 
(b) Time-dependent voltage behaviors of the SRAM setup of L = 90 nm  
(c) Replotting of (b) for L = 65 nm.


#Samsung to triple #foundry capacity



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#Apple joins as first public partner in new #imec research program



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Oct 27, 2021

[paper] Transistors Based on Lateral PtSe2 Heterostructures

Gaetano Calogero*, Damiano Marian, Enrique G. Marin**, Gianluca Fiori 
and Giuseppe Iannaccone
Physical insights on transistors based on lateral heterostructures 
of monolayer and multilayer PtSe2 via Ab initio modelling of interfaces
Sci Rep 11, 18482 (2021)
DOI: 10.1038/s41598-021-98080-y
  
Dipartimento di Ingegneria dell’Informazione, Università di Pisa  (I)
*Consiglio Nazionale delle Ricerche, Istituto per le Microelettronica e Microsistemi (I)
**Dipartimento Electronica, Facultad de Ciencias, Universidad de Granada (SP)

Abstract: Lateral heterostructures (LH) of monolayer-multilayer regions of the same noble transition metal dichalcogenide, such as platinum diselenide (PtSe2), are promising options for the fabrication of efficient two-dimensional field-effect transistors (FETs), by exploiting the dependence of the energy gap on the number of layers and the intrinsically high quality of the heterojunctions. Key for future progress in this direction is understanding the effects of the physics of the lateral interfaces on far-from-equilibrium transport properties. In this work, a multi-scale approach to device simulation, capable to include ab-initio modelling of the interfaces in a computationally efficient way, is presented. As an application, p- and n-type monolayer-multilayer PtSe2 LH-FETs are investigated, considering design parameters such as channel length, number of layers and junction quality. The simulations suggest that such transistors can provide high performance in terms of subthreshold characteristics and switching behavior, and that a single channel device is not capable, even in the ballistic defectless limit, to satisfy the requirements of the semiconductor roadmap for the next decade, and that stacked channel devices would be required. It is shown how ab-initio modelling of interfaces provides a reliable physical description of charge displacements in their proximity, which can be crucial to correctly predict device transport properties, especially in presence of strong dipoles, mixed stoichiometries or imperfections.
Fig: Block diagram of the multi-scale procedure. Bulk DFT calculations of the materials forming the LH are performed using a plane wave basis. The resulting Hamiltonians are then projected onto MLWF and used as building blocks to construct a LH Hamiltonian with an arbitrarily long channel. The resulting LH Hamiltonian is finally used as input in NanoTCAD ViDES to simulate LH-FETs in far-from-equilibrium conditions.

Acknowledgements: This work has been supported by the European Commission through the Horizon 2020 Framework Program, Future Emerging Technologies QUEFORMAL project (contract n. 829035). The authors thank Dr. Alessandro Fortunelli for useful discussions.

In #Germany talks are for an advanced few nm #Intel #fab



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Oct 26, 2021

conference paper reached 400 reads

conference paper reached 400 reads

Bucher, M., J-M. Sallese, F. Krummenacher, D. Kazazis, C. Lallement, W. Grabinski, and C. Enz
EKV 3.0: An analog design-oriented MOS transistor model
In 9th International Conference on Mixed Design of Integrated Circuits and Systems
(MIXDES 2002)

Abstract:  The EKV 3.0 compact MOS transistor model for advanced analog IC design and simulation is presented. The model is based on the surface potential approach combined with inversion charge linearization. The ideal long-channel model is coherent  for  static  and  dynamic  aspects  including  noise.  The  ideal  model  is  extended  for  high-field  effects  in  deep submicron CMOS technologies. Scalability over channel length and width is achieved while retaining a reduced number of parameters. The EKV 3.0 model is applicable over a large range of CMOS technologies.  

Fig: Normalized source transconductance to current ratio (gm/ID) vs. normalized current, measured 
(markers) in saturation from various CMOS technologies, and analytical model.


Solving for #Silicon Shortages >> #Framework Laptop #DIY



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October 26, 2021 at 01:56PM
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FOSS Tools Alternatives

Below is a (non-exhaustive) list of FOSS alternatives to various proprietary packages compiled by the Computer Center of Indian Institute of Technology Bombay

#OPEN #Silicon Valley Annual #Forum 2021



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Oct 25, 2021

Łukasiewicz's R&D Network



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#Italy woos #Intel over multibillion #euro #chip #plant



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[Semiwiki] Its all about the #Transistors - 57 Billion reasons why #Apple/#TSMC are crushing it. Everyone just has to remember…. “its all about the transistors” https://t.co/rx4KSYFwga #semi #chips https://t.co/kS85ORWo72



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🎂 Today, we celebrate Jan Czochralski's birthday



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Invitation to attend Webinars at Upadhyaya College, University of Delhi

Future symposium/lecture workshops which are chalked under The National Academy of Sciences India (Delhi Chapter) & Deen Dayal Upadhyaya College, University of Delhi Joint Science Promotion Initiative under DBT Star College Program during December 2021 - March 2022. 

Other than these we have planned three School Outreach Programs during December 2021 - January 2022 which shall cover schools within Delhi/NCR and in Uttarakhand.

I request you to kindly forward this email to all Science Students and Teachers of your Institution so that all those who are interested to attend one or more programs should fill the google feedback form through the link: https://docs.google.com/forms/d/e/1FAIpQLScqwQpRG-Vn-Ou3R6lrPYvJRErf6wj62QCsua29DTyRAFvI3w/viewform

Zoom Link will be sent to those who will pre-register using the google form link. No Registration Fees.

E-Certificate of Participation shall be provided to all participants who will fill the feedback form for each webinar.

List of Nobel Laureates and Fellows of Royal Society who have kindly agreed to deliver Invited Talk (Virtual platform) during Jan 2022-March 2022

  • Professor Reinhard Genzel, Nobel Laureate 2020, Professor Emeritus, Acting Director, Max Planck Institute for Extraterrestrial Physics
  • Professor Sir John Pendry FRS, The Blackett Laboratory, Department of Physics, Imperial College London
  • Professor James Durrant, FRS, Faculty of Natural Sciences, Department of Chemistry, Imperial College London, South Kensington Campus, London
  • Prof Sir Colin Humphreys, FRSSchool of Engineering and Materials ScienceQueen Mary University of London
  • Professor B. Rosemary Grant, FRSSenior Research Biologist, EmeritusDepartment of Ecology and Evolutionary biologyPrinceton University
  • Professor H. Vincent Poor, FRS, FIEEEMichael Henry Strater University ProfessorDepartment of Electrical and Computer EngineeringPrinceton, New Jersey
  • Prof. Tom McLeish, FRSProfessor of Natural Philosophy in the Department of Physics, University of YorkHeslington, York, YO10 5DD, UK 
  • Professor Thirumalai Venkatesan, FRS, Professor, Condensed Matter PhysicsDirector, Center for Quantum Research and TechnologyThe University of Oklahoma
  • Prof. Vikram Sudhir DeshpandeFRS, Department of Engineering, Trumpington Street Trumpington Street, Cambridge CB2 1RF, UK
  • Professor A.R. Ravishankara, University Distinguished Professor, Departments of Chemistry and Atmospheric Science, Colorado State University, USA
  • Professor Sriram Ramaswamy, FRSDepartment of PhysicsIndian Institute of Science, Bengaluru
First International Symposium to Celebrate 75 Years of Invention of the Transistor - Contributions by Scientists of Indian Origin scheduled during December 23, 2021 – December 30, 2021.
  • Professor Renuka P. JindalIEEE Division I Delegate/Director, 2018, 2019, Founding Editor-in-Chief, IEEE J-EDS & Past President, IEEE Electron Devices Society, Eminent Scientist & Chief Technology Officer, Vanderziel Institute of Science and Technology, LLC, Princeton, NJ
  • Professor Sanjay Banerjee, Fellow of IEEE, APS and AAAS, Cockrell Family Regents Chair Professor of Electrical and Computer Engineering and Director, Microelectronics Research Center, at the University of Texas, Austin.
  • Professor Santosh K. Kurinec, Fellow of IEEEDepartment of Electrical and Microelectronic EngineeringKate Gleason College of Engineering, Rochester Institute of Technology (RIT)
  • Dr. Samar SahaChief Research Scientist at Prospicient Devices, California, USA and Adjunct faculty in Electrical Engineering (EE) department, Santa Clara University, USA
  • Professor Kaustav Banerjee, Fellow-IEEE/APS/JSPS/AAAS, Professor, Electrical and Computer Engineering & Director, Nanoelectronics Research Laboratory; Affiliated Faculty, California NanoSystems Institute and Institute for Energy Efficiency, University of California
  • Prof. P. ChakrabartiDirector, IIEST Shibpur & Professor (on Deputation), Department of Electronics Engineering, IIT (BHU), Varanasi.
  • Dr. Amitava DasGuptaV.V. Sastry Institute Chair Professor, Department of Electrical Engineering, IIT Madras
  • Professor Udayan GangulyDepartment of Electrical Engineering, IIT Bombay, Powai
  • Professor R. MuralidharanFormer Director-Solid State Physics Laboratory
  • Professor S. JitDepartment of Electronics Engineering, Indian Institute of Technology (BHU), Varanasi
  • Professor Nihar Ranjan MohapatraIndian Institute of Technology Gandhinagar, India
  • Professor Shreepad KarmalkarProfessor, Electrical Engineering  Department, Indian Institute of Technology, Madras
  • Professor Swaroop GangulyDepartment of Electrical Engineering, IIT Bombay, Powai
  • Professor Sudeb DasguptaHead & Professor, Department of Electronics and Communication EngineeringProject Director, DivyaSampark i-Hub Technology Innovation Hub, IIT RoorkeeIndian Institute of Technology, Roorkee
Sixth Lecture Workshop (Online) on Trans-disciplinary Areas ofResearch and Teaching by Shanti Swarup Bhatnagar Awardees to be held during January 2022 - February 2022
  • Prof. Avinash K Agarwal, FAAAS, FSAE, FASME, FRSC, FNAE, FNASc, FISEESJ C Bose National FellowDepartment of Mechanical Engineering, Indian Institute of Technology Kanpur
  • Dr Kayarat SaikrishnanBiology Division, Indian Institute of Science Education and Research, Pune
  • Professor Rajesh GanapathyInternational Centre for Materials Science & School of Advanced Materials, Jawaharlal Nehru Centre for Advanced Scientific Research, Bangalore
  • Dr Subhadeep ChatterjeeLaboratory of Plant-Microbe Interactions, Centre for DNA Fingerprinting and Diagnostics, Hyderabad
  • Professor Rohit Srivastava, FNASc, FRSC, FRSBHimanshu Patel Chair Professor and HeadDepartment of BSBE, IIT Bombay, Powai
  • Professor Debdeep MukhopadhyayDept of Computer Sc and Engg, Indian Institute of Technology Kharagpur, West Bengal
  • Professor Shankar GhoshDept. of Condensed Matter Physics, Tata Institute of Fundamental Research, Mumbai
  • Dr T GovindarajuBio-organic Chemistry LaboratoryJawaharlal Nehru Centre for Advanced Scientific Research, Bengaluru
  • Professor Tapas Kumar Maji, PhD, FASc, FRSCChemistry and Physics of Materials Unit (CPMU)School of Advanced Materials (SAMat)Jawaharlal Nehru Centre for Advanced Scientific Research(JNCASR), Bangalore
  • Professor Anish GhoshSchool of Mathematics, Tata Institute of Fundamental Research, Mumbai
  • Professor Subi Jacob GeorgeChair-New Chemistry Unit (NCU), Faculty at School of Advanced Materials (SAMat)Jawaharlal Nehru Centre for Advanced Scientific Research (JNCASR), Bangalore
  • Dr Kanak SahaInter-University Centre for Astronomy and Astrophysics, Pune 
Professor Manoj Saxena, MInstP (UK), SMIEEE(USA)

Member-Institute of Physics (UK) Semiconductor Group

Member-The National Academy of Sciences India (NASI)-Delhi Chapter

Former Associate-Indian Academy of Science (IASc)

Member-IEEE Electron Device Society Board of Governor (2018-2020)

List of Nobel Laureates, Distinguished Experts and Fellows of Royal Society who have delivered Invited Talks (Virtual) during 2020-2021. These were attended by over 9000+ attendees from 30+ Countries. You can watch some of the recordings on https://www.youtube.com/channel/UCNQWWGPD2tySyB5lSo1erLQ


Nobel Laureate Prof. Jean-Marie LEHNChemistry 1987

SIS, University of Strasbourg Institute for Advanced Study

Nobel Laureate William D. Phillips, Physics 1997

Quantum Institute, National Institute of Standards and Technology and University of Maryland

Nobel Laureate Sir Anthony J. LeggettPhysics 2003

Professor Emeritus, Department of Physics, Grainger College of Engineering, University of Illinois Urbana-Champaign

Nobel Laureate David WinelandPhysics 2012

Philip H. Knight Distinguished Research Chair & Research Professor,

Department of Physics, University of Oregon

Nobel Laureate J. Michael Kosterlitz, Physics 2016

Harrison E. Farnsworth Professor of Physics, Brown University

Nobel Laureate Professor Randy Schekman Physiology/Medicine 2013

Howard Hughes Institute Investigator and Professor of Cell and Developmental Biology, University of California, Berkeley

Nobel Laureate Professor Andrea GhezPhysics 2020

Professor of Physics and Astronomy, University of California, Los Angeles

Professor Malcolm LevittFellow Royal Society (UK) FRS

School of Chemistry at the University of Southampton

Prof. J. Paul AttfieldFRS, FRSE, FRSC, Foreign Fellow INSA

Centre for Science at Extreme Conditions and School of Chemistry, University of Edinburgh,

Professor Sir Chris Llewellyn SmithFRS, FAPS (USA), Honorary Fellow, IOP (UK), Foreign Fellow INSA(India)

Rudolf Peierls Centre for Theoretical Physics, Parks Road, Oxford OX1 3PU

Professor Philip K. MainiFRS, FIMA, FRSB, FMedSci, Foreign Fellow INSA (India)

Wolfson Centre for Mathematical Biology, Mathematical Institute, Oxford

Professor Sir Peter Julius LachmannFRS, FRCP, FRCPath, FMedSci, Foreign Fellow INSA(India)

Fellow, Emeritus Sheila Joan Smith Professor of Immunology, Christ College, University of Cambridge

Professor Marta Kwiatkowska, Fellow Royal Society (UK)

Associate Head of MPLS Division Fellow of Trinity College, Department of Computer Science University of Oxford, Oxford

Professor Eli YablonovitchFellow Royal Society (UK)

The James & Katherine Lau Engineering  Chair Professor, Electrical Engineering & Computer Sciences Dept., Director of the NSF Center for Energy Efficient Electronics Science, E3S Member, Kavli Energy Nano-Sciences Institute at Berkeley Senior Faculty Scientist, Lawrence Berkeley National Laboratory University of California, Berkeley

Professor Molly S. Shoichet, Fellow Royal Society (UK)

Tier 1 Canada Research Chair in Tissue Engineering, Professor of Chemical Engineering & Applied Chemistry and Biomaterials & Biomedical Engineering. Donnelly Centre for Cellular & Biomolecular Research, University of Toronto

Professor Julia Yeomans,  Fellow Royal Society (UK)

The Rudolf Peierls Centre for Theoretical Physics, 1 Keble Road, Oxford, OX1 3NP, UK

Professor Mike Lockwood, Fellow Royal Society (UK)

Space and Atmospheric Electricity Group, Department of Meteorology, University of Reading, UK

Professor Graham R Fleming, Fellow Royal Society (UK)

Professor of Chemistry, Univ. of California Berkeley & Senior Faculty Scientist, Lawrence Berkeley National Laboratory

Professor Sir Richard FriendFellow Royal Society (UK)

Cavendish Professor of Physics & Director Winton Programme for the Physics of Sustainability, Cavendish Laboratory, Cambridge

Professor Andrew Fabian, FRS

Former President – UK's Royal Astronomical Society (2008-2010), Institute of Astronomy, University of Cambridge



Professor Manoj Saxena | आचार्य मनोज  सक्सेना 
Program Coordinator-DBT Star College Program
Department of Electronics | इलेक्ट्रॉनिक्स विभाग
Deen Dayal Upadhyaya College | दीन दयाल उपाध्याय कॉलेज
University of Delhi | दिल्ली विश्वविद्यालय
Dwarka Sector-3, New Delhi-110078 | द्वारका क्षेत्र -, नई दिल्ली -११००७८
India | भारत

Oct 22, 2021

[paper] Unified Model of Shot Noise in the Tunneling Current in Sub-10 nm MOSFETs

Jonghwan Lee
Unified Model of Shot Noise in the Tunneling Current in Sub-10 nm MOSFETs
Nanomaterials 2021, 11, 2759
DOI: 10.3390/nano11102759
  
Department of System Semiconductor Engineering, Sangmyung University, Cheonan 31066, Korea,
  

Abstract: A single unified analytical model is presented to predict the shot noise for both the source to drain (SD) and the gate tunneling current in sub-10 nm MOSFETs with ultrathin oxide. Based on the Landauer formula, the model is constructed from the sequential tunneling flows associated with number fluctuations. This approach provides the analytical formulation of the shot noise as a function of the applied voltages. The model performs well in predicting the Fano factor for shot noise in the SD and gate tunneling currents.

Fig: Comparison between ST model and CT model of Fano factor as a function of Vgs
for (a) SD current noise and (b) gate tunneling current noise.

Funding: This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. 2019R1F1A1050640).