IEDM 2016 Session 7: Modeling and Simulation Advanced Numerical and Compact Models

IEDM 2016 Session 7

Modeling and Simulation Advanced Numerical and Compact Models

Monday, December 5, 1:30 p.m. Continental Ballroom 7-9 

Co-Chairs: Denis Rideau, STMicroelectronics 

Xing Zhou, Nanyang Technological University

1:35 PM 

7.1 A Novel Synthesis of Rent's Rule and Effective-Media Theory Predicts FEOL and BEOL Reliability of Self-Heated ICs, W. Ahn, H. Jiang, S.H. Shin and M. Alam, Purdue University

2:00 PM 

7.2 New Approach for Understanding "Random Device Physics" from Channel Percolation Perspectives: Statistical Simulations, Key Factors and Experimental Results, Z. Zhang, Z. Zhang, R. Wang, X. Jiang, S. Guo, Y. Wang, X. Wang*, B. Cheng*, A. Asenov* and R. Huang, Peking University, *Synopsys

2:25 PM 

7.3 Oxide-Based Analog Synapse: Physical Modeling, Experimental Characterization, and Optimization, B. Gao, H. Wu, J. Kang*, H, Yu**, H. Qian, Tsinghua University, *Peking University, **Southern University of Science and Technology

2:50 PM 

7.4 Extending the Bounds of Performance in E-mode p-channel GaN MOSHFETs, A. Kumar and M. De Souza, The University of Sheffield

3:15 PM 

7.5 NSP: Physical Compact Model for Stacked-planar and Vertical Gate-All-Around MOSFETs, O. Rozeau, S. Martinie, T. Poiroux, F. Triozon, S. Barraud, J. Lacord, Y.-M. Niquet*, C. Tabone, R. Coquand, E. Augendre, M. Vinet, O. Faynot, and J.-C. Barb, CEA-Leti, *CEA-INAC

3:40 PM 

7.6 A Physics-Based Compact Model for Material- and Operation-Oriented Switching Behaviors of CBRAM, Y. Zhao, J. Hu, P. Huang, F. Yuan*, Y. Chai*, X. Liu and J. Kang, Peking University, *The Hong Kong Polytechnic University

4:05 PM 

7.7 Multi-Domain Compact Modeling for GeSbTe-based Memory and Selector Devices and Simulation for Large-scale 3-D Cross-Point Memory Arrays, N. Xu, J. Wang, Y. Deng, Y. Lu, B. Fu, W. Choi, U. Monga*, J. Jeon*, J. Kim*, K.-H. Lee* and E. S. Jung*, Samsung Semiconductor Inc., *Samsung Electronics

[read more...]

Compound Semiconductor Technical Committee Meeting

SEMI® International Standards Program

Compound Semiconductor Technical Committee Meeting

Fraunhofer IISB, Schottkystrasse 10, D-91058 Erlangen, Germany

Thu 13th October 2016 14:00 to 16:30

Co-chairs:
• Dr. Arnd-Dietrich Weber, SiCrystal
• N.N. 

Agenda: European Compound Semiconductor Committee Meeting

Task Force meetings – tbd

14:00 Welcome and Self-Introductions all

14:05 SEMI Standards Overview and Legal Reminders SEMI Staff

14:10 Review of the minutes and action items from the previous meeting SEMI Staff

14:15 Task Force Reports (~5 minutes each)

SiC-Task Force A. Weber

Status M55 5-year review (doc 4689)

Status M81 5-year-review (doc 6015)

Contactless Capacitive Resistivity Task Force W. Jantz

14:30 Discussion and approval of doc 4689 (M55 review) for ballot A. Weber

15:00 5-Year-Review of published documents

5-year-review of M54 (Guide for semi-insulating GaAs parameters): discuss and

approve TFOF and SNARF U. Kretzer

dentification and discussion of action items all

15:30 Compound Materials Liaison Reports

North America

Japan SEMI Staff

15:45 Any Other Business / Questions A. Weber

16:00 Next Meetings

16:15 Adjourn 

Lectures on Electromagnetism https://t.co/nxi9p90Cte #papers

Lectures on Electromagnetism https://t.co/nxi9p90Cte #papers

— Wladek Grabinski (@wladek60) October 12, 2016

from Twitter https://twitter.com/wladek60

October 12, 2016 at 10:55AM
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[website] Open Circuit Design Software

Visit the Open Circuit Design Software to learn more about the major electronic design automation (EDA) tools hosted by Open Circuit Design:

• Magic, the VLSI layout editor, extraction, and DRC tool
• XCircuit, the circuit drawing and schematic capture tool
• IRSIM, the switch-level digital circuit simulator
• Netgen, the circuit netlist comparison (LVS) and netlist conversion tool
• Qrouter, the over-the-cell (sea-of-gates) detail router
• Qflow, a complete digital synthesis design flow using open-source software and open-source standard cell libraries
• PCB, the printed circuit board layout editor

[More about Open Circuit Design Software]

[paper] Well-Posed Models of Memristive Devices

Well-Posed Models of Memristive Devices

Tianshi Wang, Jaijeet Roychowdhury

(Submitted on 15 May 2016)

Existing compact models for memristive devices (including RRAM and CBRAM) all suffer from issues related to mathematical ill-posedness and/or improper implementation. This limits their value for simulation and design and in some cases, results in qualitatively unphysical predictions. We identify the causes of ill-posedness in these models. We then show how memristive devices in general can be modelled using only continuous/smooth primitives in such a way that they always respect physical bounds for filament length and also feature well-defined and correct DC behaviour. We show how to express these models properly in languages like Verilog-A and ModSpec (MATLAB). We apply these methods to correct previously published RRAM and memristor models and make them well posed. The result is a collection of memristor models that may be dubbed "simulation-ready", i.e., that feature the right physical characteristics and are suitable for robust and consistent simulation in DC, AC, transient, etc., analyses. We provide implementations of these models in both ModSpec/MATLAB and Verilog-A.

Subjects: Emerging Technologies (cs.ET); Computational Engineering, Finance, and Science (cs.CE)
Cite as: arXiv:1605.04897 [cs.ET]
(or arXiv:1605.04897v1 [cs.ET] for this version)

Eben Upton Founder, Raspberry Pi Foundation at ARM TechCon

Hear Big Names Deliver Big Ideas Attend 6 inspirational keynotes with 1 free expo pass [get pass]

ARM TechCon is proud to announce its full keynote lineup for 2016. From the founder of Raspberry Pi to the CEO of SoftBank (and his take on its 32 billion dollar ARM acquisition), these presentations feature the leaders impacting your industry’s future. Hear them all when you register for a free expo pass.

Eben Upton Founder, Raspberry Pi Foundation

Charlie Miller Senior Security Engineer, Uber Advanced Technologies Center

Masayoshi Son CEO and Chairman of the Board, SoftBank Group Corp.

Mike Muller CTO, ARM

Jon Masters Chief ARM Architect and Technical Lead for RHEL Server, Red Hat

Simon Segars CEO, ARM

100 reads: Compact Device Modeling using Verilog-AMS and ADMS

Article reached 100 reads: Compact device modeling using Verilog-AMS and ADMS
Lemaitre L · Grabiński W · McAndrew C
Abstract: This paper shows how high level language as Verily-AMS can serve as support for compact modeling development of new devices. First section gives a full Verily-AMS code of a simplified bipolar transistor. Each part of the code is carefully examined and explained. Second section compared different implementations if the simplified bipolar transistor in different spice simulators. ADMS, an open-source tool developed at Motorola, performs the implementations from Verily-AMS to simulators. Third sections concludes the paper by describing by implementation of the EKV model into ADS using the compact model interface provided by Agilent.
View publication
12 citations 107 reads

SourceForge Project: FreeCAD

FreeCAD is a general purpose feature-based, parametric 3D modeler for CAD, MCAD, CAx, CAE and PLM, aimed directly at mechanical engineering and product design but also fits a wider range of uses in engineering, such as architecture or other engineering specialties. It is 100% Open Source and extremely modular, allowing for very advanced extension and customization.

FreeCAD is based on OpenCasCade, a powerful geometry kernel, features an Open Inventor-compliant 3D scene representation model provided by the Coin 3D library, and a broad Python API. The interface is built with Qt. FreeCAD runs exactly the same way on Windows, Mac OSX and Linux platforms. [Download FreeCAD]

The History of ARM

Free Copy of Mobile Unleashed: The History of ARM!
by Daniel Nenni Published on 10-04-2016

As most of you know SemiWiki published a book which is a really nice history of ARM. We have received many compliments on it and we are very proud. As a thank you to all SemiWiki members I would like to offer a free electronic version of the book (PDF).

Only registered SemiWiki members can access this wiki so if you are not already a member please join as  guest: https://www.semiwiki.com/forum/register.php

A Compact Model of Drain Current for GaN HEMTs Based on 2-DEG Charge Linearization

N. Karumuri; G. Dutta; N. DasGupta; A. DasGupta, "A Compact Model of Drain Current for GaN HEMTs Based on 2-DEG Charge Linearization," in IEEE Transactions on Electron Devices , vol.PP, no.99, pp.1-7 doi: 10.1109/TED.2016.2605130

Abstract: A physics-based simple and accurate compact model of drain current for GaN-based high electron mobility transistors (HEMTs) is presented. The model is developed using analytical relations for charges in the 2-D electron gas and barrier layer. For the first time, a simple charge linearization approach has been used for GaN-based HEMTs. The access regions are accurately modeled using transistors. The model is rigorously validated over a wide range of geometries and parameters for AlGaN/GaN and AlInN/GaN HEMTs. The model also passes the DC Gummel symmetry test.

keywords: {Computational modeling; Electric potential; HEMTs; Integrated circuit modeling; MODFETs; Threshold voltage;2-D electron gas (2-DEG) charge;AlGaN/GaN;AlInN/GaN;GaN high electron mobility transistor (HEMT); Gummel symmetry; SPICE model.;charge linearization; charge-based; compact model;drain current},

[read more...]

Prof. Andrzej Strojwas receives 2016 Kaufman Award

The Dictates of Fate: Andrzej Strojwas receives 2016 Kaufman Award
as of Sept. 29, 2016 by Peggy Aycinena

Dr. Andrzej J. Strojwas, professor of Electrical and Computer Engineering at Carnegie Mellon University, has been named recipient of the 2016 Phil Kaufman Award for Distinguished Contributions to Electronic System Design.

Interestingly, this is the first year that the Kaufman award is being presented for contributions to Electronic System Design, not EDA. Very appropriate given that Strojwas’ contributions are in manufacturing and not design. Prof. Stojwas is CTO at PDF Solutions, which per company CEO John Kibarian has never been an EDA company. And with Kibarian serving as co-chair of the ESD Alliance, the organization formerly known as EDAC has now fully embraced its role across the entirety of electronic system design.

Besides this nod to EDAC’s ongoing evolution, the larger implications in CEDA and the ESD Alliance naming Andrzej Strojwas as this year’s Kaufman recipient are profound: The problems associated with electronic systems are not so much in the design these days, but in the extraordinary difficulties associated with manufacturing those designs. It’s really tough, as you all know, when the structures being manufactured are smaller than the wavelengths of light used to etch them.

Which bring us back to Dr. Strojwas. He has been CTO at PDF for 20 years. Back in the last century/millennium, the problems of manufacturing below 193 nanometers could only have been guessed at, yet the company was already working on the intriguing issues of capturing post-manufacturing data and somehow packaging it up to make it useful: How does the semiconductor supply chain glean vital information about the vagaries of manufacturing a real chip and send it back up to the designers so they can learn from the reality when they put pen to paper to design the next hypothetical?

This engineering of the engineering demands scientific curiosity, steely eyed attitudes towards the realities of physics and material science, and a large dollop of business savvy to navigate between the needs and demands of the foundries and the needs and demands of the designers. Let’s allow Dr. Strojwas to take it from here. We spoke by phone this week after his award was announced. 

[read more...]

Angstrem is developing new radiation-resistant microchips

as of August 16, 2016 by VICTORIA ZAVYALOVA, RBTH

Angstrem is planning to export microchips to India's aerospace sector. This is a major turning point for the Russian microelectronics industry, which until recently was almost entirely dependent on imports.
The Russian company Angstrem is completing the development of new radiation-resistant microchips for use in outer space. In September the manufacturer is planning to begin deliveries to India, its first major export market. This initial delivery will total about 10,000 microchips, and the contract is estimated at $200,000.
"While India has a full-fledged space program, the country does not have a complete technological cycle for the production of spacecraft and launch vehicles," said Vitali Aryshev, Angstrem's director of communications, when explaining the choice of this market. [read more...]

Power Semiconductor Devices and Smart Power IC Technologies CFP https://t.co/P8bWJZLgrw #papers #feedly

Power Semiconductor Devices and Smart Power IC Technologies CFP https://t.co/P8bWJZLgrw #papers #feedly

— Wladek Grabinski (@wladek60) October 1, 2016

from Twitter https://twitter.com/wladek60

October 01, 2016 at 02:29PM
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Good chip engineers are hard to find https://t.co/qdMkL3l1fe #semi #papers

Good chip engineers are hard to find https://t.co/qdMkL3l1fe #semi #papers

— Wladek Grabinski (@wladek60) September 29, 2016

from Twitter https://twitter.com/wladek60

September 29, 2016 at 03:01PM
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Insight into Lateral Band-to-Band-Tunneling in Nanowire Junctionless FETs https://t.co/cOfNerRskb #papers #feedly

Insight into Lateral Band-to-Band-Tunneling in Nanowire Junctionless FETs https://t.co/cOfNerRskb #papers #feedly

— Wladek Grabinski (@wladek60) September 25, 2016

from Twitter https://twitter.com/wladek60

September 25, 2016 at 02:06PM
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Universal Compact Model for Organic Solar Cell https://t.co/canYf4B4V4 #papers #feedly

Universal Compact Model for Organic Solar Cell https://t.co/canYf4B4V4 #papers #feedly

— Wladek Grabinski (@wladek60) September 25, 2016

from Twitter https://twitter.com/wladek60

September 25, 2016 at 09:44AM
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#Europe proposes #copyright reform to help scientists mine #research #papers https://t.co/ZTLo9VJqZ0

#Europe proposes #copyright reform to help scientists mine #research #papers https://t.co/ZTLo9VJqZ0

— Wladek Grabinski (@wladek60) September 20, 2016

from Twitter https://twitter.com/wladek60

September 20, 2016 at 03:34PM
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ASAP7: A 7-nm finFET predictive process design kit https://t.co/KesQkb5g4l #papers

ASAP7: A 7-nm finFET predictive process design kit https://t.co/KesQkb5g4l #papers

— Wladek Grabinski (@wladek60) September 19, 2016

from Twitter https://twitter.com/wladek60

September 19, 2016 at 03:16PM
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