Showing posts with label Compound Semiconductor. Show all posts
Showing posts with label Compound Semiconductor. Show all posts

Sep 17, 2020

[paper] Low-voltage, Non-volatile, Compound-semiconductor Memory Cell

Room-temperature Operation of Low-voltage, Non-volatile, Compound-semiconductor Memory Cell
Ofogh Tizno, Andrew R. J. Marshall, Natalia Fernández-Delgado, Miriam Herrera, Sergio I. Molina
and Manus Hayne
Scientific Reports volume 9, Article number: 8950 (2019) 
DOI: 10.1038/s41598-019-45370-1

Abstract: Whilst the different forms of conventional (charge-based) memories are well suited to their individual roles in computers and other electronic devices, flaws in their properties mean that intensive research into alternative, or emerging, memories continues. In particular, the goal of simultaneously achieving the contradictory requirements of non-volatility and fast, low-voltage (low-energy) switching has proved challenging. Here, we report an oxide-free, floating-gate memory cell based on III-V semiconductor heterostructures with a junctionless channel and non-destructive read of the stored data. Non-volatile data retention of at least 10000s in combination with switching at ≤2.6 V is achieved by use of the extraordinary 2.1 eV conduction band offsets of InAs/AlSb and a triple-barrier resonant tunnelling structure. The combination of low-voltage operation and small capacitance implies intrinsic switching energy per unit area that is 100 and 1000 times smaller than dynamic random access memory and Flash respectively. The device may thus be considered as a new emerging memory with considerable potential.


FIG: Device structure a) Schematic of the processed device with control gate (CG), source (S) and drain (D) contacts (gold). The red spheres represent stored charge in the floating gate (FG). b) Cross-sectional scanning transmission electron microscopy image showing the high quality of the epitaxial material, the individual layers and their heterointerfaces.

Simulation Methods: The nextnano software package was utilised for mathematically modelling the energy band diagram of the memory device structure reported here, taking into account strain and piezoelectricity. Within this work, a self-consistent Schrödinger solver was used along with the Poisson and drift–diffusion equations to calculate the electron densities at equilibrium and under bias.

Aug 25, 2020

[paper] Native High-k Oxides for 2D Transistors

Yury Yu. Illarionov1,2, Theresia Knobloch1 and Tibor Grasser1
Native high-k oxides for 2D transistors
Nature Electronics vol. 3, pp 442–443 (2020)
Published online: 05 August 2020
DOI: 10.1038/s41928-020-0464-2

1Institute for Microelectronics, TU Wien, Vienna, Austria
2Ioffe Physical-Technical Institute, St Petersburg, Russia

Abstract: The two-dimensional semiconductor Bi2O2Se can be oxidized to create an atomically thin layer of Bi2SeO5 that can be used as the insulator in scaled field-effect transistors.

Fig.: Development of FETs with Bi2O2Se channels and native Bi2SeO5 insulators. a.) Step-by-step oxidation of multilayer Bi2O2Se towards Bi2SeO5 and the crystal structure of the two materials. b.) Cross-sectional scanning transmission electron microscopy image confirming the atomically sharp interface. c.) Schematic of the top-gated devices fabricated with a native gate oxide. d.) Gate transfer characteristics of the devices with a 4.6-nm-thick Bi2SeO5 layer (EOT below 1 nm)

Oct 12, 2016

Compound Semiconductor Technical Committee Meeting

SEMI® International Standards Program
Compound Semiconductor Technical Committee Meeting
Fraunhofer IISB, Schottkystrasse 10, D-91058 Erlangen, Germany
Thu 13th October 2016 14:00 to 16:30

Co-chairs:
• Dr. Arnd-Dietrich Weber, SiCrystal
• N.N. 

Agenda: European Compound Semiconductor Committee Meeting
Task Force meetings – tbd
14:00 Welcome and Self-Introductions all
14:05 SEMI Standards Overview and Legal Reminders SEMI Staff
14:10 Review of the minutes and action items from the previous meeting SEMI Staff
14:15 Task Force Reports (~5 minutes each)
SiC-Task Force A. Weber
Status M55 5-year review (doc 4689)
Status M81 5-year-review (doc 6015)
Contactless Capacitive Resistivity Task Force W. Jantz
14:30 Discussion and approval of doc 4689 (M55 review) for ballot A. Weber
15:00 5-Year-Review of published documents
5-year-review of M54 (Guide for semi-insulating GaAs parameters): discuss and
approve TFOF and SNARF U. Kretzer
dentification and discussion of action items all
15:30 Compound Materials Liaison Reports
North America
Japan SEMI Staff
15:45 Any Other Business / Questions A. Weber
16:00 Next Meetings
16:15 Adjourn