[paper] SPICE Modeling of Cycle-to-Cycle Variability in RRAM Devices

E.Salvador^a, M.B.Gonzalez^b, F.Campabadal^b, J.Martin-Martinez^a, R.Rodriguez^a, E.Miranda^a

SPICE Modeling of Cycle-to-Cycle Variability in RRAM Devices

Solid-State Electronics; In Press, Journal Pre-proof

Available online 29 May 2021, 108040

DOI: 10.1016/j.sse.2021.108040

a) Departament d’Enginyeria Electrònica, Universitat Autònoma de Barcelona, 08193 Cerdanyola del Valles, Spain
b) Institut de Microelectrònica de Barcelona, IMB-CNM, CSIC, 08193 Cerdanyola del Valles, Spain

Abstract: In this work, we investigated how to include uncorrelated cycle-to-cycle (C2C) variability in the LTSpice quasi-static memdiode model for RRAM devices. Variability in the I-V curves is first addressed through an in-depth study of the experimental data using the FITDISTRPLUS package for the R language. This provides a first approximation to the identification of the most suitable model parameter distributions. Next, the selected candidate distributions are incorporated into the model script and used for carrying out Monte Carlo simulations. Finally, the experimental and simulated observables (set and reset currents, transition voltages, etc.) are statistically compared and the model estimands recalculated if it is necessary. Here, we put special emphasis on describing the main difficulties behind this seemingly simple procedure.

Figure 4. Comparison of experimental and simulated parameter distributions: 

a) IHRS, b) VT, c) ILRS, and d) VR.

Acknowledgements: This work was supported by the Spanish Ministry of Science, Innovation and Universities through projects TEC2017-84321-C4-1-R, TEC2017-84321-C4-4-R, and PID2019-103869RB-C32.

[paper] Review of physics-based compact models for emerging nonvolatile memories

Nuo Xu¹, Pai-Yu Chen², Jing Wang¹, Woosung Choi¹, Keun-Ho Lee³, Eun Seung Jung³, Shimeng Yu²

Review of physics-based compact models for emerging nonvolatile memories

¹Device Lab, Samsung Semiconductor Inc., San Jose, CA 95134, USA

²School of ECEE, Arizona State University, Tempe, AZ 85281, USA

³Semiconductor R&D Center, Samsung Electronics, Hwasung-si, Gyeonggi-do, Korea

Journal of Computational Electronics, 2017, pp. 1-13

https://doi.org/10.1007/s10825-017-1098-0

Abstract: A generic compact modeling methodology for emerging nonvolatile memories is proposed by coupling comprehensive physical equations from multiple domains (e.g., electrical, thermal, magnetic, phase transitions). This concept has been applied to three most promising emerging memory candidates: PCM, STT-MRAM, and RRAM to study their device physics as well as to evaluate their circuit-level performance. The models’ good predictability to experiments and their effectiveness in large-scale circuit simulation suggest their unique role in emerging memory research and development [read more...]

https://doi.org/10.1007/s10825-017-1098-0

[paper] Well-Posed Models of Memristive Devices

Well-Posed Models of Memristive Devices

Tianshi Wang, Jaijeet Roychowdhury

(Submitted on 15 May 2016)

Existing compact models for memristive devices (including RRAM and CBRAM) all suffer from issues related to mathematical ill-posedness and/or improper implementation. This limits their value for simulation and design and in some cases, results in qualitatively unphysical predictions. We identify the causes of ill-posedness in these models. We then show how memristive devices in general can be modelled using only continuous/smooth primitives in such a way that they always respect physical bounds for filament length and also feature well-defined and correct DC behaviour. We show how to express these models properly in languages like Verilog-A and ModSpec (MATLAB). We apply these methods to correct previously published RRAM and memristor models and make them well posed. The result is a collection of memristor models that may be dubbed "simulation-ready", i.e., that feature the right physical characteristics and are suitable for robust and consistent simulation in DC, AC, transient, etc., analyses. We provide implementations of these models in both ModSpec/MATLAB and Verilog-A.

Subjects: Emerging Technologies (cs.ET); Computational Engineering, Finance, and Science (cs.CE)
Cite as: arXiv:1605.04897 [cs.ET]
(or arXiv:1605.04897v1 [cs.ET] for this version)