Showing posts with label IEEE. Show all posts
Showing posts with label IEEE. Show all posts

Oct 4, 2026

[webinar] Colombia in OpenSilicon Age

IEEE SSCS: Colombia in OpenSilicon Age

  • Date: Thursday, October 8, 2026
  • Time: 1:00 PM – 2:30 PM (Colombia, GMT-5)
  • Platform: Cisco Webex
  • Access: Free/Open access

This open online event is the first IEEE SSCS Colombia session. It shares a vision for creating a strong microelectronics ecosystem in Colombia by bringing universities and industry together and helping develop highly skilled engineers. The event will review the current state of microelectronics in Colombia, discuss the future of integrated circuit (IC) design, present recent semiconductor policy initiatives, and explain the goals of the IEEE SSCS Colombia chapter. Speakers from Colombia and abroad will share their experience in IC design, open-source silicon, semiconductor education, and industry development. The session aims to encourage collaboration between academia, industry, and government to support the growth of the semiconductor sector in Colombia.

Featured Panelists and Keynote Speakers

  • Made in Colombia: Review of Colombian Microelectronics
    Javier Ardila, Onsilicon, UIS and President, IEEE SSCS
  • ColombiaThe Global Map of CI Design: Tools, Foundry and Methodology
    Hugo Hernández, Teradar, Boston, MA
  • OpenSilicon Opportunities
    Fernando Guarín IEEE Division 1
  • Bill for the promotion of the electronics and semiconductor industry
    Lorena García Founder, Colombian Network of Electronics and Semiconductors


Oct 1, 2026

IEEE LA & Caribbean Semi Summit

IEEE Latin America & the Caribbean
Semiconductor Summit

LACSS 2026 will bring together leaders from industry, government, academia, research institutions and the investment community to explore Latin America and the Caribbean’s role in the rapidly evolving global semiconductor ecosystem.

The two-day (Oct. 1-2) program will examine regional capabilities and opportunities across semiconductor design, talent development, advanced manufacturing, packaging and testing, supply chains, investment, public policy, research, critical technologies and international cooperation. The IEEE EDS/CASS MQ Semiconductors in Latin America will follow on the third day (Oct.3)

DAY 1 — Academia and Industry: Building Talent, Research and Innovation
Thursday, October 1st, 2026

Opening

08:30–09:00

Opening Ceremony

Ivan Armuelles, Chair IEEE LACSS 2026

Juan Pimiento, SENACYT, Panama

09:00–09:30

Overview of the Semiconductor Industry Today and Opportunities for Latin America through the IEEE Open Silicon Initiative
Fernando Guarin, IEEE Division I, Director - GlobalFoundries (Retired) / IBM (Retired), USA

Building Semiconductor Talent: National Experiences from Latin America

Moderator: Fernando Guarín, IEEE

09:30–09:50

Building Panama's National Semiconductor Talent Pipeline
Zoila De Castillo, C-TASC, Panama

09:50–10:10

Brazil´s Semiconductor Industry and Design House Ecosystem
Jacobus Swart, University of Campinas (UNICAMP) / INCT NAMITEC, Brazil

10:10–10:30

The Kutsari initiative and strategy for the future (virtual)
Edmundo Gutierrez, Kutsari (National Center for Semiconductor Design in Mexico), Mexico

10:30–11:00

Networking Coffee Break

Electronic Design Automation

Moderator: Ricardo Reis, UFRGS, Brazil

11:00–12:30

Panel: EDA Innovation and Latin America’s Role in the Global Semiconductor Ecosystem

Antonio de la Serna, Siemens EDA

Victor Grimblatt, Synopsys

Marcelo Da Silva, Cadence

12:30–14:00

Lunch

Talent Development and Industrial Capabilities

Moderator: Carlos Silva, PUCP, Peru

14:00–14:30

Talent: the keyword for the development of semiconductors

Ricardo Reis, Institute of Informatics, Federal University of Rio Grande do Sul (UFRGS), Brazil

14:30–15:45

Panel: Preparing Semiconductor Talent–Industry and University Experiences

Rodrigo Jaramillo, Circuify Semiconductors, Mexico

Alfredo Arnaud, Universidad Católica del Uruguay, Uruguay

Victor Grimblatt, Synopsys, Chile

Amílcar Josué Véliz Solares, Universidad Galileo, Guatemala

Javier Marte Michelen, Pontificia Universidad Católica Madre y Maestra, Dominican Republic

15:45–16:15

Networking Coffee Break

16:15–16:45

Assembly, Testing and Packaging: Opportunities for Latin America

Joel Molina, INAOE, Mexico

Day 1 Wrap-up

16:45–17:00

Day 1 Wrap-Up

Ivan Armuelles, Chair IEEE LACSS 2026

18:00–20:00

Welcome Reception (off-site)

La Casa - Ciudad del Saber


DAY 2 — Government and Industry: Policy, Investment and Regional Strategy
Friday, October 2nd, 2026

08:30–08:45

Day 2 Kick-off

Start of Day 2: summary of the previous day and agenda of the day

Global Policy, Cooperation and Investment

Moderator: Erik Heilman, IEEE-USA

08:45–09:30

Global Policy Perspectives for Semiconductor Development

Filipe Silva, Semiconductors Team Lead, OECD (virtual)

09:30–10:00

Pax Silica and the Global Semiconductor Ecosystem: Implications for Latin America and the Caribbean (virtual)

Akhil Ramesh, PAC Forum

10:00–10:30

Panama’s Semiconductor Strategy (TBC)

Victor Sanchez, C-TASC AIP, Panama

10:30–11:00

Networking Coffee Break

The Semiconductor Policy Playbook: Regulation, IP and Regional Development

Moderator: TBC

11:00–12:20

Panel: Policies and Partnerships for Latin American Semiconductor Ecosystems

Adão Villaverde, Brazil

Mayté Milián, Guatemala

Nestor García Romero, Mexico

Lorena Garcia, Colombia

12:20–12:30

IEEE Division I–Synopsys MoU Signing Ceremony: Semiconductor Workforce Development
Fernando Guarín, IEEE Division I

Victor Grimblatt, Synopsys

12:30–14:00

Lunch

Semiconductor Design, Manufacturing and Entrepreneurship

Moderator: Lorena Garcia, Alianza E, Colombia

14:00–15:30

Panel: Building Semiconductor and Hardware Businesses in Latin America

Rodrigo Jaramillo, Circuify Semiconductors, Mexico

Israel Mejia, QSM, Mexico (virtual)

Gabriel Ortiz, Pixart, Argentina

Alfonso Chacon, Rydev, Costa Rica

Javier Ardila, OnSilicon, Colombia (virtual)

15:30–16:00

Networking Coffee Break

Expanding Access to Semiconductor Design, Prototyping and Manufacturing

Moderator: Joel Molina, INAOE, Mexico

16:00–17:00

Panel: Expanding Access to Semiconductor Design, Prototyping and Manufacturing

Pat Deegan, Tiny Tapeout

Mitchell Hsing, InchFab

Alfonso Torres, INAOE (virtual)

FET 100

Moderator: Arokia Nathan, IEEE EDS, USA

17:00–17:45

FET100

Speakers: Fernando Guarin, Jacobus Swart.

17:45–18:00

Closing - LACSS 2027 announcement

Ivan Armuelles

Ricardo Reis

18:00

End of LACSS


DAY 3 — 2026 IEEE EDS/CASS MQ Semiconductors in Latin America
Saturday, October 3rd, 2026
Universidad De Panama Auditorio (Piso 3), Facultad De Informática, Electrónica Y Comunicación

IEEE EDS/CASS MQ Session: 
Exploring Innovation, Research, and Opportunities for a Semiconductor Future
in the Caribbean
8:00–8:15 Opening Ceremony — Registration and Welcome Remarks
8:15–8:45 Low Power Design for Sustainable Manufacturing in Agribusiness
Victor Grimblatt
8:45–9:15 Embedded Timing: A New Scaling Layer for Compute at System Scale
Rodrigo Calderon
9:15–9:45 Reliability Topics for Advanced Semiconductors
Fernando Guarin
9:45–10:15 Physical Design Automation: From Past to Future
Ricardo Reis
10:15–10:45 Networking Coffee Break
10:45–11:15 Brazil’s Semiconductor Industry and Design House Ecosystem
Jacobus Swart
11:15–11:45 Oxide Electronics
Arokia Nathan
11:45–12:15  Dielectrics Materials from Field Effect Transistors to In-Memory Computing
Durga Misra
12:15–13:30  Lunch



Sep 29, 2026

IEEE EDS/SSCS/CAS Mini-Colloquium

Friday 11 September 2026
UIB; Sa Riera Building
C/ de Miquel dels Sants Oliver, 2
07122 Palma

Professors Benjamin Iniguez, URV and Rodrigo Picos, UIB, have organize joint IEEE EDS/SSCS/CAS Mini-Colloquium as an integral part of the recent ESSERC2026 in Palma de Mallorca. All the MQ participants followed the MQ program as follows:

Mini-Colloquium Agenda
9:00 - 09:05 Opening

9:05-9:15 Tribute to Michael S. Shur

9:05-9:15 Tribute to José Epifânio da Franca 

9:15-10:05 Leveraging semiconductor technology for the benefit of society
Fernando Guarin (Director of IEEE Division I)

10:05-10:55 Power efficient WBG devices for the green transition
Mikael Ostling (KTH, SE)

10:55-11:25 Coffee Break

11:25-12:15 Holistic solutions to future computing - not only scaling
Francesca Iacopi (Purdue University, US)

12:15-13:05 Status of the Compact modeling and its Verilog-A standardization
Wladek Grabinski (MOS-AK, CH and IHP OpenPDK, DE)

13:05-14:25 Lunch

14:25-15:15 Graphene thin film technology for neural interfaces
José Antonio Garrido (ICN2, Barcelona, Spain)

15:15-16:05 Energy-Efficient Analog IC Design:
Exploring Solutions at Device, Circuit and System Levels
Antonio López (Public University of Navarra, Spain)

Aug 17, 2026

[C4P] IEEE 18th LASCAS 2027 Panamá City

Call for Papers 
2027 IEEE 18th Latin America Symposium on Circuits and Systems 
LASCAS 2027 Panamá City, Panama
February 23-26, 2027

LASCAS is the flagship symposium of the IEEE Circuits and Systems Society in Latin America. The 2027 edition will take place in Panamá City, a vibrant location known for the Panama Canal, Biomuseo, Amador Causeway, Ancon Hill, the ruins of Panamá Viejo, and the historic district of Casco Viejo.

Technical Areas

  • Analog and Digital Circuits
  • Mixed-Mode Circuits
  • Biomedical Electronics
  • Communication and RF Circuits
  • Wireless Sensor Networks
  • Nanoelectronics
  • Electronic Design Automation
  • VLSI Systems
  • FPGA Design
  • Circuit Testing and Fault-Tolerant Circuits
  • Circuits for Space and Nuclear Applications
  • Circuits for AI

Proceedings will be published by IEEE and available on IEEE Xplore. Selected best papers will be invited to special issues of the IEEE Open Journal of Circuits and Systems. Social activities and tourist tours will be organized for attendees and guests.

Organizing Committee

General Chairs

  • Ivan Armuelles Voinov, Universidad de Panamá, Panama
  • Fakhrul Zaman, Universiti Putra Malaysia, Malaysia

Program Chairs

  • Rafaella Fiorelli Martegani, IMSE‑CNM, Spain
  • Roberto La Rosa, STMicroelectronics, Italy
  • Luis Estrada Petrocelli, Universidad Latina de Panamá, Panama

Important Dates

Paper Submission September 1, 2026
Notification of Acceptance October 23, 2026
Camera‑Ready November 9, 2026

Feb 2, 2026

ToM2026 – XX Year

Topics on Microelectronics
(ToM2026) – XX Year
Università degli Studi di Milano-Bicocca
Italian National Ph.D. Program in Micro- and Nano-Electronics
Updated information: www.mbtechnoservices.com
Directors: Andrea Baschirotto & Piero Malcovati

On the occasion of the twentieth anniversary of the “Topics on Microelectronics” Courses and in consideration of the collaboration with the National Ph.D. Program in Micro- and Nano-Electronics, the Chips-IT Foundation, and IEEE-SSCS Italy, this year the first course will be held in Torre dell'Orso, Puglia, in a setting designed to bring together instructors and participants in an environment of outstanding natural beauty. The second course will be held at the more familiar venue of the University of Milan-Bicocca.

For both courses, the format remains consistent, comprising 15 lessons of 3 hours each, delivered by recognized experts in the field of Microelectronics from both academia and research, as well as from industry. Additionally, the courses are characterized by a strong multidisciplinary approach, due to the dense nature of the covered topics. This choice is motivated by the goal of providing an increasingly broad-based preparation for Ph.D. students.

Finally, it is an honor to complement the first ToM course of the twentieth year with a lecture by Professor Pieter Harpe, who serves as a Distinguished Lecturer for IEEE-SSCS, as part of the activities of the SSCS Italian Chapter.

IEEE-SSCS Distinguished Lecture Program

Monday, June 8, 2026 – 09:00–12:00 P. Harpe (Eindhoven University of Technology)
“ADC Innovations for Improved Resolution, Power and Form Factor”
“Ultra low power SAR ADCs and versatile, dynamic sensor interfaces”

ToM2026/1 – Course Program (June 8–10, 2026)

Venue: Hotel Belvedere, Torre dell'Orso – Melendugno (LE), Italy

Monday, June 8, 2026

16:00–19:00 D. M. Mattes (University of Milan-Bicocca, Italy)
“Analog Design in 7nm-CMOS-FinFET”

Tuesday, June 9, 2026

09:00–12:00 G. Frattini (Analog Devices, Italy)
“What does it take to build a System-In-Package with HV galvanic isolation”

16:00–19:00 C. Forzan (STMicroelectronics, Italy)
“Digital Design Flow: a Journey from Synthesis to Signoff”

Wednesday, June 10, 2026

09:00–12:00 L. Pilotto (ChipsIT Foundation, Italy)
“Introduction to Sub-THz Circuit Design”

16:00–19:00 P. Malcovati (University of Pavia, Italy)
“MEMS and Integrated Microsystems: From Fabrication to Interface Circuits”

ToM2026/2 – Course Program (October 12–14, 2026)

Venue: University of Milan-Bicocca, Italy

Monday, October 12, 2026

14:00–17:00 Q. Li (TU Hamburg, Germany)
“High-Resolution SAR ADC with closed loop time-domain comparison”

Tuesday, October 13, 2026

09:00–12:30 E. Sacchi (Cadence, Italy)
“Electromagnetics in RFICs and RF systems design”

14:00–17:30 M. Demicheli (ChipsIT Foundation, Italy)
“DC-DC conversion techniques”

Wednesday, October 14, 2026

09:00–12:30 M. Sampietro (Polytechnic of Milan, Italy)
“Fighting against electronic noise: how to reach attoAmpere signal detection”

14:00–17:30 M. Chiabrera (Inventvm, Italy)
“Technique and challenges in low latency – low power audio digital design”

Further information and on-line registration 
are available at www.mbtechnoservices.com

Nov 16, 2025

[IEEE EDS DL] Multifunctional materials for emerging optoelectronic technologies

IEEE EDS Distinguished Lecture
Hawaii Section Jt. Chapter, ED15/SSC37
December 19 @ 6:30 pm - 8:00 pm
Room: 244, Bldg: Holmes Hall, 2540 Dole St, Honolulu
Hawaii, United States, 96822


Dr. Federico Rosei from the University of Trieste will be presenting a Distinguished Lecturer Seminar titled "Multifunctional materials for emerging optoelectronic technologies" on Friday December 19th at 6:30PM. RSVP one week in advance for a headcount on food [register]

Abstract: functionalities. Such systems are then used as building blocks for the fabrication of various emerging technologies. In particular, nanostructured materials synthesized via the bottom–up approach present an opportunity for future generation low cost manufacturing of devices. We focus in particular on recent developments in solar technologies that aim to address the energy challenge, including third generation photovoltaics, solar hydrogen production, luminescent solar concentrators and other optoelectronic devices. 

Bio: Federico Rosei (MSc (1996) and PhD (2001) from the University of Rome “La Sapienza”) holds the Chair of Industrial Chemistry at the Department of Chemical and Pharmaceutical Sciences, University of Trieste since March 2023. Previously he was Full Professor at the Centre Énergie, Matériaux et Télécommunications, Institut National de la Recherche Scientifique, Varennes (QC) Canada, where he served as Director (07/2011–03/2019). He held the Canada Research Chair (Junior) in Nanostructured Organic and Inorganic Materials (2003–2013) and the Canada Research Chair (Senior) in Nanostructured Materials (2016–2023) and the UNESCO Chair in Materials and Technologies for Energy Conversion, Saving and Storage (2013–2023).


Oct 5, 2025

[Deadline] extended to Oct.15 2026


10th IEEE Electron Devices Technology and Manufacturing
(EDTM 2026) Conference
https://ieee-edtm.org/
March 1-4, 2026 Penang, Malaysia 

EDTM2026 paper submission date has been extended to 15th October 2025

Submit your papers today in any of the 13 tracks and see you in Penang, Malaysia from 1st - 4th March 2026.




Sep 4, 2024

[C4P] EDTM 2025 in Hong Kong, China

The 9th IEEE Electron Devices Technology
and Manufacturing
Hong Kong, China, March 9th – 12th, 2025
Theme: Shaping the Future with Innovations in Devices and Manufacturing

Call for Papers

Three-page camera-ready paper submission starts: August 15, 2024
Paper submission deadline: October 15 October 31, 2025
Notification for Acceptance: December 15, 2024

https://edtm2025.com/

Technical Areas
EDTM 2025 solicits papers in all areas of electronic devices, including materials, processes, modeling, device/circuit/system design, reliability, packaging, manufacturing, testing, and yield. EDTM 2025 will include parallel technical sessions of oral and poster presentations.

Publication Opportunities
The accepted and presented papers will be published in the EDTM 2025 Proceedings, included in IEEE Xplore. The authors of a selected number of high-impact papers will be invited to submit extended versions for publication in the special issue of IEEE Journal of Electron Devices Society (J-EDS) or IEEE Transactions on Electron Devices, subjected to J-EDS and TED policy.

Short Courses and Tutorials
EDTM 2025 will start with a set of short courses and tutorials on March 9, 2025. Tutorials will cover selected topics from the basics to the state-of-the-art. The Short Courses will discuss the latest research and challenges on emerging and advanced topics.

Exhibition
EDTM 2025 offers vendors to showcase their newest products and technologies, allowing attendees to learn about new tools and techniques. Award Opportunities EDTM 2025 offers one Best Paper Award in each sub-technical area.
General Chair:
Yang Chai (HK PolyU)

General Co-Chair:

Tim Cheng (HKUST)

TPC Chair:
Mansun Chan (HKUST)

TPC Co-Chair:

Yansong Yang (HKUST)

Steering Committee:

Shuji Ikeda (TEI Solutions) – Chair
Bin Zhao (CTI)
Arokia Nathan (Cambridge U.)
Ravi Todi (Synopsys)
Murty Polavarapu (BAE)
Roger Booth (Qualcomm)
Samar Saha (Prospicient Devices)
Albert Wang (UC Riverside)
Kazunari Ishimaru (Rapidus)
Yogesh Chauhan (IIT Kanpur)

Executive Committee:
Yang Chai (HK PolyU)
Roger Booth (Qualcomm)
Mansun Chan (HKUST)
Yansong Yang (HKUST)
Ru Huang (Southeast)
Qiming Shao (HKUST)
Merlyne De Souza (U Sheffield)
Pei-Wen Li (NCTU)
Can Li (HKU)
Masumi Saito (Kioxia)
Zhongrui Wang (HKU)
Meiki Ieong (Simbury)
Carmen Fung (HKSTP)
Man Hoi Wong (HKUST)
Roger Booth (Qualcomm)
Huaqiang Wu (Tsinghua)
Rino Choi (Inha U.)
Bernard Lim (Appscard)
Shinichi Yoshida (SONY)
Bill Nehrer (Atomera)
Bich-Yen Nguyen (SOITEC)
Benjamin Iniguez (URV)
Edmundo Gutierrez (INAOE)
Ming Yang (HK PolyU)

Apr 18, 2024

[IEEE SSCS] “PICO” Open-Source Chipathon

IEEE SSCS “PICO” Open-Source Chipathon
Automating Analog Layout
– Sign-Up Deadline: May 10, 2024 –

The IEEE Solid-State Circuits Society is pleased to announce its fourth open-source integrated circuit (IC) design contest under the umbrella of its PICO Program (Platform for IC Design Outreach). While this contest is open to anyone (no restrictions), we encourage the participation of pre-college students, undergraduates, and geographical regions that are underrepresented within the IC design community. 


The goal of this year’s event is to advance the automatic generation and open sharing of analog circuit layout cells to increase our community’s design productivity and to catch up with other fields where sharing and automation is a key enabler of progress (e.g., in machine learning).

Die photo in background courtesy of IBM

Contest Outline

  1. Interested individuals sign up using this form by May 10, 2024.
  2. Phase 1 (~June): Through a series of weekly meet-ups and training sessions, the participants learn to create basic one- or two-transistor layout generators using Python and open-source CMOS PDKs. Using Jupyter Notebooks hosted on Google Colab allows anyone with an internet connection to participate - no downloads or installations required! Relevant circuit examples can be found in [1], [2]. We will leverage code modules available with the OpenFASoC [3] environment.
  3. Phase 2 (~July): Interested participants define larger layout building blocks that they wish to automate (examples: comparator, bandgap, phase interpolator, OTA). Teaming among participants is encouraged to maximize collaboration and learning).
  4. Phase 3 (~August-September): Participants implement their generators and submit sample layouts and test structures for potential tape-out to an open-source MPW (tentatively SKY130).
  5. Phase 4 (~October-November): A jury evaluates the created generators/layouts and selects the test structures that will be taped out. The teams work together to assemble a shared database with all the designs and to complete the tapeout. Ideally, this phase will involve automated verification through CACE [4] or a similar tool.
  6. Phase 5 (TBD): The designs will be tested using lab measurements by a subset of participants and SSCS volunteers with access to lab facilities. Some of the test setups may be available for remote characterization. The obtained measurement data will be added to the repositories containing the layout generators.

 References

[1] H. Pretl, “Fifty Nifty Variations of Two-Transistor Circuits,” MOS-AK Workshop Spring 2022, URL: https://www.mos-ak.org/spring_2022/presentations/Pretl_Spring_MOS-AK_2022.pdf.
[2] H. Pretl and M. Eberlein, "Fifty Nifty Variations of Two-Transistor Circuits: A tribute to the versatility of MOSFETs," in IEEE Solid-State Circuits Magazine, vol. 13, no. 3, pp. 38-46, Summer 2021, URL: https://ieeexplore.ieee.org/document/9523464.
[3] OpenFASoC: Fully Open-Source Autonomous SoC Synthesis using Customizable Cell-Based Synthesizable Analog Circuits, https://github.com/idea-fasoc/OpenFASOC/.
[4] Circuit Automatic Characterization Engine, URL: https://github.com/efabless/cace.

Apr 14, 2024

GDR SOC2 IEEE CASS

GDR SOC2 - IEEE CASS
“Tour de France” - Grenoble - 19 April 2024
Open Hardware: the new road?
INP; 46 Av Felix Viallet 38000 Grenoble – Amphi Gosse

8:30  Prof. Boris Murmann (U. of Hawaii) 
Re-Energizing Analog Design using the Open-Source Ecosystem. 
9:30  Aurélien Nicolet (CIME-P)
The French platform supporting open hardware
10:00 Krzysztof Herman (IHP)
 IHP Open Source PDK -  sharing experience after one year of development.
11:00 75th anniversary of CAS Society Keynote by Prof. Ricardo Reis.
12:00 Lunch & Cocktail
14:00 Prof. Ricardo Reis (UFRGS)
 Why joining IEEE CAS Society?
14:30 Jean-Paul Chaput (LIP6 – Sorbonne University)
 Coriolis, The European Open Hardware Project 
15:30 Dr. Leonardo Gomes (TIMA - UGA)
 The first 60 GHz circuit designed with open hardware platform
16:00 Deni Alves (UFSC)
 ACM, a design-oriented model for open tools

Inscription Gratuite: à laurence.ben-tito@univ-grenoble-alpes.fr  








Mar 19, 2024

IEEE 5NANO2024 Conference 25-26th April, 2024

2024 IEEE International Conference on Nanoelectronics, Nanophotonics,
Nanomaterials, Nanobioscience & Nanotechnology
25th & 26th April 2024
VISAT Engineering College
Elanji, Ernakulam, Kerala, India - 686 665.

The IEEE 5NANO2024 International Conference is going to be dynamic and informative as it provides the premier interdisciplinary forum for researchers, practitioners and educators to present and discuss the most recent innovations, trends, practical challenges encountered, and the solutions adopted in the field of Nanotechnology. The theme of the conference is: “Future Challenges and Advanced Innovations in Nanotechnology”




Contact 5NANO2024:

Dr. T.D.Subash, Conference Organizing Chair - 5NANO2024,
VISAT Engineering College,
Elanji, Ernakulam, Kerala, India - 686 665

Tel: +91 9447691397, +91 9486881397.
E-mail: deanresearch@visat.ac.in, tdsubash2007@gmail.com, 5nano2k24@gmail.com

Website: https://www.5nano2024.com