[conference] 1st Elbrus Tech Day

 

On February 16 and 17, 2021, the first Elbrus Tech Day was organized and dedicated to the ecosystem of the Russian platform "Elbrus". Materials of the conference in the form of presentations are available below for free download, Videos from Elbrus Tech Day will be added to the table as the materials are prepared, please follow the updates. The next Elbrus Tech Day will be held in the fall of 2021, we invite partners to consider participating in the event with equipment and reports on the Elbrus ecosystem. For cooperation and preparation for the upcoming Elbrus Tech Day, please contact the marketing@mcst.ru.

 Overview video from the Elbrus Tech Day exhibition area

Elbrus Tech Day broadcast program for February 16, 2021:  

Report	Company	Links
Elbrus processor line and the main components of the Elbrus hardware and software platform	JSC "MCST"	Presentation Video
Basic software ecosystem of the Elbrus platform	JSC "MCST"	Presentation Video
New systems on a chip (Elbrus-16S, Elbrus-2S3, Elbrus-12S) and their capabilities	JSC "MCST"	Presentation Video
Serial and future modules based on Elbrus processors	JSC "MCST"	Presentation Video
Testing of equipment based on Elbrus processors using boundary-scan: an advantage that speeds up the shipment of finished products by 2 times.	JTAG Technologies	Presentation Video
Viola on Elbrus: making and applying together	LLC "Basalt SPO"	Presentation Video
Special purpose operating system release "Leningrad"	LLC "RusBITech-Astra"	Presentation Video
Secure real-time operating system "Neutrino-E".	LLC "SVD Embedded Systems"	Presentation Video
Add speeds? Architecture of the latest relational DBMS in Elbrus	RELEX	Presentation Video
Postgres Pro on Elbrus	Postgres Professional	Presentation Video
Porting of the information and analytical system to Elbrus: PAK LuxControl	LuxMS Group	Presentation Video
Recognition systems on Elbrus	Smart Engines	Presentation Video
Convolutional networks on Elbrus processors	State Research Institute of AS	Presentation Video
Porting Linux Perf GUI (Hotspot) to the Elbrus platform: opportunities, challenges and approaches.	Novosibirsk Institute of Software Systems	Presentation Video
High-performance Graviton server systems on Elbrus processors for video analytics systems	LLC "New IT Project"	Presentation Video
"Voskhod" on "Elbrus"	FGBU RESEARCH INSTITUTE "Voskhod"	Presentation Video
High-speed trusted TNI on the Russian controller K1942VK018 developed by Kraftway in Elbrus computing systems	Craftway Corporation PLC JSC	Presentation Video
The first Russian SSD. Application and characteristics	JSC "GS-Nanotech"	Presentation Video
Server equipment and storage systems on the Elbrus platform developed and manufactured by NORSI-TRANS	CJSC "NORSI-TRANS"	Presentation Video
Server products DEPO Computers based on Elbrus-8SV processors. Model range 2021-2022	LLC "DEPO Electronics"	Presentation Video
Experience of technological cooperation for the development of high-density RSK solutions based on Elbrus processors	Group of companies "RSC"	Presentation Video
Possibilities of combining Elbrus processors and high-speed Angara network	JSC "NICEVT"	Presentation Video

 Elbrus Tech Day broadcast program for February 17, 2021:  

Report	Company	Links
Center for Ecosystem Development for the Development of Domestic Software and Hardware Platforms	FGBU RESEARCH INSTITUTE "Voskhod"	Presentation Video
Welcome speech from the representative of the Ministry of Industry and Trade	Ministry of Industry and Trade of Russia	Video
"Elbrus" as the basis of import substitution	JSC "MCST"	Presentation Video
Protected laptop ZMKS-1877.12 based on "Elbrus-8S"	LLC "STC ZMKS"	Presentation Video
Import-independent solutions based on the Russian hardware platform	CJSC "NORSI-TRANS"	Presentation Video
Solutions of the company "New IT Project" based on "Elbrus" processors	LLC "New IT Project"	Presentation Video
Aquarius solutions based on Elbrus processors and ecosystem issues	LLC "PC Aquarius"	Presentation Video
New rules for the procurement of Russian computer equipment. Experience of DEPO Computers in the development of devices on Elbrus processors	LLC "DEPO Electronics"	Presentation Video
What is hidden behind the figure of 94.5% in the BITBLAZE data storage system?	LLC "Promobit"	Presentation Video
Leading domestic solutions for high-performance computing based on Elbrus processors	CJSC "RSK Technologies"	Presentation Video
The use of Elbrus processors in secure solutions	LLC "GC "SUPPLY"	Presentation Video
AdvantiX industrial computers based on Elbrus CPU	LLC "Advantix"	Presentation Video
Application of Elbrus processors in harsh operating conditions	LLC "NPK Positron"	Presentation Video
Localization of electronic products for computer technology. GS Nanotech Experience	JSC "GS-Nanotech"	Presentation Video
SKHD AERODISC VOSTOK	AERODISC	Presentation Video
Fast analytics on big data, PAK Luxcontrol	LuxMS Group	Presentation Video
How to competently carry out import substitution of video conferencing infrastructure using domestic solutions	TrueConf	Presentation Video
On the experience of introducing SVT based on processors with Elbrus architecture in public authorities	FGANOU TSITIS	Presentation Video
Operating systems "Alt" - the basis of technological independence	LLC "Basalt SPO"	Presentation Video
Import substitution with Astra Linux Leningrad	LLC "RusBITech-Astra"	Presentation Video
LUI-Elbrus: A domestic tool for developing application systems and their migration from Oracle DBMS to PostgreSQL	LLC "FORS - Development Center"	Presentation Video
Fully domestic trusted environment for virtual testing of CII objects	LLC "TESIS"	Presentation Video

 Партнеры Elbrus Tech Day:

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[C4P] ESSDERC-ESSCIRC 2022

Paper submission is open! Submission deadline: Apr 12, 2022 23:59 (GMT -0700) Decision notification: May 31, 2022 23:59 (GMT -0700)  www.esscirc-essderc2022.org Although not limited, papers are solicited for the following main topics:   Advanced Technology, Process and Materials Analog, Power and RF Devices Compact modeling and process/device simulation Analog Data Converters RF & mm-Wave Frequency Generation Circuits Digital Circuits & Systems Power Management Wireless & Wireline Circuits & Systems Emerging Computing Devices and Circuits Memory Devices & Circuits Towards Non-von Neumann Devices & Circuits for Sensors, Optoelectronics & Display I look forward to meeting you all in Milan! Andrea Baschirotto General Chair   DOWNLOAD CALL FOR PAPERS September 2022 19-22 MILAN, ITALY CO-ORGANIZER ADMINISTRATIVE SECRETARIAT MBTechnoServices  E-mail ORGANIZING SECRETARIAT Sistema Congressi s.r.l.  E-mail HOTEL ACCOMMODATION IN MILAN! Milan is an extraordinarily live city, full of any kind of event all year through. September is usually the busiest month of the year therefore we strongly advise all ESSCIRC ESSDERC participants to make their hotel reservation as soon as possible. Have a look at our hotels! DIAMOND SPONSORS                       SILVER SPONSORS                                      BRONZE SPONSORS

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#Thuringia is #Europe’s #siliconvalley #semi #chips #technology #manufacturing https://t.co/EVkFDZaquA

#Thuringia is #Europe’s #siliconvalley #semi #chips #technology #manufacturing https://t.co/EVkFDZaquA

— Wladek Grabinski (@wladek60) Dec 22, 2021

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December 22, 2021 at 12:25PM
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Re: [mos-ak] [Open Hardware] [CfP] Computer Aided Modeling and Design Development Room

We are pleased to announce the CfP for the Open Source Computer Aided
Modeling and Design devroom at FOSDEM 2022, on Saturday, 5 February 2022.

FOSDEM website: https://fosdem.org/2022/
FOSDEM Code of Conduct: https://fosdem.org/2022/practical/conduct/

We hope you'll join us for a full day of talks, demos and interesting
discussions on designing, modeling and testing physical objects using
Open Source tools. This year's event will be fully virtual (:sad trombone:)
and will feature multiple channels for talks, Q&A as well as
hallway discussions (:happy dance:).

We welcome any talk proposals about the creation of physical objects.

Topics of interest include, but are not limited to:
- Open Hardware projects
- Circuit Design
* Printed circuit board design tools
* Circuit simulation
- 3d modeling and analysis
* Solid modeling tools
* Meshing, modeling and transforming physical representations
* Finite element analysis
- 3d printing
* 3d slicing tools
* Motor control
- Machine design and integration
* ECAD/MCAD integration
* Thermal analysis
* Wire modeling
- Physical Model Data storage
* Data representation and optimization
* Version control in hardware data storage
* Collaborative and team-based hardware design techniques

Slots will be allocated for short (20 minutes), long (40 minutes)
talks and in-depth (60 minutes). This includes question time, for which
you should budget at least 20% of your time.

Speakers need to specify their preferred format. Both include time for
questions and answers.

Depending on the number of submissions, submitters may be asked to
utilize an alternate time format.

The submission process

Please submit your proposals at
https://penta.fosdem.org/submission/FOSDEM22

If you already have a Pentabarf account (for example as a result of
having submitted a proposal in the past), make sure you use it to log in
and submit your proposal. Do not create a new account if you already
have one.

Please include the following information with your submission:

- Abstract
- Preferred Session length
- Speaker bio
- Link to any hardware / code /slides for the talk

When you submit your proposal (creating an "Event" in Pentabarf), make
sure you choose the "Open Source Computer Aided Modeling and Design" in
the track drop-down menu. Otherwise your proposal may go unnoticed.
Fill in at least a title and abstract for the proposed talk and a
suggested duration. Keep in mind that much of the value in these
meetings comes from the discussions, so please allot at least 20%
of the talk time for questions and answers.


Important dates

- Call for papers available: 29 November 2021
- Call for participation closes: 28 December 2021
- Devroom schedule available: 1 January 2022
- Talk recording uploads due: 20 January 2022
- Devroom day: Saturday 5 February 2022 (09:00 to 17:00)


Recordings

Because this year's conference will be fully virtual, all talks must be pre-recorded. These will be verified for sound and video quality prior to the conference.

Each accepted talk will have a dedicated chaperone to help you through the process of recording, encoding and uploading your talk.

The recordings will be published under the same licence as all FOSDEM
content (CC-BY).
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https://lists.fosdem.org/listinfo/open-hardware-devroom

#Silex Microsystems Buys 200mm #Wafer #Fab from #Elmos

[PRESS RELEASE https://t.co/FmSEaAyXA5] #Silex Microsystems Buys 200mm #Wafer #Fab from #Elmos #Semiconductor #semi #chips #manufacturing #technology https://t.co/QUKs5GbYGa

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December 16, 2021 at 10:14AM
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#India outlines $10bln plan to woo global #chip makers

[https://t.co/GtCzYQqcBP] #India outlines $10bln plan to woo global #chip makers #semi #manufacturing #techinnovation https://t.co/XWNRKfJDPv

— Wladek Grabinski (@wladek60) Dec 16, 2021

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December 16, 2021 at 10:09AM
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[paper] Compact Geiger Counters

E. A. Maurchev, Yu. V. Balabin and A. V. Germanenko

Compact Geiger Counters as Additional Tools for Verifying Models 

of Cosmic Ray Transport through the Earth’s Atmosphere

Bulletin of the Russian Academy of Sciences

Physics volume 85, pages1294–1296 

(Published: 10 December 2021)

DOI: 10.3103/S106287382111023X

   

*Polar Geophysical Institute, Apatity (RU)

Abstract: Descriptions and technical characteristics are given for compact Geiger counters designed to verify calculations of cosmic ray transport through the Earth’s atmosphere. Results are presented in the form of a comparison of the altitude profiles of count rates of charged particles, obtained via modeling and field experiments.

Fig: Comparison of the count rate altitude profiles obtained during the balloon probe launch for different time periods and airborne measurements and results from modeling a GCR proton transit. The triangle on the left is probe measurements for Jan. 4, 2010; the triangle on the right, probe measurements for Jan. 1, 2010. The inverted triangle is probe measurements for Jan. 18, 2010; the upright triangle, probe measurements for Jan. 20, 2010. Crosses are measurements on an Airbus in 2018 (67.95 N and 32.8 E, climbing), and the solid line is calculated data.

Łukasiewicz R&D Network

The Łukasiewicz Research Network is a unique project of great commercial potential. The Network is an integrated market player providing attractive, comprehensive and competitive business solutions in the fields of automation, chemicals, biomedicine, ICT, materials, and advanced manufacturing. With 8,000 staff and 32 research institutes located in 12 cities across Poland,  Łukasiewicz R&D Network the third largest research EU network.

Map of the Sieć Badawcza Łukasiewicz 

Open Large Map

The Łukasiewicz Network main R&D directions are derived from areas influencing the achievement of the goals outlined in the National Strategy for Responsible Development. Within Łukasiewicz Network are four Research Groups corresponding to the recommended directions: Health, Clean and smart mobility, Sustainable Economy and Energy, and Digital Transformation.

Guardian of Verilog-A Compact Models

on 02/02/2020, Geoffrey Coram, Staff CAD Engineer at Analog Devices and Verilog-A Recommended Practices CMC Chair was honored by Prof. Chenming Hu and the BSIM Group at UC Berkeley, naming him as "Guardian of Verilog-A Compact Models for the Global Semiconductor Industry"

[paper] Analytical Compact Model Of Cylindrical Junctionless Nanowire FETs

Adelcio M. de Souza, Daniel R. Celino, Regiane Ragi, Murilo A. Romero

Fully analytical compact model for the Q–V and C–V characteristics 

of cylindrical junctionless nanowire FETs

Microelectronics Journal (2021): 105324

DOI: 10.1016/j.mejo.2021.105324

   

University of Sao Paulo (EESC/USP), Sao Carlos (BR)

Abstract: This paper develops a new compact model for the Q–V and C–V characteristics of cylindrical junctionless nanowire FETs in which the nanowire radius is large enough, in such a way that quantum confinement effects can be neglected. Our model is fully analytical and valid for all bias regimes, i.e., subthreshold, partial depletion, and accumulation. The obtained Q-V and C–V characteristics, as well as their derivatives, are continuous across the full range of bias voltages. The model is fully physics-based, with no fitting parameters, and it is very intuitive, since it relies on the understanding of the device as a gated resistor. Model validation is performed against previous results in the literature, demonstrating very good agreement.

Fig.  Validation of our C–V model (solid lines) in comparison to numerical results, highlighting the effect of parasitic capacitance. The free-carrier capacitance component from new model is shown in dashed lines. Simulation parameters: tox = 4.5nm, Nd = 1.6E18 cm−3, L = 200nm, VFB = 1.09V and Vds = 0.05V.

Acknowledgments: The authors would like to thank the Brazilian funding agencies CAPES, CNPq, and Fapesp for their financial support: Conselho Nacional de Desenvolvimento Científico e Tecnologico. Grant Number: 303708/2017-4; Coordenaçao de Aperfeiçoamento de Pessoal de Nível Superior; Fundaçao de Amparo a Pesquisa do Estado de Sao Paulo. Grant Number: 18/13537-6.

[paper] Automated Compact Model Parameter Extraction

Marc Huppmann∗, Klaus-Willi Pieper†, Andi Buzo†, Linus Maurer∗ and Georg Pelz†

Utilizing Differential Evolution for an Automated Compact Model Parameter Extraction

In 2021 International Semiconductor Conference (CAS), pp. 231-234. IEEE, 2021.

   
∗ Universitat der Bundeswehr Munchen, Neubiberg, Germany
† Infineon Technologies AG, Neubiberg, Germany

Abstract: Parameter extraction is a challenging task, as it searches for a solution inside a high dimensional plus non- convex space. To be able to apply well known gradient based optimizers, the problem is dissected into multiple simpler yet intertwined tasks, which yields a complex and manual labour intensive procedure. On the contrary to gradient based methods, genetic algorithms perform excellent on global search problems, which eliminates the need for such a sophisticated workflow. In this paper, a highly automated methodology is presented that is capable of replacing the standard manual extraction sequence for the BSIM MOSFET compact model. Due to its superior extreme finding behaviour, the Differential Evolution algorithm is applied in combination with a special error metric to ensure a high fitting quality, in all regions of the output and transfer curves. Repeatably good results for 20k measurement points are obtained, with a reduction of factor 10 in total fitting duration, while coincidentally consuming mostly computation instead of manual labour time.

Fig: With every iteration, the errors approach each other till

they meet in roughly one point and σi terminates the fitting.