Showing posts with label velocity saturation. Show all posts
Showing posts with label velocity saturation. Show all posts

Dec 30, 2025

[paper] Compact IV Model for DG MoS2 FETs

Ahmed Mounir, Francois Lime, Alexander Kloes, Alexandros Provias, Theresia Knobloch, 
K. P. O’Brien, Tibor Grasser and Benjamin Iniguez
Compact I–V Model for Double-Gated MoS2 FETs Including Short-Channel Effects
IEEE TED, Vol. 72, No. 12, Dec 2025
DOI: 10.1109/TED.2025.3622099

Rovira i Virgili University, Tarragona (SP)
THM University of Applied Sciences, Giessen (D)
Technical University of Vienna (A)
Intel Foundry Technology Research, Hillsboro (US)

Abstract: This article presents a physics-based analytical compact model for double-gated molybdenum disulfide (MoS2) field effect transistors (FETs), incorporating key physical and short-channel effects (SCEs), such as mobility degradation and velocity saturation. The model is developed from a unified charge control model by evaluating the charge density within the 2D MoS2 layer, represented using the Lambert W function, which provides an analytical expression valid and continuous from the subthreshold to the above threshold regime. The drain current is then derived from this unified charge control model, and as a function of closed-form equations for the charge densities at the source and drain ends of the channel. Despite its simplicity, the model shows excellent agreement with experimental data for channel lengths down to 60nm, making it a powerful tool for accurately predicting the performance of downscaled devices. By including SCEs, this work extends previous modeling efforts and provides a more comprehensive framework for the simulation and optimization of 2D material-based FETs in circuit design.
FIG: Cross-sectional view of the double-gated MoS2 FET, showing the top gate oxide stack made of Al2O3 and HfO2, with the local back gate oxide consisting of HfO2. Validation of the compact model against experimental data for double-gate MoS2 FET L = 60nm (bottom line)

Acknowledgements: This work was supported in part by European Union Bayesian inference with flexible electronics for biomedical applications (BAYFLEX) under Contract 101099555 and in part by the Ministry of Science of Spain under Contract PID2021122399OB-I00

Aug 30, 2021

Generalized EKV Compact MOSFET Model

On the Explicit Saturation Drain Current in the Generalized EKV Compact MOSFET Model
Francisco J. García-Sánchez, Life Senior Member, IEEE,
and Adelmo Ortiz-Conde, Senior Member, IEEE
IEEE TED Aug 9. 2021
DOI: 10.1109/TED.2021.3101186

*Solid State Electronics Laboratory, Universidad Simón Bolívar, Caracas 1080, Venezuela


Abstract: We present and discuss explicit closed-form expressions for the saturation drain current of short channel metal-oxide-semiconductorfield-effect transistors (MOSFETs) with gate oxide and interface-trapped charges, and including carrier velocity saturation, according to the generalized Enz-Krummenacher-Vittoz (EKV) MOSFET compact model. The normalized saturation drain current is derived as an explicit function of the normalized terminal voltages by solving the transcendental voltage versus charge equation using the Lambert W function. Because this special function is analytically differentiable, other important quantities, such as the transconductance and the transconductance-to-currentratio, can be readily expressed as explicit functions of the terminal voltages.
Fig: Comparison of simulated transfer characteristics with (red lines and symbols) and another without (black lines and symbols) radiation-induced oxide and interface-trapped charges. Calculation of VGB versus IDsat (lines) comes from denormalization and the explicit IDsat versus VGB (symbols) comes from denormalization of the proposed explicit expressions