Weiran Cai, Wenrui Lan, Zichao Ma*, Lining Zhang, Mansun Chan*
A Full-region Model for Ultra-Scaled MoS2 MOSFET Covering Direct Source-Drain Tunneling
9th International Symposium on Next Generation Electronics (ISNE), 2021, pp. 1-3,
DOI: 10.1109/ISNE48910.2021.9493621
College of Electronic and Information Technology, Shenzhen University, Shenzhen, China
* Hong Kong University of Science and Technology, Hong Kong, China
Abstract: A full-region model for ultra-scaled monolayer MoS2 MOSFETs is reported in this work. The electrostatic potential in the scaled transistor structure is analyzed based on a first-principle verified potential model. A continuous full region current model is then developed to capture the short channel effects. Based on the potential model, the barrier height and width for direct source-drain tunneling are obtained. The direct tunneling module reproduces the essential physics observed from numerical device simulations. After integration with the thermionic emission model, the full-region current model is implemented into a SPICE simulator and the model convergence is verified by simulating typical circuits.
A drift-diffusion current model of the full region is straightforwardly derived with Taylor expansions of a Si model or from the Pao-Sah integral. It resembles the EKV current model and allows similar expressions of small signal models:
Fig: The impact of SCEs on devices of different channel length is
showed in (a) Ids–Vg and (b) Ids–Vd characteristics predicted by the model
covering SCEs. When channel length becomes smaller, SCEs becomes
more serious.
Acknowledgement: This work is supported in part by the Natural Science Foundation of China under Grant 61704144, the Shenzhen Science and Technology Project under JCYJ20180305125340386, the General Research Fund (GRF) from Research Grant Council (RGC) of Hong Kong under Grant 16206219
