Showing posts with label circuit simulation. Show all posts
Showing posts with label circuit simulation. Show all posts

Aug 10, 2023

[paper] 5-DC-parameter MOSFET model

Deni Germano Alves Neto1, Cristina Missel Adornes1, Gabriel Maranhao1, Mohamed Khalil Bouchoucha2,3, Manuel J. Barragan3, Andreia Cathelin2, Marcio Cherem Schneider1, Sylvain Bourdel3 and Carlos Galup-Montoro1
A 5-DC-parameter MOSFET model for circuit simulation in QucsStudio and SPECTRE
2023 21st IEEE Interregional NEWCAS Conference (NEWCAS) 
DOI: 10.1109/NEWCAS57931.2023.10198173

1 Federal University of Santa Catarina, Florianopolis (BR)
2 STMicroelectronics, Crolles (F)
3 Univ. Grenoble Alpes, CNRS, Grenoble INP, TIMA, Grenoble (F)


Abstract: A minimalist MOSFET model for circuit simulation with only five DC parameters written in Verilog-A is presented. The five parameters can be extracted from direct and simple methods in common circuit simulators. The DC characteristics of transistors in both 180-nm bulk CMOS and 28-nm FD-SOI technologies generated by the five-parameter model are compared with those generated by the BSIM and UTSOI2 models, respectively. The simulation of some basic circuits using the proposed 5-DC-parameter MOSFET model shows good matching with the simulation using the BSIM model, at the benefit of a much simpler set of DC parameters.
Fig: DC characteristic gm/ID vs. id used to extract ζ.


REF:
[1] Advanced Compact MOSFET (ACM) in C. M. Adornes, D. G. Alves Neto, M. C. Schneider, and C. Galup-Montoro, “Bridging the gap between design and simulation of low voltage CMOS circuits,” Journal of Low Power Electronics and Applications, vol. 12, no. 2, 2022.

Aug 6, 2021

[paper] Compact device modeling and simulation with Qucs/Qucs-S/Xyce modular libraries

Mike Brinson and Felix Salfelder 
Compact device modeling and simulation with Qucs/Qucs-S/Xyce modular libraries 
In 28th MIXDES (2021), pp. 35-40 
DOI: 10.23919/MIXDES52406.2021.9497545 

Abstract—The rapid development of new semiconductor materials and devices has highlighted the need for compact modeling and circuit simulation tools that can be easily adapted to accommodate emerging technologies. In most instances device modeling tools employ non-linear behavioural sources and Verilog-A modules for model prototype construction. This paper is concerned with the properties and application of modular user defined/plugin library toolkit that combines the best features of behavioural source and Verilog-A modeling practice while encouraging user extensions. The toolkit has been implemented as a Qucs/Qucs-S/Xyce modular library that is loadable on demand. To demonstrate its capabilities and flexibility a series of compact device models are introduced and their simulated performance presented and evaluated.
Fig: A Qucs-S/Xyce test bench for simulating and displaying BJT Ic/V ce
output characteristics with 1µA ≤ Ib ≤ 10µA in 1µA steps.




Jul 21, 2021

[paper] 11.8 GHz Fin Resonant Body Transistor

Analysis and Modeling of an 11.8 GHz Fin Resonant Body Transistor 
in a 14nm FinFET CMOS Process 
Udit Rawat, Student Member, IEEE, Bichoy Bahr*, Member, IEEE, 
and Dana Weinstein, Senior Member, IEEE
arXiv:2107.04502v1 [physics.app-ph] 9 Jul 2021
 
Department of Electrical Engineering, Purdue University, West Lafayette USA
*Kilby Labs - Texas Instruments, Dallas, TX, USA.

Abstract: In this work, a compact model is presented for a 14 nm CMOS-based FinFET Resonant Body Transistor (fRBT) operating at a frequency of 11.8 GHz and targeting RF frequency generation/filtering for next generation radio communication, clocking, and sensing applications. Analysis of the phononic dispersion characteristics of the device, which informs the model development, shows the presence of polarization exchange due to the periodic nature of the back-end-of-line (BEOL) metal PnC. An eigenfrequency-based extraction process, applicable to resonators based on electrostatic force transduction, has been used to model the resonance cavity. Augmented forms of the BSIM-CMG (Common Multi-Gate) model for FinFETs are used to model the drive and sense transistors in the fRBT. This model framework allows easy integration with the foundry-supplied process design kits (PDKs) and circuit simulators while being flexible towards change in transduction mechanisms and device architecture. Ultimately, the behaviour is validated against RF measured data for the fabricated fRBT device under different operating conditions, leading to the demonstration of the first complete model for this class of resonant device integrated seamlessly in the CMOS stack.
Fig: Complete 3D FEM Simulation model depicting two adjoining fRBT unit cells. Mx (x=1-3) and Cy (y=4-6) represent the first 6 metal levels that form a part of the BEOL PnC.

Acknowledgement: This work was supported in part by the DARPA MIDAS Program.



 

Sep 7, 2020

OFETs Compact Modeling

Advances in Compact Modeling of Organic Field-Effect Transistors
Sungyeop Jung1, Member, IEEE, Yvan Bonnassieux2, Gilles Horowitz2, Sungjune Jung1, Member, IEEE, Benjamin Iñiguez3, Fellow, IEEE, and Chang-Hyun Kim4, Senior Member, IEEE
IEEE J-EDS (Early Access)
DOI: 10.1109/JEDS.2020.3020312

1Future IT Innovation Laboratory and Department of Creative IT Engineering, Pohang University of Science and Technology, Pohang 37673, South Korea.
2LPICM, Ecole Polytechinque, CNRS, 91128 Palaiseau, France.
3DEEEA, Universitat Rovira i Virgili, Tarragona 43007, Spain.
4Department of Electronic Engineering, Gachon University, Seongnam 13120, South Korea

Abstract: In this review, recent advances in compact modeling of organic field-effect transistors (OFETs) are presented. Despite the inherent strength for printed flexible electronics and the extremely aggressive research conducted over more than three decades, the OFET technology still seems to remain at a relatively low technological readiness level. Among various possible reasons for that, the lack of a standard compact model, which effectively bridges the device- and system-level development, is clearly one of the most critical issues. This paper broadly discusses the essential requirements, up-to-date progresses, and imminent challenges for the OFET compact device modeling toward a universal, physically valid, and applicable description of this fast-developing technology.

Figure (a) Cross-sectional illustration and (b) circuit diagram with multi-component overlap capacitances of the printed 3-D organic complementary inverter, and (c) measured and simulated transient output voltage of an 11-stage ring oscillator.



Jul 22, 2020

[paper] Compact Model of All-Optical-Switching Magnetic Elements

J. Pelloux-Prayer1 and F. Moradi1
Compact Model of All-Optical-Switching Magnetic Elements
IEEE TED, vol. 67, no. 7, pp. 2960-2965, July 2020
DOI: 10.1109/TED.2020.2991330.
1Department of Engineering, Aarhus University, 8200 Aarhus, Denmark

Abstract: We present, for the first time, a Verilog-A compact model for an all-optically switchable magnetic tunnel junction (MTJ) using results of all-optical-switching (AOS) simulations. Our model is compatible with electronics and photonics design automation tools, and was tested using Cadence Specter and Virtuoso. This compact model can be used to design circuits and systems combining MTJs, photonic circuits, and electronic circuits giving the possibility to researchers working within this field to develop novel circuits and systems.
Fig: Equivalent circuit of the AOS model with LLGS module and LUT module.

Aknowledgement: This work was supported by the European Union’s Horizon 2020 Research and Innovation Programme under Grant 713481.

Jul 14, 2020

[paper] First Principles Based Compact Model for 2D-Channel MOSFETs

Das, Biswapriyo, and Santanu Mahapatra
First Principles Based Compact Model for 2D-Channel MOSFETs
researchgate.net online publication

Abstract: We propose a generalized compact model for any two-dimensional material channel-based metal-oxide-semiconductor field-effect transistors. Unlike existing ones, the proposed model is first principles based and thus has ability to predict the circuit performance only using the crystallographic information of the channel material. It is ‘core’ in nature and developed following the industry-standard drift-diffusion formalism based ‘top-down’ hierarchy employing the FermiDirac statistics. We also implement the model in professional circuit simulator and good convergence is observed in 15-stage ring oscillator simulation.
Fig: Synopsis of the modeling framework. First, certain material specific parameters are extracted employing density functional theory computations and Hamiltonian calibration, which thereafter are used to develop the compact device model of the 2D-channel MOSFET using drift-diffusion formalism. The drain current and terminal charges obtained henceforth are used to implement digital circuits in commercial circuit simulator using its Verilog-AMS interface. 

Nov 11, 2019

8th International NRNU MEPhI Workshop

VIII Международный научно-методический семинар по средствам автоматизированного проектирования интегральных микросхем для физического эксперимента совместно с компанией Cadence

it is our pleasure to announce the 8th International Workshop and school on computer aided design of integrated circuits for physical experiments to be held at NRNU MEPhI on November 25-27, 2019. The Workshop and school are organized by NRNU MEPhI jointly with Cadence Design Systems. The program and further information are available via site cad.mephi.ru.

Participation in the event is free of charge but registration is necessary.

E. Atkin, NRNU MEPhI event secretary,

Apr 19, 2016

[mos-ak] A new approach to compact semiconductor device modelling with Qucs Verilog-A analogue module synthesis

A new approach to compact semiconductor device modelling with Qucs Verilog-A analogue module synthesis  

M. E. Brinson 1,* andV. Kuznetsov 2  

Keywords:Qucs; Verilog-A analogue module synthesis;equation-defined devices (EDD); compact device modelling; circuit simulation  

Summary: Since the introduction of SPICE non-linear controlled voltage and current sources, they have become a central feature in the interactive development of behavioural device models and circuit macromodels. The current generation of SPICE-based open source general public license circuit simulators, including Qucs, Ngspice and Xyce©, implements a range of mathematical operators and functions for modelling physical phenomena and system performance. The Qucs equation-defined device is an extension of the SPICE style non-linear B type controlled source which adds dynamic charge properties to behavioural sources, allowing for example, voltage and current dependent capacitance to be easily modelled. Following, the standardization of Verilog-A, it has become a preferred hardware description language where analogue models are written in a netlist format combined with more general computer programming features for sequencing and controlling model operation. In traditional circuit simulation, the generation of a Verilog-A model from a schematic, with embedded non-linear behavioural sources, is not automatic but is normally undertaken manually. This paper introduces a new approach to the generation of Verilog-A compact device models from Qucs circuit schematics using a purpose built analogue module synthesizer. To illustrate the properties and use of the Qucs Verilog-A module synthesiser, the text includes a number of semiconductor device modelling examples and in some cases compares their simulation performance with conventional behavioural device models. Copyright © 2016 John Wiley & Sons, Ltd.  

Article first published online: 15 APR 2016; DOI: 10.1002/jnm.2166  


References
[1] Newton AR, Pederson DO, Sangiovanni-Vincentelli A. SPICE Version 2g User's Guide. Department of Electrical Engineering and Computer Sciences, University of California: Berkeley, CA, 1981.
Go here for SFX
[2] Johnson B, Quarles T, Newton AR, Pederson DO, Sangiovanni-Vincentelli A. Berkeley, CA. Department of Electrical Engineering and Computer Sciences, University of California, 1992.
Go here for SFX
[3] Brinson M, Crozier R, Kuznetsov V, Novak C, Roucaries B, Schreuder F, Torri GT. Qucs (Quite universal circuit simulator), 2015. Available from: http;//qucs.sourceforge.net [Accessed November 2015].
[4] Nenzi P, Vogt H. Ngspice-26 (Next generation SPICE version 26), 2015. Available from: http://ngspice.sourceforge. net. [Accessed November 2015].
[5] Sandia National Laboratories, US, Xyce parallel electronic simulator version 6.3., 2015. Available from: http: //xyce.sandia.gov.[Accessed November 2015].
[6] Jahn S, Brinson ME. Interactive compact device modelling using Qucs equation-defined devices. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields 2008; 21(5): 335–349.
Direct Link:
Abstract PDF(1011K) References Web of Science® Times Cited: 7 Go here for SFX
[7] Brinson ME, Jahn S. Qucs: a GPL software package for circuit simulation, compact device modelling and circuit macromodelling from DC to RF and beyond. International Journal of Numerical Modelling: Electronic Networks, Devices and Fields 2009; 22(4): 297–319.
Direct Link:
Abstract PDF(1156K) References Web of Science® Times Cited: 7 Go here for SFX
[8] Accellera, Verilog-AMS Language Reference Manual. Version 2.3.1., 2009. Available from: http://www.accellera.org. [Accessed November 2015.]
[9] Silicon Integration Initiative (Si2), Compact Model Coalition, 2015. Available from: http;//www.si2.org. [Accessed November 2015.]
[10] Brinson ME, Jahn S. Modelling high-frequency inductance with Qucs non-linear radio frequency equation defined devices.International Journal of Electronics 2009; 96(3): 307–321.
CrossRefWeb of Science® Times Cited: 1
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[11] Lemaitre L, Gu B. ADMS - A fully Customizable Compact Model Compiler, NSTI-Nanotech, 2008. Available from: www.nsti.org[Accessed March 2016].
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[12] Lemaitre L, Grabinski W, McAndrew C. Compact device modelling using Verilog-AMS and AMS. Electron Technology (Internet Journal). June 6 2003, pp 1-5. Available from: http://www.ite.waw.pl/etij/pdf/35-03p.pdf. [Accessed November 2015.]
[13] Lemaitre L, McAndrew CM, Hamm S. Automatic Device Model Synthesis. CICC: Florida, USA, 2002.
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[14] Eaton JW. GNU Octave. Version 4.0, 2015. Available from: https:www.gnu.org/software/octave/. [Accessed November 2015.]
[15] Brinson M, Crozier R, Novak C, Roucaries B, Schreuder F, Torri GT. Building a second generation Qucs GPL circuit simulator: package structure, simulation features and compact device modelling capabilities. London, 2014. Available from: http://www.mos-ak.org/london−2014/presentations/09−Mike−Brinson−MOS-AK−London−2014.pdf. [Accessed November 2015].
Go here for SFX
[16] Brinson M, Crozier R, Kuznetsov V, Novak C, Roucaries B, Schreuder F, Torri GT. Qucs: an introduction to the new simulation and compact device modelling features implemented in release 0.0.19/0.0.19Src2 of the popular GPL circuit simulator. MOS-AK ESSDERC/ESSCIRC Workshop. 18 September Graz, Austria 2015. Available from: http://www.mos-ak.org/graz−2015/presentationsT−5−Brinson−MOS-AK−Graz−2015.pdf. [Accessed November 2015].
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[17] Anognetti P, Massobrio G. Semiconductor Device Modeling with SPICE. McGraw-Hill Inc: New York, 1988.
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