[paper] Compact device modeling and simulation with Qucs/Qucs-S/Xyce modular libraries

Mike Brinson and Felix Salfelder 

Compact device modeling and simulation with Qucs/Qucs-S/Xyce modular libraries 

In 28th MIXDES (2021), pp. 35-40 

DOI: 10.23919/MIXDES52406.2021.9497545 

Abstract—The rapid development of new semiconductor materials and devices has highlighted the need for compact modeling and circuit simulation tools that can be easily adapted to accommodate emerging technologies. In most instances device modeling tools employ non-linear behavioural sources and Verilog-A modules for model prototype construction. This paper is concerned with the properties and application of modular user defined/plugin library toolkit that combines the best features of behavioural source and Verilog-A modeling practice while encouraging user extensions. The toolkit has been implemented as a Qucs/Qucs-S/Xyce modular library that is loadable on demand. To demonstrate its capabilities and flexibility a series of compact device models are introduced and their simulated performance presented and evaluated.

Fig: A Qucs-S/Xyce test bench for simulating and displaying BJT Ic/V ce

output characteristics with 1µA ≤ Ib ≤ 10µA in 1µA steps.

Qucs-S as R&D design software

Qucs-S 

is not a simple circuit simulator, but also a research software. Please cite your R&D articles, if you are using Qucs-S in your research.

Documentation

• Main documentation page at readthedocs.io
• Presentation at the Spring MOS-AK 2016 at Lausanne
• Presentation at the Spring MOS-AK 2017 at Lausanne
• Presentation at the MIXDES2017 conference: Part 1 and Part 2

Publications

Qucs-S is not a simple circuit simulator, but also a research software. Please cite our articles, if you are using Qucs-S in your research.

1. Brinson, M. E., and Kuznetsov, V. (2016) A new approach to compact semiconductor device modelling with Qucs Verilog-A analogue module synthesis. Int. J. Numer. Model., 29: 1070-1088. (BibTeX)
2. D. Tomaszewski, G. Głuszko, M. Brinson, V. Kuznetsov and W. Grabinski, "FOSS as an efficient tool for extraction of MOSFET compact model parameters," 2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems, Lodz, 2016, pp. 68-73. (BibTeX)
3. M. Brinson and V. Kuznetsov, "Qucs-0.0.19S: A new open-source circuit simulator and its application for hardware design," 2016 International Siberian Conference on Control and Communications (SIBCON), Moscow, 2016, pp. 1-5. (BibTeX)
4. M. Brinson and V. Kuznetsov, "Improvements in Qucs-S equation-defined modelling of semiconductor devices and IC's," 2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems, Bydgoszcz, 2017, pp. 137-142. (BibTeX)
5. M. Brinson and V. Kuznetsov, "Extended behavioural device modelling and circuit simulation with Qucs-S" International Journal of Electronics, 2017, pp.1 - 14 (BibTeX)

[paper] Recent Developments in Qucs-S Equation-Defined Modelling of Semiconductor Devices and IC’s

Recent Developments in Qucs-S Equation-Defined Modelling of Semiconductor Devices and IC’s

Mike Brinson, and Vadim Kuznetsov

International Journal of Microelectronics and Computer Science

2017, Volume 8, Number 1 

ISSN 2080-8755 / eISSN 2353-9607

Abstract—The Qucs Equation-Defined Device was introduce roughly ten years ago as a versatile behavioural simulation component for modelling the non-linear static and dynamic properties of passive components, semiconductor devices and IC macromodels. Today, this component has become an established element for building experimental device simulation models. It’s inherent interactive properties make it ideal for device and circuit modelling via Qucs schematics. Moreover, Equation-Defined Devices often promote a clearer understanding of the factors involved in the construction of complex compact semiconductor simulation models. This paper is concerned with recent advances in Qucs-S/Ngspice/XSPICE modelling capabilities that improve model construction and simulation run time performance of Equation-Defined Devices using XSPICE model syntheses. To illustrate the new Qucs-S modelling techniques an XSPICE version of the EPFL EKV v2.6 long channel transistor model together with other illustrative examples are described and their performance simulated with Qucs-S and Ngspice [read more...]

Fig: EKV2.6 Qucs-S long channel static I/V model test bench and typical simulated I/V output characteristics as Qucs-S Equation-Defined Model