[paper] Open-source design of integrated circuits

Patrick Fath, Manuel Moser, Georg Zachl. Harald Pret

Open-source design of integrated circuits

Elektrotech. Inftech. (2024)

DOI: 10.1007/s00502-023-01195-5

* Institute for Integrated Circuits, Johannes Kepler University Linz, Austria

Abstract: This paper presents the design of a self-clocked 12-bit non-binary fully differential SAR-ADC using the SKY130 open-source PDK. The entire mixed-signal circuit design and layout were created with free and open-source software. The ADC reaches a sample rate of up to 1.44MS/s at 1.8V supply while consuming 703μW of power on a small 0.175mm area. A configurable decimation filter can increase the ADC resolution up to 16 bits while using an oversampling factor of 256. A 9‑bit thermometer-coded and 3‑bit binary-coded DAC matrix using a 448 aF waffle-capacitor results in a total capacitance of 1.83pF per input. Realizations of configurable analog functions using the form factor of SKY130 high-density standard cells allow the parametrization of an analog circuit in a hardware description language and hardening of the macro in an intentionally digital workflow.

FIG: Block diagram of the proposed open-source design flow,

including the essential tools and used/generated files

Acknowledgements: The authors thank Johannes Kepler University for funding the open-access publication, Google and SkyWater Technologies for igniting this recent wave of open-source IC design, and the large crowd of enthusiasts spending their time on developing and maintaining an extensive array of exciting open-source EDA projects. Open access funding provided by Johannes Kepler University, Linz.

[paper] OTA using the Open Sky130 PDK

Carolina Vieira Souza, Edmar Philipe Ribeiro

and Estêvao Coelho Teixeira

Design of a Linear Transconductance OTA using the Open Sky130 Process Design Kit

Sociedade Brasileira De Microeletrônica

(2023) sbmicro.org.br

Faculdade de Engenharia, Universidade Federal de Juiz de Fora, Brazil

Abstract: This paper describes the design, layout and simulation of a linear transconductance Operational Transconductance Amplifier (OTA) using the SkyWater 130nm open Process Design Kit (PDK). By using a known source degeneration technique, it is possible to either decrease and linearize the transconductance of the OTA for a wider range of input voltages, making it proper for use on Gm-C filters. Only open source tools, suited for the Sky130 PDK, were used in this design, showing the applicability to analog designs.

Fig: Linear OTA Structure: (a) Complete circuit, with source degeneration resistors;
(b) Alternative source degeneration triode MOSFETs; and its GDSII layout, with identification of some relevant parts: (A) differential pair; (B) source-degeneration resistors; (C) biasing transistors.

Acknowledgment: This work is result from a scientific initiation project covered by the VI VIC 2022/2023 Program, by PROPP/UFJF.

Mixed Signal SoC design Marathon using eSim & SKY130

Marathon Date : 23 Sept. - 8 Oct. 2022

The following submissions are adjudged as Outstanding, Excellent, Very good and Good by the FOSSEE and the VSD teams.

• Outstanding
• Excellent
• Very Good
• Good

List of Outstanding Circuits:

#	Participant	Circuit	Institute	GitHub
1	Milad Vafaieenezhad	Window Comparator Along with MOD-16 Counter for Counting Based Data Line Selection Operation	Shahed University	View Repo
2	Krunal Badlani	Crack Sensing Circuit	Indian Institute of Technology Hyderabad	View Repo
3	Karuppusamy V	Flash Type ADC	Bannari Amman Institute of Technology	View Repo
4	Inderjit Singh Dhanjal	32-bit SRAM implementation in eSim using Skywater 130nm CMOS technology	K. J. Somaiya College of Engineering	View Repo
5	Tanay Das	Design of a Class D Audio Amplifier IC Using Sliding Mode Control and Negative Feedback	Sikkim Manipal Institute of Technology	View Repo
6	Jayanth Nedunuri	Implementation of 4 bit Two Step Flash ADC	Jyothishmathi institute of Technology and Science	View Repo
7	Aishwarya Balkrishna Patil	Design and Implementation of Automatic Security Monitoring System	Kolhapur Institute of Technology’s College of Engineering, Kolhapur	View Repo
8	Swagatika Meher	3-bit CMOS based TIQ comparator Flash ADC	Odisha University of Technology and Research, Bhubaneswar, Odisha	View Repo
9	Surya V	3-bit Flash ADC using ROM-based Encoder	National Institute of Technology, Tiruchirapalli	View Repo
10	Sanket M Mantrashetti	Design of 8x8 SRAM based on 6T SRAM cell	R. V. College of Engineering	View Repo
11	Avishek Choudhary	10-bit C2C DAC	Thapar Institute of Engineering and Technology	View Repo
12	Nalinkumar S	Implementation of Quadruple - Window Comparator Along with Prioritized MOD-16 Counter for Data Line Multiplexing Operation	Madras Institute of Technology Campus, Anna University	View Repo
13	Rubankumar D	Astable Multivibrator Along with MOD-16 Counter for Counting Based Data Line Selection Operation	Madras Institute of Technology Campus, Anna University	View Repo
14	Vanshika Tanwar	Implementation of 3 Bit Flash ADC performed in eSim	Dronacharya Group Of Institutions, Greater Noida	View Repo
15	Ravi Prakash Vishwakarma	8 Bit Counter/Ramp Type ADC	Madan Mohan Malaviya University Of Technology	View Repo
16	E Balakrishna	Implementation of 4 Bit Flash ADC mixed signal circuit using 130nm performed in eSim	Dronacharya Group of Institution, Greater Noida	View Repo

Contact eSim-fossee:
For more information about the marathon, write to us at contact-esim[at]fossee[dot]in