Apr 29, 2025
[paper] Avalanche Multiplication in SiGe HBTs
Mar 6, 2023
[open position] IHP Research Associate for Open PDK Development
The position:
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Have we sparked your interest? Then we look forward to receiving your application via our online application form. For further information regarding the position, please contact Dr. René Scholz
Oct 21, 2020
[Survey] Power Amplifiers Performance 2000-Present
Fifth web release on 2020/10/15: "PA_Survey_v5". This version-5 dataset includes PAs/transmitters from 500MHz to 1.5 THz in Bulk/SOI CMOS, SiGe, LDMOS, InP, GaN, GaAs technologies. The dataset contains total 3207 data points with over 1200 data points for CMOS, SiGe PAs and over 1500 data points for GaN, GaAs, InP PAs.
We have added sub-THz/THz power/signal generation circuits from 15GHz to 1.5THz, including PAs, fundamenal/harmonic oscillators, and frequency multipliers, to support the emerging research on beyond-5G/6G applications.
The file "PA_Survey_v5" is the version-5 dataset that includes ALL the reported PA/transmitter data since 2000 over frequency and various technologies. It also includes summary plots on CW Psat vs. Carrier Frequency for different technologies, peak PAE vs. CW Psat at different frequencies, and average PAE vs. average Pout for high-order complex modulations.
What is new in version-5 release beyond the version-4 release? 500MHz to 1.5 THz Power Amplifier designs and sub-THz/THz power/signal generation circuits published between 02/2020 and 10/2020.
- Cite this PA survey: Hua Wang, Tzu-Yuan Huang, Naga Sasikanth Mannem, Jeongseok Lee, Edgar Garay, David Munzer, Edward Liu, Yuqi Liu, Bryan Lin, Mohamed Eleraky, Sensen Li, Fei Wang, Amr S. Ahmed, Christopher Snyder, Sanghoon Lee, Huy Thong Nguyen, and Michael Edward Duffy Smith, "Power Amplifiers Performance Survey 2000-Present," [Online]. Available: https://gems.ece.gatech.edu/PA_survey.html
- Acknowledgement: We would like to sincerely thank many of our friends and colleagues for their helpful suggestions and insightful discussions.
- Feedback and Suggestions: We welcome your feedback and suggestions, including the ways to interpret and present the data. In addition, although we try to be as inclusive as possible when collecting these published data, it is certainly possible that we may miss some representative PA designs. Please feel free to send us feedback, suggestions, or missing PA papers.
- Contact: Please contact us through poweramplifiers.survey at gmail dot com. Do not use my gatech email address, since I may very likely miss your email.
- Source for this data collection: We focus on peer-reviewed and publicly accessible publications that are typical forums for PAs, including IEEE ISSCC, JSSC, RFIC, VLSI, CICC, ESSCIRC, IMS, T-MTT, TCAS, BCTM/CSICS (BCICTS in the future), APMC, EuMC, and MWCL. We also focus on public product datasheets on PAs/transmitters.
Jan 2, 2020
[postponed]: EUROSOI-ULIS 2020
Important dates :
- abstract submission deadline : January 30, 2020
- notification of acceptance : February 3, 2020
- postponed confernce dates : August 31st - September 4th 2020
• Advanced SOI materials and structures: physical mechanisms and innovative SOI-like devices
• New channel materials for CMOS: strained Si, strained SOI, SiGe, GeOI, III-V and high mobility materials on insulator, carbon nanotubes, graphene and other two-dimensional materials
• Properties of ultra-thin films and buried oxides: defects, interface quality, thin gate dielectrics, high-κ materials for switches and memory.
• Nanometer scale devices: technology, characterization techniques and evaluation metrics for high performance, low power, reliability, high frequency and memory applications
• Alternative transistor architectures: FDSOI, Nanowire, FinFET, MuGFET, vertical MOSFET, FeFET and Tunnel FET, MEMS/NEMS, Beyond-CMOS nanoelectronic devices
• New functionalities in silicon-compatible nanostructures and innovative devices representing the More than Moore domain: nanoelectronic sensors, biosensor devices, energy harvesting devices, RF devices, imagers, etc.
• CMOS scaling perspectives: device/circuit level performance evaluation, switches and memory scaling; three-dimensional integration of devices and circuits, heterogeneous integration
• Transport phenomena: compact modeling, device simulation, front- and back-end process simulation
• Advanced test structures and characterization techniques: parameter extraction, reliability and variability assessment techniques for new materials and novel devices
Need help or information : eurosoiulis2020@sciencesconf.org
Conference Chair: Bogdan Cretu