Nov 20, 2020

[Launch Event] EMPHASIS University of Cyprus

LAUNCH EVENT: November 25, 2020 10:00-13:30EET

EMPHASIS is a multidisciplinary research centre involving departments from the School of Engineering and School of Pure & Applied Sciences from the University of Cyprus. Join us online to learn more about our labs' research in the key enabling technologies behind the digital revolution: electronics, microwaves & antennas, photonics and sensors.

SCHEDULE: (Eastern European Time)
10:00–10:10: Introduction 
Prof.Tasos Christofides, Rector of the University of Cyprus
10:10–10:20: Introductory Remarks
Dr.Nikolas Mastroyiannopoulos, Chief Scientist for Research and Innovation
10:20–10:50: EMPHASIS Research Centre: Vision & Goals,
Prof.Stavros Iezekiel, Acting Director of EMPHASIS
BREAK
11:00–11:30: EMPHASIS Research Laboratory Presentations
11:30–13.30: Presentation of Selected Research Projects in Electronics, Microwaves & Antennas, Photonics and Sensors
SESSION1: 11:30-12:30
• Medical Electronics,
Prof.Julius Georgiou
• Sensors for Precision Agriculture, 
Dr.Marios Sophocleous
• Resveratrolloaded Polymeric Miceles for Theranostic Targeting of Breast Cancer Cels, 
Dr.Yiota Grigoriou
• White Light Emitting Structures Based on II-Nitrides and Lead Halide Perovskite Nanocrystals,
Dr.Modestos Athanasiou
• Multi-bacteria,Multi-antibiotic Testing Using Surface Enhanced Raman Spectroscopy
(SERS)forUrinary Tract Infection (UTI)Diagnosis, 
Dr.Katerina Hadjigeorgiou
BREAK
SESSION2: 12:30-13:30
• Electric-Field Measurements of Microwave Circuits,
Dr.Haris Votsi
• Integrated Circuits for RF Metasurfaces, 
Loukas Petrou/Kypros Kossifos
• Influence of Carriers in Spin Pumping in Organic Semiconductors, 
Constantinos Nicolaides
• Microwave Photonics for Space,
Georgios Charalambous
• Wireless Power Transfer (WPT) and Far-Field RF Energy Harvesting,
Dr.Abdul Quddious

FOR MORE INFORMATION: www.emphasis.ucy.ac.cy/launch-event


[paper] Characterization of ultrathin FDSOI devices using subthreshold slope method

Teimuraz Mchedlidze1, and Elke Erben2
Characterization of ultrathin FDSOI devices using subthreshold slope method
Phys. Status Solidi A. Accepted Manuscript
DOI: 10.1002/pssa.202000625

1 TU Dresden, Germany
2 Globalfoundries, Dresden, Germany

Abstract: The subthreshold current-voltage (subthreshold slope) characteristic of fully depleted silicon-on-insulator high-k dielectric-metal gate field-effect transistor is applied for evaluation of the interface traps located at both, the front and back channels. The proposed characterization method allows an estimation of averaged trap densities separately for the front and the back interfaces of the channel. Performing subthreshold slope measurements at several temperatures allow the extraction of the energy distributions of the interface trap densities for both interfaces and obtaining essential characteristics of the stack.

Fig: Results of ID(VGF,k,T) measurements for EG sample. At each temperature 
(200, 300 and 400K) a group of curves contains data for eight k values
(k = 0 to 3 with step 0.5 and kOC; solid curve). 

Acknowledgements: The authors would like to acknowledge funding of the study in the frames of the IPCEI WIN- FDSOI project from Global Foundries. We want to thank Jörg Weber (TU Dresden), Luca Pirro (Global Foundries) and Rolf Öttking (AQ Computare, Chemnitz) for thoughtful discussions and suggestions.





Nov 19, 2020

#Nanoscale #Schottky #diodes fabricated via adhesion lithography https://t.co/dkeSdlinNP #semi https://t.co/u353DjjCVP



from Twitter https://twitter.com/wladek60

November 19, 2020 at 04:38PM
via IFTTT

#India Has $100 Billion Opportunity Through Domestic #Manufacturing Of Tablets, Laptops [ICEA] https://t.co/YIekOOiFME #semi https://t.co/S0rb3I1jXA



from Twitter https://twitter.com/wladek60

November 19, 2020 at 04:37PM
via IFTTT

[paper] Compact Model for Power MOSFET

Abdelghafour Galadi
PSPICE compact model for power MOSFET based on manufacturer datasheet
DOI:10.1088/1757-899X/948/1/012007

National School of Applied Sciences of Safi, Cadi Ayyad University, Marrakech (MA)

Abstract: In this paper, large signal model for power MOSFET devices is presented. The proposed model includes quasi-saturation effect and describes accurately the electrical behavior of the power MOSFET devices. The large signal model elements will be provided based on the device structure. Furthermore, the model parameters are extracted from measurements considering the voltages depending effect of the nonlinear gate-source, gate-drain and drain-source interelectrode capacitances. Excellent agreements will be shown between the simulated and the datasheet data. Finally, a description of the model will be provided along with the parameter extraction procedure.
Fig: a) Conventional power MOSFET structure with b) its subcircuit elements. 


[paper] HEMT RF/Analog Performance

M. Khaouani1,H. Bencherif2, A. Hamdoune1, A. Belarbi3, Z. Kourdi4
RF/analog Performance Assessment of High Frequency, Low Power In0.3Al0.7As/InAs/InSb/In0.3Al0.7As HEMT Under High Temperature Effect
Transactions on Electrical and Electronic Materials
The Korean Institute of Electrical and Electronic Material Engineers 2020
DOI: 10.1007/s42341-020-00250-8

1 Department of Genie Electric and Electronics, Unit Research of Material and Renewable Energies, University Aboubek Belkaid, Tlemcen, Algeria
2 LAAAS Laboratory, University of Batna 2, Batna, Algeria
3 Center Exploitation Telecommunication Satellite– Bouchaoui-Alger, Algeria Space Agency, Algiers, Algeria
4 Center Exploitation Telecommunication Satellite– Oran-Alger, Algeria Space Agency, Algiers, Algeria


In0.3Al0.7As/InAs/InSb/In0.3Al0.7As In this paper, we performed a Pseudo-morphic High Electron Mobility Transistors (pHEMT) In0.3Al0.7As/InAs/InSb/In0.3Al0.7As using commercial TCAD. RF and analog electrical characteristics are assessed under high temperature effect. The impact of the temperature is evaluated referring to a device at room temperature. In particular, the threshold voltage (Vth), transconductance (gm), and Ion/Ioff ratio are calculated in the temperature range of 300K to 700K. The primary device exhibits a drain current of 950mA, a Vth of -1.75V, a high value of gm of 650 mS/mm, Ion/Ioff ratio of 1E6, a transition frequency (fT) of 790GHz, and a maximum frequency (fmax) of 1.4THz. The achieved results show that increasing temperature act to decrease current, reduce gm, and Ion/Ioff ratio. In more detail high temperature causes a phonon scattering mechanism happening that determine in turn a reduced drain current and shift positively the threshold voltage resulting in hindering the device DC/AC capability. 
Fig: 2D cross section of In0.3Al0.7As/InAs/InSb/In0.3Al0.7AsAs PHEMT


Nov 18, 2020

[paper] Verilog-A Ion Sensitive FET for pH Sensor

Megha Agrawal, Nidhi Agrawal, Alpana Agarwal and Anil K. Saini*
Modeling of Ion Sensitive Field Effect Transistor for pH Sensor using Verilog-A
 Recent Advancement in Communication System & Image Processing
RACISP-2012 at: BKBIET, Pilani

Thapar University, PATIALA – 147004, Punjab
*Central Electronics Engineering Research Institute, PILANI – 333031, Rajasthan

Abstract: ISFET semiconductor technology enables the design of true solid state pH sensor. An ISFET can be modeled by considering it as two fully uncoupled stages: an electronic stage i.e., the MOSFET which is the starting structure of the ISFET and an Electro-chemical stage i.e., the electrolyte–insulator interface which is pH dependent. This paper describes the modeling of ISFET for pH measurement using Verilog A which is compatible with cadence environment. Any change in pH directly affects the threshold voltage of ISFET. To measure this change in pH, ISFET is configured in such a way so that change in threshold voltage can be directly detected. For this purpose a sensing read-out has been designed using Gate complementary ISFET/MOSFET pair (CIMP) technique. Simulated result shows good linearity between output voltage of sensing readout circuit with pH variation for the range of 1 to12. The ISFET is thermally instable due to semiconductor properties and pH dependency on temperature, which in turn affects the pH reading of the solution at a temperature other than room temperature with slope of +0.69mV/0C, +1.25mV/0C and +1.60mV/0C respectively for pH= 4, for pH=7 and for pH=10.
Fig: a) n-channel ISFET structure and b) its equivalent electric circuit [ref]

Acknowledgment: The work is financially supported by Department of Information Technology, Ministry of Communication & Information Technology, Government of India, under SMDP-VLSI (Phase II) project.

[ref] Sergio Martinoia, Giuseppe Massobrio, “A Behavioral Macromodel of the ISFET in SPICE,” Sensors and Actuators B, Vol. 62, pp. 182–189, 2000

Appendix A

// Verilog-A Code for ISFET [ref]
`include "constants.vams"
`include "disciplines.vams"
module ISFET(ref,gm,ph);
inout ref,gm,ph;
electrical ref,gm,ph;
real EPH;
real T;
electrical node;
electrical x,y;
// PARAMETERS FOR ISFET
parameter real NAv = 6.023E26; //Avogadros constant(1/MOLE)
// ISFET geometrical parameters
parameter real DIHP =0.1E-9;
parameter real DOHP =0.3E-9;
//ISFET electrochemical parameters
parameter real KA = 15.8;
parameter real KB = 63.1E-9;
parameter real KN = 1E-10;
parameter real Nsil = 3.0E+18;
parameter real Nnit = 2.0E+18;
parameter real Cbulk = 0.1;
parameter real epso = 8.85E-12;
parameter real epsihp = 32; //relative permittivity of the Inner Helmholtz layer
parameter real epsohp = 32; //relative permittivity of the Outer Helmholtz layer
parameter real epsw = 78.5; //relative permittivity of the bulk electrolyte solution
//Reference-electrode electrochemical parameters
parameter real Eabs = 4.7; //absolute potential of the standard hydrogen electrode
parameter real Erel = 0.2;
parameter real Phim = 4.7; //work function of the metal back contact
parameter real Philj = 1E-3; //liquid-junction potential difference between the ref
solution and the electrolyte
parameter real Chieo = 3E-3; //surface dipole potential
real ET; //THERMAL COFFICIENT
real sq;
real CH, CD, CEQ, CB;
real Eref;

analog begin
T= $temperature;
ET= (`P_Q /(`P_K * T));
sq = sqrt(8*`P_EPS0*epsw*`P_K * T);
CB = (NAv*Cbulk);
CH = ((`P_EPS0*epsihp*epsohp) / (epsohp*DIHP + epsihp*DOHP));
CD = (sq*ET*0.5)*sqrt(CB);
CEQ = 1/(1/CD + 1/CH);
V(ref,node) <+ Eabs - Phim - Erel + Chieo + Philj;
Eref = V(ref,node);
V(x)<+ log(KA*KB)+4.6*V(ph);
V(y)<+ log(KA)+2.3*V(ph);
V(gm,node) <+ (`P_Q / CEQ) * (Nsil * ((limexp(-2 * V(gm,node) * ET)– limexp
(V(x))) / (limexp(-2 * V(gm,node) * ET) + limexp(V(y)) * limexp(-1 * V
(gm,node)*ET) + limexp(V(x)))) + Nnit*((limexp(-1 * V(gm,node)*ET))/(limexp(-1* V(gm,node)*ET)
+ (KN/KA) * limexp(V(y)))));
end
capacitor #(.c(CEQ)) Cq(node,gm);
resistor #(.r(1G)) RP1(x,gnd);
resistor #(.r(1G)) RP2(y,gnd);
resistor #(.r(1k)) RPH(ph,gnd);
endmodule