Abstract: The ever-increasing computational and storage requirements of modern applications and the slowdown of technology scaling pose major challenges to designing and implementing efficient computer architectures. To mitigate the bottlenecks of typical processor-based architectures on both the instruction and data sides of the memory, we present Spatz, a compact 64-bit floating-point-capable vector processor based on RISC-V’s Vector Extension Zve64d. Using Spatz as the main Processing Element (PE), we design an open-source dual-core vector processor architecture based on a modular and scalable cluster sharing a Scratchpad Memory (SCM). Unlike typical vector processors, whose Vector Register Files (VRFs) are hundreds of KiB large, we prove that Spatz can achieve peak energy efficiency with a latch-based VRF of only 2 KiB. An implementation of the Spatz-based cluster in GlobalFoundries’ 12LPP process with eight double-precision Floating Point Units (FPUs) achieves an FPU utilization just 3.4% lower than the ideal upper bound on a double-precision, floating-point matrix multiplication. The cluster reaches 7.7 FMA/cycle, corresponding to 15.7 GFLOPSDP and 95.7 GFLOPSDP/W at 1 GHz and nominal operating conditions (TT, 0.80 V, 25 °C), with more than 55% of the power spent on the FPUs. Furthermore, the optimally-balanced Spatz-based cluster reaches a 95.0% FPU utilization (7.6 FMA/cycle), 15.2 GFLOPSDP, and 99.3 GFLOPSDP/W (61% of the power spent in the FPU) on a 2D workload with a 7 × 7 kernel, resulting in an outstanding area/energy efficiency of 171 GFLOPSDP/W/mm2. At equi-area, the computing cluster built upon compact vector processors reaches a 30% higher energy efficiency than a cluster with the same FPU count built upon scalar cores specialized for streambased floating-point computation.
- Front Matter pp. i-xv
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- Introduction pp. 1-4
- Theoretical Basics pp. 5-13
- Circuit Capturing pp. 15-36
- PDK—Design Rule Capturing pp. 37-41
- Placement pp. 43-55
- Routing pp. 57-71
- Experimental Results pp. 73-99
- Outlook pp. 101-103
- Back Matter pp. 105-120
Abstract: As integrated photonic systems grow in scale and complexity, Photonic Design Automation (PDA) tools and Process Design Kits (PDKs) have become increasingly important for layout and simulation. However, fixed PDKs often fail to meet the rising demand for customization, compelling designers to spend significant time on geometry optimization using FDTD, EME, and BPM simulations. To address this challenge, we propose a data-driven Eigenmode Propagation Method (DEPM) based on the unitary evolution of optical waveguides, along with a compact model derived from intrinsic waveguide Hamiltonians. The relevant parameters are extracted via complex coupled-mode theory. Once constructed, the compact model enables millisecond-scale simulations that achieve accuracy on par with 3D-FDTD, within the model’s valid scope. Moreover, this method can swiftly evaluate the effects of manufacturing variations on device and system performance, including both random phase errors and polarization-sensitive components. The data-driven EPM thus provides an efficient and flexible solution for future photonic design automation, promising further advancements in integrated photonic technologies.
