[mos-ak] [on-line publications] 6th International MOS-AK Workshop Washington DC Dec.11, 2013

Recent, 6th International MOS-AK/GSA Workshop on Dec.11, 2013 in Washington DC was organized to discuss SPICE/compact modeling and its standardization with a freewheeling session to review modeling activities of the CMC, IEEE EDS CMTC, NEEDS NanoHub and MOS-AK Groups. The workshop's presentations are available on-line at <http://www.mos-ak.org/washington_dc_2013/>

Please also distribute further information about next MOS-AK related events among all who are interested in the SPICE/compact modeling:

IWCM at DAC ASP Singapore (SG) Jan. 23, 2014 

http://www.ece.nus.edu.sg/stfpage/elehy/aspdac2014/

Q2 2014 MOS-AK London (UK) March'2014

http://www.mos-ak.org/london_2014/

MIXDES Lwow (UA) June 19-21, 2014

http://mixdes2014.lp.edu.ua/Mixdes3/tekst/view/special

Q3 MOS-AK at 44th ESSDERC / 40th ESSCIRC Venice (I) Sept. 26, 2014

http://www.mos-ak.org/venice_2014/

Already now, I am looking forward to meet you at one of our MOS-AK modeling events, soon.

-- with regards - wladek;
--

Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
--
Over two decades of Enabling Compact Modeling R&D Exchange

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http://www.mos-ak.org

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[mos-ak] SPICE Development Roadmap

The MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, delivered its annual autumn compact modeling workshop on Sept. 20, 2013 as an integral part of the ESSDERC/ESSCIRC Conference in Bucharest (RO). The event received full sponsorship from leading industrial partners including Agilent Technologies, LFoundry and Microchip. More than 30 international academic researchers and modeling engineers attended two sessions to hear 12 technical compact modeling presentations and posters including the keynote by Larry Nagel.

The MOS-AK keynote speaker, Larry Nagel, delivered "SPICE in the Twenty-First Century" talk drawing a roadmap of future SPICE development directions. So how will SPICE evolve in the future?  [read more]

In the meantime please also visit <http://www.mos-ak.org/washington_dc_2013/> where we will continue the discussion of all compact/SPICE modeling topics.

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SISPAD 2014 1st Call for Papers

2014 International Conference on Simulation of Semiconductor Processes and Devices

September 9-11, 2014

Workshop, September 8

Mielparque Yokohama, Yokohama, Japan

The call for papers is also available on SISPAD2014 Web site. Deadline for submission of SISPAD abstracts: March 31, 2014


Any inquiries on submission should be sent to:

• Steering Chair:  Shinji Odanaka  (Osaka Univ)
• Conference Chair:  Nobuya Mori  (Osaka Univ)
• Program Chair:  Kenichiro Sonoda  (Renesas)
• Program Co-Chair:  Shigeyasu Uno  (Ritsumeikan Univ)

[read more...]

[mos-ak] [Final Program] 6th International MOS-AK/GSA Workshop Washington DC Dec.11, 2013

Final program of 6th International MOS-AK/GSA Workshop on Dec.11, 2013 in Washington DC is available online:

http://www.mos-ak.org/washington_dc_2013/

The program includes a freewheeling session organized to review modeling activities of the CMC, IEEE EDS CMTC, NEEDS NanoHub and MOS-AK Groups.

Event venue:

Embassy of Switzerland

2900 Cathedral Ave, NW,  

Washington, DC 20008 

USA 

Free On-line Workshop Registration is open, now.

Extended MOS-AK/GSA Committee:

• Wladek Grabinski, GMC Suisse; MOS-AK/GSA Group Manager
• Harrison Beasley, Technical WG Manager, GSA
  MOS-AK/GSA North America
• Chair: Pekka Ojala, Exar Corporation
• Co-Chair: Geoffrey Coram, Analog Devices
• Co-Chair: Prof. Jamal Deen, U.McMaster
• Co-Chair: Roberto Tinti, Agilent EEsof Division
  MOS-AK/GSA South America
• Chair: Prof. Gilson I Wirth; UFRGS; Brazil
• Co-Chair: Prof. Carlos Galup-Montor, UFSC; Brazil
• Co-Chair: Sergio Bampi, UFRGS, Brazil
• Co-Chair: Antonio Cerdeira Altuzarra, Cinvestav - IPN, Mexico
  MOS-AK/GSA Europe
• Chair: Ehrenfried Seebacher, AMS, Austria
  
• Co-Chair: Alexander Petr, XFab, Germany
  
• Co-Chair: Prof. Benjamin Iniguez, URV, Spain
  MOS-AK/GSA Asia/South Pacific
  
• Chair: Sadayuki Yoshitomi, Toshiba 
  
• Co-Chair: Xing Zhou, NTU Singapore    
  
• Co-Chair: A.B. Bhattacharyya, JIIT New Delhi

 

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2014 Workshop on Compact Modeling at techconnectworld.com

Abstracts due: December 13th, 2013

Synopsis: Compact Models (CMs) for circuit simulation have been at the heart of CAD tools for circuit design over the past decades, and are playing an ever increasingly important role in the nanometer system-on-chip (SOC) era. As the mainstream MOS technology is scaled into the nanometer regime, development of a truly physical and predictive compact model for circuit simulation that covers geometry, bias, temperature, DC, AC, RF, and noise characteristics becomes a major challenge.

Workshop on Compact Modeling (WCM) Is one of the first of its kind in bringing people in the CM field together. The objective of WCM is to create a truly open forum for discussion among experts in the field as well as feedback from technology developers, circuit designers, and CAD tool vendors. The topics cover all important aspects of compact model development and deployment, within the main theme - compact models for circuit simulation.

Symposium Chair: Professor Xing Zhou Nanyang Technological University, Singapore

[Call for Papers] IWCM 2014

Call for Papers IWCM 2014 

11th International Workshop on Compact Modeling 

January 23 (Thursday), 2014 

Suntec Singapore Convention and Exhibition Centre (Room 309)  

Scope: 
The workshop provides an opportunity for the discussion and the presentation of advances in modeling and simulation of integrated circuits.

Topics: 

• Compact modeling for all kinds of devices 
• Parameter extraction methodology and strategy 
• Circuit simulation techniques and platforms 

Abstract Submission:

Authors should submit a camera-ready abstract with 2 to 10 pages including figures for inclusion in the Workshop Proceedings, and send the electronic file in PDF or MS-Word format to mchan@ust.hk. Paper templates in Word format is downloadable from the ASP-DAC 2014 site. Deadline for the submission is December 15th, 2013. 

• Organization:
  Chair: Mansun Chan (Hong Kong University of Science and Technology, Hong Kong)
  Co-Chair: Hans Juergen Mattausch (Hiroshima University, Japan) 
• Committee members:
  T. Aikyou (STARC, Japan)
  Y. Cao (Arizona State University, USA)
  Jamel Deen (McMaster University, Canada)
  J. He (Peking University, China)
  Y. J. Park (Seoul National University, Korea)
  Zhiping Yu, (Tsinghua University, China)
  Xing Zhou (Nanyang Technology University, Singapore) 

Sponsor:
The University Grant Council of Hong Kong through the Area of Excellence Project (AOE/P-04/08)

Fee: Free admission

Contact: 
If you have any question, please contact  Mansun Chan

LETI Devices Workshop

The Churchill Hotel - 1914 Connecticut Ave. NW (across from the Hilton)

Washington D.C. 6-9 p.m on December 8, 2013

Inventing the future together: a stimulating discussion of our vision for silicon nanotechnologies in the next 10 years followed by a networking cocktail. Program is as follow:

• Introduction (10min)
  Jean-René Lequepeys; VP Silicon Components Division 
• Lithography cost-effective solutions for 1X nodes (15min)
  Serge Tedesco; Lithography Program Manager 
• 3D: Dream and reality (15 min)
  Mark Scannell; Senior Business Development Manager 
• High-performance and reliable resistive memories embedded in advanced logic CMOS technologies (15min)
  Barbara de Salvo; Advanced Memories Fellow
• M&NEMS platforms: an enabler for the next generation of sensors in consumer electronics (15min)
  Hugues Metras; VP Strategic Partnerships, North America
• CMOS technologies: our most power efficient solution today and our vision toward 10nm node and beyond (15 min)
  Maud Vinet; Advanced CMOS Manager

[read more...]

MIEL2014 Abstracts Deadline Extension

IEEE 29th International Conference on Microelectronics (MIEL 2014) is to be held on 11-14 May 2014 at the Serbian Academy of Science and Arts, Belgrade, Serbia. The extended submission deadline for 2-page extended abstracts of regular contributions had been set to 26th, but, due to many requests by authors, we will continue receiving the submissions by October 31st 2013.

More detailed information on MIEL 2014 can be found in the attached Call for Papers, as well as on the conference web site http://miel.elfak.ni.ac.rs/. We will be looking forward to receiving your submission and seeing you at our conference next year in May.

[read more...]

SISPAD Abstract Submission

2014 International Conference on Simulation of Semiconductor Processes and Devices

September 9 – 11, 2014

Workshop, September 8

Mielparque Yokohama, Yokohama, Japan

Deadline for submission of SISPAD abstract: March 1, 2014

Any inquiries on submission should be sent to:

• Program Chair:  Ken’ichiro Sonoda (Renesas)
• Program Co-Chair:  Shigeyasu Uno (Ritsumeikan Univ)

[read more...]

[mos-ak] note in the IEEE EDS REGIONAL AND CHAPTER NEWS

REGIONAL AND CHAPTER NEWS

ED Germany – by Joachim N. Burghartz 

The German Chapter of IEEE EDS sponsored the annual spring compact modeling workshop of the MOS-AK/GSA Modeling Working Group, a global compact modeling standardization forum, held April 11– 12, 2013. The meeting was supported by Prof. Doris Schmid-Landsiedel and the staff of the Institute for Technical Electronics, TUM, Munich, who is one of the local coordinators of the ED German Chapter. More than 30 international academic researchers and modeling engineers attended three sessions to listen to 12 technical compact modeling presentations. As in previous years this well-established effort has been coordinated by Wladek Grabinski, Switzerland. The workshop's three sessions focused on common compact modeling actions. Sessions included: (i) How to consolidate and build consistent simulation hierarchy at all levels of advanced TCAD numerical modeling; (ii) Compact/ SPICE modeling for Analog / Mixed Signal circuits; and (iii) Corner modeling and statistical simulations. The MOS-AK/GSA speakers were K.-W. Pieper (Infineon), M. Sylvester (MunEDA), B. Iñiguez (URV), I. Nickeleit (Agilent), L. Heiss (LTE, TUM); T. Schulz (Intel), C. Jungemann (RWTH), M. Brinson (London Metropolitan University), B.-Y. Nguyen (SOITEC), A. Kloes (THM), U. Monga (Intel), and M. Bucher (TUC). The event was accompanied by a series of the software/hardware demos by MOS-AK/GSA industrial partners: Agilent, MunEDA and Tanner EDA. The session technical and software/ hardware demo presentations are available for download at: <http:// www.mos-ak.org/munich_2013/>. 

[full text]

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OBip: Open Bipolar Workshop at BCTM in Bordeaux

Open Workshop on European Bipolar related projects: 

DOTSEVEN & RF2THz

Abstract: In Europe, a huge effort is actually undertaken to strengthen Europe's leading edge position in SiGe HBT technology and modeling as well as SiGe enabled mm-wave applications thanks to two European projects that are: DOTSEVEN which aims to achieve HBTs with cut-off frequencies (fmax) of around 700 GHz and RF2THz which aims at the establishment of a 300mm BiCMOS Silicon technology platform for emerging RF, mm-wave and THz consumer applications, as well as Si photonics integration. During this common workshop the main achievements of these projects will be presented.

Opening and Welcome (8:15 AM), Thomas Zimmer, University  Bordeaux 1

Session 1: Technology (8:30 - 10:30 AM)
Alexander Fox, IHP (8:30 - 9:10 AM)
   SiGe HBT Technology Development in the DOTSEVEN  Project
Pascal Chevalier, ST Microelectronics (9:10 - 9:50 AM)
   A 55-nm BiCMOS Platform for Optical and Millimeter-Wave  Systems-on-Chip
Dieter Knoll, IHP (9:50 – 10:30 AM)
   BiCMOS integration of photonic components
Coffee break
Session 2: Modelling and Characterization (11:00 AM – 1:00 PM)
Andreas Pawlak, Univ. of Dresden (11:00 – 11:40 AM)
   Latest developments of HICUM/L2 for mm-wave applications
Bertrand Ardouin, XMOD Technologies (11:40 – 12:20 AM)
   Tools and environment for Sub-THz circuit design
Sebastien Fregonese, CNRS (12:20 AM – 1:00 PM)
   Electro-Thermal Device Characterization & Modelling
Lunch break
Session 3: Design and demonstrator (2:00 – 4:00 PM)
Marco Spirito, University of Delft (2:00 – 2:40 PM)
   Building blocks and system architecture for mm-wave imaging radar
Olivier Tesson, NXP (2:40 – 3:20 PM)
   Passive integration and Packaging for mm-wave applications
Wolfgang Templ, Alcatel Lucent (3:20 – 4:00 PM)
   Application Scenarios from RF2THz

4:00: End of the Open Bipolar Workshop OBip

[read more: 3rd Day Workshop: Special European Dot 5/Dot 7 Workshop]

[mos-ak] Call for Papers] 6th International MOS-AK/GSA Workshop Dec. 11, 2013 Washington DC

Together with the Organizing Committee and Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the 6th International MOS-AK/GSA Workshop Dec. 11, 2013 Washington DC. The specific workshop goal will be to classify the most important directions for the future development of the electron device models, not limiting the discussion to compact models, but including physical, analytical and numerical models, to clearly identify areas that need further research and possible contact points between the different modeling domains (Technology TCAD, SPICE/Verilog-A standardization, advanced IC designs) . A freewheeling session will be also organized to review modeling activities of the CMC, NEEDS NanoHub and MOS-AK Groups.

Topics to be covered include the following:

• Advances in semiconductor technologies and processing
  
• Compact Modeling (CM) of the electron devices
  
• Verilog-A language for CM standardization
  
• New CM techniques and extraction software
  
• CM of passive, active, sensors and actuators
  
• Emerging Devices, CMOS and SOI-based memory cells
  
• Microwave, RF device modeling, high voltage device modeling
  
• Nanoscale CMOS devices and circuits
  
• Technology R&D, DFY, DFT and IC Designs
  
• Foundry/Fabless Interface Strategies
  

Speakers provisionary list (in alphabetic order)

• Keith Green, TI, CMC Chair (US)
  
• Benjamin Iniguez, URV (SP)
  
• Eric Keiter, Xyce Team, Sandia (US) 
  
• Luca Larcher, Uni. Modena (I)
  
• Mark Lundstrom, NEEDS, NanoHub (US)
  
• Michael Shur, RPI (US)
  
• Sadayuki Yoshitomi, Toshiba (J)
  

In the terms of participation, intending participants and authors should also note the following dates: 

• Call for Papers - Sept. 2013
  
• 2nd Announcement - Oct 2013
  
• Final Workshop Program - Nov. 2013
  
• MOS-AK/GSA Workshop - Dec. 11, 2013
  

Free early registration: <http://www.mos-ak.org/washington_dc_2013/registration.php>

Abstract on-line submission: <http://www.mos-ak.org/washington_dc_2013/abstracts.php> 

Further details and updates: <http://www.mos-ak.org/washington_dc_2013/> 

Email contact: <workshops@mos-ak.org> 

- with regards - WG (for the MOS-AK/GSA Committee) 

===

Arbeitskreis Modellierung von Systemen und Parameterextraktion 

Modeling of Systems and Parameter Extraction Working Group 
http://mos-ak.org/

===

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Semiconductor Device Characterization Intern Job

Semiconductor Device Characterization Engineer jobs

Characterization Intern Job Micron 70 reviews - Boise, ID Successful candidates for this position will have:. Experience with Shell Scripts (Perl, Unix, Batch, Python, etc.).... Micron - Aug 20

Indeed: one search. all jobs. 177 Broad Street - Stamford, CT 06901

Semiconductor Device Characterization Engineer jobs

Semiconductor Device Characterization Engineer jobs

Senior/Staff Characterization Engineer Qualcomm  90 reviews - San Jose, CA Interacts with other groups such as Design, Process, System, Reliability, and FA. 5+ years of related hands-on industrial experience.... Qualcomm - 5:25 AM Senior/Staff Device Physics and Sensor Modeling Engineer Qualcomm 90 reviews - San Jose, CA 5+ years of related hands-on industrial design experience. Hands-on experience with device physics, device process, device characterization, and systems.... Qualcomm - 5:25 AM SEMICONDUCTOR R & D PROCESS IMPROVEMENT ENGR IBM CORPORATION 1,821 reviews - Somers, NY Possess working knowledge of semiconductor device development processes. Semiconductor Research and Development Process Improvement Engineer, IBM Corporation,... New York Times - 8:27 AM

Indeed: one search. all jobs. 177 Broad Street - Stamford, CT 06901

Fwd: 4 new Semiconductor Device Characterization Engineer jobs

Semiconductor Device Characterization Engineer jobs

---

4 new jobs found

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View jobs: since yesterday - for last 7 days - all jobs

Indeed: one search. all jobs. 177 Broad Street - Stamford, CT 06901

[mos-ak] [Final Program] 11th MOS-AK ESSDERC ESSCIRC Workshop with the keynote speaker Larry Nagel

Together with Prof. Andrei Vladimirescu, R&D Scientific Coordinator, the Organizing Committee and Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the 11th consecutive MOS-AK ESSDERC ESSCIRC Workshop on Sept. 20, 2013 in Bucharest (RO). The event will open next decade of enabling compact modeling R&D exchange.  

The final workshop program as well as all further details and updates are on-line: <http://www.mos-ak.org/bucharest/> 

- with regards - WG (for the MOS-AK/GSA Committee) 

MOS-AK Workshop Program

9:00 - 12:00	Morning Session - Chair: Prof. Andrei Vladimirescu, ISEP (F); UCB (USA)
O_1	Welcome and Workshop Opening W. Grabinski MOS-AK Group (EU)
T_2	SPICE - MOS-AK Keynote Larry Nagel Omega Enterprises Consulting (USA)
T_3	NGSPICE: recent progresses and future plans Paolo Nenzi*, Francesco Lannutti*, Robert Larice**, Holger Vogt**, Dietmar Warning** *DIET - Sapienza University of Roma (I), ** NGSPICE Development Team
T_4	KCL and Linear/NonLinear Separation in NGSPICE Francesco Lannutti DIET - Sapienza University of Roma (I) and NGSPICE Development Team
	Coffee Break
T_5	Modeling Junction Less FETs Jean-Michel Sallese, Farzan Jazaeri, Lucian Barbut EPFL (CH)
T_6	HiSIM-Compact Modeling Framework Hans Juergen Mattausch Uni. Hiroshima (J)
P_7	The Correct Account of Nonzero Differential Conductance in the Saturation Regime in the MOSFET Compact Model Valentin Turin*, Gennady Zebrev**, Sergey Makarov***, Benjamin Iniguez****, and Michael Shur***** *State University-ESPC (RU),**MEPHI (RU),***SYMICA Inc (RU),****URV (SP),*****RPI (USA)
12:00 -13:00	Lunch Break
13:00 -16:00	Afternoon Session - Chair: W. Grabinski, MOS-AK Group
T_8	State of the Art Modeling of Passive CMOS Components Bernd Landgraf  Infineon Technologies (A)
T_9	Compact I-V Model of Amorphous Oxide TFTs Benjamin Iniguez*,Alejandra Castro-Carranza* , Muthupandian Cheralathan* , Slobodan Mijalkovic**, Pedro Barquinha***, Elvira Fortunato***, Rodrigo Martins***,Magali Estrada****, and Antonio Cerdeira**** *URV (SP), **Silvaco Ltd (UK), ***UNL(P), ****CINVESTAV (MEX)
	Coffee Break
T_10	Three-Dimensional Electro-Thermal Circuit Model of Power Super-Junction MOSFET Aleš Chvála, Daniel Donoval, Juraj Marek, Patrik Príbytný and Marián Molnár Institute of Electronics and Photonics, Slovak University of Technology in Bratislava (SK)
T_11	A Close Comparison of Silicon and Silicon Carbide Double Gate JFETs Matthias Bucher, Rupendra Sharma Technical University of Crete, Chania, (GR)
T_12	Towards wide-frequency substrate model of advanced FDSOI MOSFET Sergej Makovejev, Valeriya Kilchytska, Jean-Pierre Raskin, Denis Flandre UCL (B)
16:00	End of the MOS-AK Workshop

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[repost nanobuff] On compact modeling

Posted on June 27, 2013 on nanobuff

"While the modeling industry is full of software solutions for all sorts of things in the operation of electronics from the very low to the very high level, there seems to be very sparse tools for simulating radiation effects. This would be normal if there was little interest or public research on the subject, but that is not the case. The models are out there, most of the basic concepts have been examined lots of decades ago, so what is stopping the industry? I really don’t know and I will not even try to answer.

Having said that, I would also like to state that compact modelling, in the case of radiation effects, is at least beneath me. I recently found this old compact modelling project. It is like a plugin to the Silvaco software. How would a compact modelling platform work in the ever-reducing dimensions of today? Things get fairly uncertain below 0.1 µm gate lengths. We need 3D, we need quantum models etc. just for the operation. And for the radiation part? That is now a materials science problem, I guess. And if you decide to go Monte Carlo, that’s even more demanding. The problem seems to be a “chicken and egg” one. We need more processing power to be able to simulate our next generation electronics that will give us more processing power."

[Leave a Reply]

Third Berkeley Symposium on Energy Efficient Electronic Systems

Time: October 28 - 29, 2013
Place: Sutardja Dai Hall, UCB, California, USA

Message from Symposium Organizers

Once again, we look forward to hosting another Berkeley Symposium on Energy Efficient Electronic Systems, a forum that we founded in 2009. Biennially, we bring together researchers who are working on breakthrough improvements in energy efficiency for information processing systems. Our goal is that the Symposium continue to be a venue for the attendees to gain an integrated perspective of the challenges and advances in this domain of technology through sessions that cover the entire food chain, from devices to systems. As in the two previous symposia, we expect that the academic setting of UC Berkeley will encourage open exchanges of ideas, and foster closer cooperation and collaborations among the researchers.

For the first time, we welcome IEEE Electronic Devices Society as a technical co-sponsor. Also new, the 2013 Organizing Committee is issuing a Call for Papers. These changes are intended to broaden participation at the Symposium, thereby furthering the Symposium's goal of fostering information exchanges and collaborations.

We look forward to seeing you at the 3rd Berkeley Symposium on Energy Efficient Electronic Systems.

Eli Yablonovitch, Co-Chair, Organizing Committee
Jeffrey Bokor, Co-Chair, Organizing Committee

[Symposium Link]