Showing posts with label Spintronics. Show all posts
Showing posts with label Spintronics. Show all posts

Oct 4, 2025

[workshop] Advances in Semiconductor and Emerging Devices for Chip Design

5-Day Online International Workshop on
Recent Advances in Semiconductor and Emerging Devices for Chip Design
Oct. 6-10, 2025
Organized by the Department of Electronics, Dhanamanjuri University (DMU), Manipur,
in Collaboration with IEEE Silchar Subsection

Upcoming 5-Day International Workshop on “Recent Advances in Semiconductor and Emerging Devices for Chip Design” (6–10 October 2025) organized by Dhanamanjuri University (DMU) Manipur, in collaboration with IEEE Silchar Section. This unique event, led by Dr. Khoirom Johnson Singh, Ph.D. and his dedicated team, brings together global experts from India, Europe, and beyond. Register Online

With speakers covering topics from GaN devices and memristors to cryogenic CMOS, nanosheet FETs, biomedical circuits, and spintronics for novel computing, this workshop will serve as a melting pot of ideas, a platform for young researchers and students to learn, question, and seed new collaborations.






















Education equips young minds with the foundations of knowledge, preparing them to understand technological advancements and their role in shaping society. Yet, in research, knowledge alone is not enough. To truly innovate, we must disseminate our work, engage with peers, and foster collaborations across disciplines and borders. This is where the seeds of research truly take root and grow.

Collaboration is more than sharing data or co-authoring papers. It is about bringing together diverse perspectives, connecting physics with engineering, theory with experimentation, and academia with industry. Interdisciplinary approaches not only accelerate breakthroughs, but also open new directions that no single researcher could achieve alone.





Aug 14, 2017

Mini-Colloquium (MQ) on Nanoelectronics

AGENDA
DATE: Saturday Aug. 26, 2016
VENUE: IIT Kanpur L16
This Mini-Colloquium (MQ) on Nanoelectronics is being hosted by the IEEE Electron Device Society UP Chapter in collaboration with the Department of Electrical Engineering at IIT Kanpur. Distinguished speakers from renowned universities will be presenting on wide range of topics in Nanoelectronics. The MQ will be organized into 1 hour talks by the speakers. The agenda would be as follows:

TimeTopicSpeaker
9:00 - 9:15Inauguration
9:15 - 9:30High Tea
9:30 - 10:30Nanotransistors with 2D materials: Opportunities and ChallengesProf. Navkanta Bhat
IISc
10:30 - 11:30Revisiting gate C-V characterization for high mobility semiconductor MOS devicesProf. Anisul Haque
East West Univ.
11:30 - 11:45Tea
11:45 - 12:45Prof. V. Ramgopal Rao
IIT Delhi
12:45 - 14:15Lunch
14:15 - 15:15ASM-HEMT - First Industry Standard Compact Model for GaN HEMTsProf. Yogesh Singh Chauhan
IIT Kanpur
15:15 - 16:15Spintronics - Perspectives and ChallengesProf. Brajesh Kumar Kaushik
IIT Roorkee
16:15 - 16:30Tea
16:30 - 17:30Advanced Hetero structure based Nano Scale MOSFETsProf. Chandan Kumar Sarkar
Jadavpur Univ.
Coordinator: Dr. Yogesh S.Chauhan IIT Kanpur, India
Website: http://www.iitk.ac.in/nanolab/MQ/index.html