[DATE2026] Open Source Related Talks

DATE 2026 Verona, Italy

Open Source Related Talks

Monday, 20 April - Wednesday, 22 April 2026

<https://date26.date-conference.com/programme>

Label	Title	Authors
TS02.8	ML-DSA-OSH: An Efficient, Open-Source Hardware Implementation of ML-DSA	Quinten Norga; Suparna Kundu; Ingrid Verbauwhede
LK03	Democratizing Silicon: The Rise of Open-Source EDA and Europe’s Strategic Roadmap	Luca Benini
TS10.1	PICOSNN: Partially Incoherent Configurable Optical Computing Architecture for SNN Acceleration	Bowen Duan; Zhenhua Zhu; Zhengyang Duan; Huazhong Yang; Yuan Xie; Yu Wang
TS16.1	Non-Volatile Spintronic Flip-Flops with Checkpoint Preservation Supported in RISC-V Platform	Jiongzhe Su; Mingtao Chen; Zhanpeng Qiu; Bo Liu; Hao Cai
LBR01.4	Float Fight - Verifying Floating-Point Behavior In Risc-V Simulators	Katharina Ruep, Manfred Schlaegl and Daniel Grosse
LBR01.7	Hybrid Virtual Platform + FPGA Co-Emulation Framework	Lorenzo Ruotolo; Giovanni Pollo; Mohamed Amine Hamdi; Matteo Risso; Yukai Chen; Enrico Macii; Massimo Poncino; Sara Vinco; Alessio Burrello; Daniele Jahier Pagliari
TS20.1	Fault-Tolerance Mapping of Spiking Neural Networks to RRAM-Based Neuromorphic Hardware	Yuqing Xiong; Chao Xiao; Zhijie Yang; Lei Wang; Mengying Zhao
TS21.4	Substrate: A Statically Typed Framework for Designing Highly Configurable Analog and Mixed-Signal Circuit Generators	Rahul Kumar; Rohan Kumar; Borivoje Nikolic
SD03	Open-Source Hardware Landscape
SD03.1	Open Silicon Fabrication – Made in Europe	Gerhard Kahmen, IHP GmbH, DE
SD03.2	From Schematic To Silicon: Mixed Signal Ic Design In Open Source Flows	Harald Pretl, JKU Linz, AT
SD03.3	Bringing Software Design Thinking To Chip Design	Tomi Rantakari, ChipFlow, GB

[MOS-AK/DATE 2015 Workshop] CEA-Leti's predictive model takes FDSOI further

 CEA-Leti's predictive model takes FDSOI further 

During DATE 2015’s MOS-AK Workshop, CEA-Leti presented the newest version of its advanced compact model for ultra-thin body and buried oxide fully depleted SOI (UTBB-FDSOI) technology.

Fully Depleted Silicon On Insulator (FDSOI) is a planar process technology that relies on two primary innovations. First, an ultra-thin layer of insulator, called the buried oxide, is positioned on top of the base silicon.

Then, a very thin silicon film implements the transistor channel. Thanks to its thinness, there is no need to dope the channel, thus making the transistor fully depleted. The combination of these two innovations is called “ultra-thin body and buried oxide Fully Depleted SOI” or UTBB-FDSOI.

Back in 2013, CEA-Leti had deployed a first compact model, but working in close cooperation with STMicroelectronics, the research lab understood that more subtle back gate channelling effects had to be addressed to fully exploit the benefits of UTBB-FDSOI and to explore the transistors’ behaviour in more details.

New analytical equations were written from scratch for the Leti-UTSOI2.1 compact model, improving on the predictability and accuracy capabilities of the previous version, Leti-UTSOI2.

To date, other models from the University of Hiroshima, and from the University of Berkeley fail to account for inversion effects at the back interface, when a strong forward back bias (FBB) is applied, told us Thierry Poiroux, Leti research engineer and model co-developer.

More specifically, the French lab used a unique analytical resolution scheme for the calculation of surface potentials at both interfaces of the transistor body, offering a refined description of narrow-channel effects, with an improved accuracy of moderate inversion regime and gate tunnelling current modelling.

Because the model is analytical, it is much faster than any numerical simulation. It is now available in all major SPICE and Fast SPICE simulators through licences with EDA vendors and will allow fabless companies and IC designers to virtually explore different UTBB-FDSOI parameters within a given foundry process node. The new model can also be used by foundries and fabless companies to perform a predictive analysis of future nodes to come, in order to orient their ongoing process optimization.

for more information visit CEA-Leti at www.leti.fr