Jan 29, 2016

8 non-code ways to contribute to open source https://t.co/jiLLIjpEWA #opensource #feedly https://t.co/yWub17oi7E


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January 29, 2016 at 03:56PM
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8 non-code ways to contribute to open source https://t.co/jiLLIjpEWA #opensource #feedly


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January 29, 2016 at 03:48PM
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Journal of Luminescence | Vol 170, Part 3, Pgs 749-888, (February 2016) #papers https://t.co/uGxgAEm6NC https://t.co/VWAdjOBV3Z


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January 29, 2016 at 03:14PM
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Jan 28, 2016

Silicon Photonics - from promise to reality in datacentres https://t.co/LBPxGacO50 #semi #feedly #papers https://t.co/vzf5gF77vD


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January 28, 2016 at 02:12PM
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Silicon Photonics - from promise to reality in datacentres https://t.co/LBPxGacO50 #semi #feedly #papers


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January 28, 2016 at 02:06PM
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Special Issue: Planar Fully-Depleted SOI technology https://t.co/gM2tHCE84M #papers


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January 28, 2016 at 07:49AM
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Jan 27, 2016

How quality control could save your science https://t.co/FGxeOfhjZB #papers #feedly


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January 27, 2016 at 04:59PM
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Linux and #opensource are the future https://t.co/UoiRSK3rqE #opensource #feedly


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January 27, 2016 at 03:33PM
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Building a FOSS Force Community https://t.co/ZPzX3Kh4NK #opensource


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January 27, 2016 at 12:03AM
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Jan 26, 2016

Nanowire Transistors Could Let You Talk, Text, and Tweet Longer https://t.co/B0KDYiABR7 #papers


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January 26, 2016 at 11:33PM
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[mos-ak] [2nd Announcement and Call for Papers] Spring MOS-AK Workshop Dresden March 18, 2016

Spring MOS-AK Workshop 
 Dresden March 18, 2016
 2nd Announcement and Call for Papers 

Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu, local workshop organizers Martin Claus and Sandra Bley as well as Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Workshop which will be held in Dresden in the DATE Conference timeframe. Planned MOS-AK workshop is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Important Dates:
Call for Papers - Dec. 2015
2nd Announcement - Jan. 2016
Final Workshop Program - Feb. 2016

MOS-AK Workshop: March 18, 2016
09:00 - 10:30 - Morning MOS-AK Session
11:00 - 12:00 - CM Standardization Panel
12:00 - 13:00 - Lunch
13:00 - 16:00 - Afternoon MOS-AK Session 

Venue:
Center for Advancing Electronics Dresden (CFAED)
Technische Universität Dresden
Würzburger Str. 46
01187 Dresden
Germany

Topics to be covered include the following:
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • Open Source TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D, DFY, DFT and reliability/ageing IC Designs
  • Foundry/Fabless Interface Strategies
Online MOS-AK Abstract Submission:
Authors should submit an abstract using on-line MOS-AK submission form:
http://www.mos-ak.org/dresden_2016/abstracts.php
(any related inquiries can be sent to abstracts@mos-ak.org)

Free Online Workshop Registration:
http://www.mos-ak.org/dresden_2016/registration.php
(any related inquiries can be sent to register@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee

(WG 26012016)

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ArduinoPhone 2.0 - An #opensource mobile phone https://t.co/17knLM0cC1 #todo #feedly


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January 26, 2016 at 10:56AM
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Visit Brussels and learn about open source at #FOSDEM 2016 https://t.co/HzplsOxRbm #opensource #feedly


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January 26, 2016 at 10:45AM
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Unified Compact #Model Covering Drift-Diffusion to Ballistic Carrier Transport https://t.co/sr4HBeYi4g #papers #feedly


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January 26, 2016 at 08:09AM
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Jan 25, 2016

ISSCC Focuses on Image Processors for Autonomous Cars #modeling https://t.co/U587enncd1


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January 25, 2016 at 08:43PM
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Jan 22, 2016

Compact #Model Parameter Extraction Using Bayesian Inference, Incomplete New Measurements, and Optima... https://t.co/5C3aRdoBqA


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January 22, 2016 at 11:18PM
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Leakage current minimisation and power reduction techniques using sub-threshold design #modeling https://t.co/71Ah4ALDEB


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January 22, 2016 at 05:17PM
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Analytical #Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire Transistors https://t.co/ox0DFIspyF


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January 22, 2016 at 02:59PM
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Compact #Modeling of Magnetic Tunneling Junctions https://t.co/sl9NaOEg4G


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January 22, 2016 at 02:52PM
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Parasitic Capacitance Analytical #Modeling for Sub-7-nm Multigate Devices https://t.co/z8Q8IcuINM


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January 22, 2016 at 02:47PM
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Parasitic Capacitance Analytical Model for Sub-7-nm Multigate Devices #modeling https://t.co/9Q50HGFkni


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January 22, 2016 at 02:44PM
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Jan 19, 2016

FOSDEM 2016 EDA Devroom

FOSDEM 2016: EDA Devroom
Room: AW1.121 
Saturday, 30 January 2016

Software developers have a much easier time sharing their developments than hardware designers. When you put a piece of code on the Web, you don't ask yourself if others will have the freedom and resources to access a text editor to look at it and modify it, or a compiler or interpreter to have the code do something useful. The landscape for hardware designs is more complicated. The dominant design and simulation tools are proprietary, and there is not even a de-facto proprietary standard format to share designs. The Electronic Design Automation (EDA) Devroom looks at recent progress in Free CAD/EDA Tools for hardware design and simulation, and serves as a meeting place for discussion about future collaborations and FOSS developments. Come and see how some of these tools are actually catching up, and sometimes even more, in terms of features and quality.

[EDA Devroom Detailed Agenda]

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Location: Brussels, Belgium

Jan 18, 2016

NEEDS Berkeley Workshop 2016

Modelling using Verilog-A in MAPP: A Hands-On Workshop

8 AM - 6 PM
Thursday, Feb 4, 2016

University of California, Berkeley
Berkeley, CA 94720
Berkeley's Model and Algorithm Prototyping Platform (MAPP) is a MATLAB-based platform that provides a complete environment for developing, testing, experimentally validating, and inserting compact models in open source simulation platforms. It is also useful for prototyping new simulation algorithms.
This hands-on workshop will focus on the newly developed Verilog-A to ModSpec device model translator for MAPP, dubbed VAPP (Verilog-A Parser and Processor). The goal of the workshop is to illustrate how VAPP/MAPP facilitates the development of simulation ready compact models. An overview of MAPP's multi-physics modelling and simulation capabilities will also be provided. A hands-on refresher on MAPP will be provided for those who have no prior experience with it.
Please bring your laptop (running linux, OSX or Windows). It would be very helpful if you already have MATLAB installed and running on your laptop; otherwise you may need to access the hands-on components through the web.

For more information about MAPP, see: https://nanohub.org/groups/needs/mapp
Travel support will be available for NEEDS students. Please try to share a room, and ask your advisor to e-mail Mark Lundstrom at lundstro@purdue.edu for travel support.

For other questions, please contact Vicki Johnson at vicki@purdue.edu

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Location: Berkeley, CA, USA

Dec 16, 2015

[video] How to Model RF Passive Components: Capacitors and Resistors

This video explains and demonstrates a method to develop accurate SPICE models from verified S-parameter measurements. By using an easy to follow, step by step procedure, this video walks you through the entire modeling flow for an on-wafer capacitor, using the Keysight Measurement and Modeling Software IC-CAP.

The IC-CAP project can be downloaded, together with a detailed How-to-Use description, and an in-depth tutorial about passive components modeling, applying the demonstrated method.

[VIDEO]
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Nov 18, 2015

[mos-ak] [Final Program] 8th International MOS-AK Workshop Washington DC December 9, 2015

 8th International MOS-AK Workshop 
  Washington DC December 9, 2015 
  The Final MOS-AK Workshop Program
 
Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu, as well as Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Workshop which will be held in Washington DC in the IEDM / CMC meetings timeframe on December 9, 2015. The MOS-AK workshop is organized with aims to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Venue:    
Embassy of Switzerland
2900 Cathedral Ave, NW,  
Washington, DC 20008 
USA 

Free Online Workshop Registration:

Workshop Agenda:
  • MOS-AK Workshop - Dec, 9, 2015
  • Online Technical Program http://www.mos-ak.org/washington_dc_2015/
    • 08:30 - 09:00 - On-site Registration 
    • 09:00 - 12:30 - Morning MOS-AK Session
      • TCAD and Advanced CMOS Technologies
      • Compact Modeling and Reliability Co-simulation
    • 12:30 - 13:30 - Lunch
    • 13:30 - 17:00 - Afternoon MOS-AK Session 
      • CMC Compact Model Standardization
      • FOSS Tools for Compact Model Verilog-A Standardization
    • 17:00 End of the workshop
Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG/18/11/15

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Nov 11, 2015

[ESSCIRC 2015] Low-power analog RF circuit design based on the inversion coefficient

[ref] Enz, Christian; Chalkiadaki, Maria-Anna; Mangla, Anurag, "Low-power analog/RF circuit design based on the inversion coefficient," in ESSCIRC 2015 - 41st , vol., no., pp.202-208, 14-18 Sept. 2015
Abstract: This paper discusses the concept of the inversion coefficient as an essential design parameter that spans the entire range of operating points from weak via moderate to strong inversion, including velocity saturation. Several figures-of-merit based on the inversion coefficient, especially suitable for the design of low-power analog and RF circuits, are presented. These figures-of-merit incorporate the various trade-offs encountered in analog and RF circuit design. The use of the inversion coefficient and the derived figures-of-merit for optimization and design is demonstrated through simple examples. Finally, the simplicity of the inversion coefficient based analytical models is emphasized by their favorable comparison against measurements of a commercial 40-nm bulk CMOS process as well as with simulations using the BSIM6 model.

Keywords: Analytical models, Integrated circuits, Noise, Radio frequency, Silicon, Transconductance, Transistors, BSIM6

URL / doi: 10.1109/ESSCIRC.2015.7313863

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Location: Graz, Austria

Oct 29, 2015

[Call for Participation] FOSDEM 2016 Electronic Design Automation Devroom

 Call for Participation 
FOSDEM 2016 Electronic Design Automation Devroom 

This is the call for participation in the FOSDEM 2016 devroom on Free/Open Source Software (FOSS) Electronic Design Automation (EDA) tools, to be held on Saturday 30 January 2016 in Brussels, Belgium. We are looking for contributions under the form of talks covering the following main topics:
  • Printed Circuit Board (PCB) design tools (e.g. KiCad and gEDA)
  • Analogue and digital simulators (e.g. ngspice, Qucs, Gnucap, Xyce, GHDL, Icarus and Verilator)
  • Any other EDA tools such as high-level tools for digital hardware design (e.g. Migen)
  • Inter-project opportunities for collaboration
We hope to provide an opportunity for attendees to bring themselves up to date on the latest FOSS EDA developments, share knowledge and identify opportunities to collaborate on development tasks. Have a look at last year's event for a taste of what the EDA devroom is about.
The submission process
Please submit your proposals at https://penta.fosdem.org/submission/FOSDEM16 
before 4 December 2015.

If you already have a Pentabarf account (for example as a result of having submitted a proposal in the past), make sure you use it to log in and submit your proposal. Do not create a new account if you already have one. Please provide a bit of information about yourself under Person -> Description -> Abstract. When you submit your proposal (creating an "Event" in Pentabarf), make sure you choose the "EDA devroom" in the track drop-down menu. Otherwise your proposal might go unnoticed. Fill in at least a title and abstract for the proposed talk and a suggested duration. Bear in mind that a lot of the value in these meetings comes from the discussions, so please be reasonable regarding the duration of the talk.
Important dates
  • 4 December 2015: deadline for submission of proposals
  • 18 December 2015: announcement of final schedule
  • 30 January 2016: devroom day
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Location: Brussels, Belgium

Oct 23, 2015

[Purdue e-Pubs] A physics-based compact model for thermoelectric devices


A physics-based compact model for thermoelectric devices
Kyle Conrad, Purdue University; Mark S. Lundstrom, Purdue University (Advisor)

Abstract: Thermoelectric devices have a wide variety of potential applications including as coolers, temperature regulators, power generators, and energy harvesters. During the past decade or so, new thermoelectric materials have been an active area of research. As a result, several new high figure of merit (zT) materials have been identified, but practical devices using these new materials have not yet been reported. A physics-based compact model could be used to simulate a thermoelectric devices within a full system using SPICE-compatible circuit simulators. If such a model accepts measured or simulated material parameters, it would be useful in exploring the system level applications of new materials. In this thesis, the ground work for such a compact model is developed and tested. I begin with a discussion of thermoelectric transport theory within the Landauer formalism. The Landauer formalism is used as the basis of the tool LanTraP, which uses full band descriptions to calculate the distribution of modes and thermoelectric transport parameters, which can serve as the input to a compact model. Next, an equivalent circuit model is presented, explained, and tested using a simple Bi2Te 3 thermoelectric leg. The equivalent circuit is shown to perform well under a variety of DC, transient, and AC small signal operating conditions. With the equivalent circuit it is easy to determine the maximum cold side temperature drop, the maximum cold side heat absorbed, the temperature profile within the leg, the temperature response to a pulsed current, and impedance over a range of frequencies. Finally, Sentaurus®, a computer program that solves the thermoelectric transport equations numerically, is used to compare and benchmark some of the results of the equivalent circuit when considering Si as the thermoelectric material. The equivalent circuit and Sentaurus® simulations produce similar results in DC and transient cases, but in the AC small signal case the two simulations produce slight differences. The results of this work establishes a baseline compact model for thermoelectric devices whose accuracy and capabilities can be extended.

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Location: Purdue University, 610 Purdue Mall, West Lafayette, IN 47907, USA
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