#SiFive Technical Symposium // India and Bangladesh https://t.co/ssXogdcGYQ #RISC-V #semi #core #IP https://t.co/t1Ti0wrNnp
— Wladek Grabinski (@wladek60) Jul 15, 2021
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Jul 15, 2021
#SiFive Technical Symposium // India and Bangladesh
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July 15, 2021 at 11:41AM
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Jul 13, 2021
Last chance for IEEE Mauritius Conference
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[paper] ML based Aging-Aware FPGA Framework
Behnam Ghavami, Milad Ibrahimipour, Zhenman Fang, Lesley Shannon
MAPLE: A Machine Learning based Aging-Aware FPGA Architecture Exploration Framework
31st International Conference on Field-Programmable Logic and Applications
(FPL 2021 Short Paper),
Virtual Conference, Sept 2021
*Simon Fraser University, Burnaby, BC, CanadaAbstract: In this paper, we develop a framework called MAPLE to enable the aging-aware FPGA architecture exploration. The core idea is to efficiently model the aging-induced delay degradation at the coarse-grained FPGA basic block level using deep neural networks (DNNs). For each type of the FPGA basic block such as LUT and DSP, we first characterize its accurate delay degradation via transistor-level SPICE simulation under a versatile set of aging factors from the FPGA fabric and in-field operation. Then we train one DNN model for each block type to quickly and accurately predict the complex relation between its delay degradation and comprehensive aging factors. Moreover, we integrate our DNN models into the widely used Verilog-to-Routing toolflow (VTR 8) to support analyzing the impact of aging-induced delay degradation on the entire large scale FPGA architecture. Experimental results demonstrate that MAPLE can predict the delay degradation of FPGA blocks 104 to 107 times faster than transistor-level SPICE simulation, with a prediction error less than 0.7%. Our case study demonstrates that FPGA architects can effectively leverage MAPLE to explore better aging-aware FPGA architectures.
Fig: Overview of FPGA fabric and in-field factors affecting FPGA aging at transistor and basic block levels. We use DNNs to model FPGA delay degradation at basic block level.
Acknowledgements: We acknowledge the support from Government of Canada Technology Demonstration Program and MDA Systems Ltd; NSERC Discovery Grant RGPIN-2019-04613 and DGECR 2019-00120; Canada Foundation for Innovation John R. Evans Leaders Fund; Simon Fraser University New Faculty Start-up Grant; Xilinx, Huawei and Nvidia.
SK hynix Starts Mass Production of #1anm DRAM
SK hynix Starts Mass Production of #1anm (4th generation of the #10nm technology) DRAM Using EUV Equipment https://t.co/Rpz7USr1C3 #semi https://t.co/4ikAq8tEvi
— Wladek Grabinski (@wladek60) Jul 12, 2021
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From Garage to Tech Giant
From Garage to Tech Giant: Bill #Hewlett and #David Packard Ignited the Tech World [by Tyler Charboneau] https://t.co/2gWMlHaReJ #semi https://t.co/AwdT3Gig6n
— Wladek Grabinski (@wladek60) Jul 12, 2021
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Jul 12, 2021
[PhD] Cryogenic MOSFET Modeling
Cryogenic MOSFET Modeling for Large-Scale Quantum Computing
Arnout Lodewijk M BECKERS
Thèse n° 8365 2021
DOI: 10.5075/epfl-thesis-8365
Présentée le 28 mai 2021
Faculté des sciences et techniques de l’ingénieur Laboratoire de circuits intégrés Programme doctoral en génie électrique
pour l’obtention du grade de Docteur ès Sciences par
Acceptée sur proposition du jury:
pour l’obtention du grade de Docteur ès Sciences par
Arnout Lodewijk M BECKERS
Acceptée sur proposition du jury:
Prof. E. Charbon, président du jury
Prof. C. Enz, directeur de thèse
Prof. B. Parvais, rapporteur
Prof. G. Ghibaudo, rapporteur
Dr J.-M. Sallese, rapporteur
Abstract: Promising results of state-of-the-art quantum computers fuel a world-wide effort in academic and private research laboratories to scale up the number of qubits and improve their characteristics in large arrays. To meet the scale-up challenge, innovative microelectronic architectures are envisioned hosting qubits and transistors in silicon. Integrated-circuit design for deep-cryogenic temperatures (below 10 K or -263.15°C) is a challenging optimization exercise that currently leads to costly iterations due to the lack of physics-based transistor models for these temperatures. Proposed enhancements to the industry-standard transistor models neglect the low-temperature physics and do not suffice for a large-volume application. This PhD thesis pushes the state-of-the-art of the characterization, physics, and modeling of CMOS (Complementary Metal Oxide Semiconductor) transistors down to deep-cryogenic temperatures. The most advanced commercial bulk CMOS technology (28-nm minimum gate length) is measured down to 4.2 K using dip-stick measurements and probe-station measurements. The temperature behavior of the physical parameters and the analog figures-of-merit is reported. A similar characterization study is presented for a 28-nm FDSOI CMOS technology using measurements provided by CEA-Léti through the EU H2020 MOS-Quito Project. It is shown that the design methodology based on the transconductance efficiency remains valid down to 4.2 K for both advanced CMOS processes. These results are already supporting the community: qubit controllers in 28-nm bulk and FDSOI technologies have been successfully deployed in the cryostats of quantum computers by Google and CEA-Léti, respectively. Industry-standard models have been honed over many years for near room-temperature operation. They show the largest discrepancies in the sub- and near-threshold regimes when used at deep-cryogenic temperatures. Therefore, this thesis presents an in-depth study of these regimes. Generalized Boltzmann relations are derived including band tails, which are valid in subthreshold. Using these relations, a new analytical theory is derived for the subthreshold swing that rolls off from the Boltzmann limit, showing that an ideal step-like switch cannot be obtained in the 0-K limit due to shallow band-edge states. The process quality must be improved to operate devices closer to the Boltzmann limit. Moreover, the transconductance efficiency in weak inversion (subthreshold) follows the new theoretical limit instead of the Boltzmann temperature limit. This mitigates the expected current savings from biasing in weak inversion. The new theory also explains the impossible inverse temperature dependence of the subthreshold-slope factor, which has been extracted in numerous characterizations in the literature. Furthermore, a threshold-voltage model for bulk CMOS is presented including dopant freezeout and interface traps. Process engineers can benefit from this model to customize transistors for use at 4.2 K. Finally, the discrepancy of the transfer characteristics in moderate inversion (near-threshold) is modeled with an improved representation of the localized band-edge states. As such, this PhD thesis lays the groundwork for next-generation deep-cryogenic IC design benefiting from physics-based knowledge. While this thesis is oriented toward quantum computing, the results also apply to other deep-cryogenic applications at the forefront of science and engineering.
Fig: Different explanations have been proposed for the deviation of the subthreshold swing (SS) from the Boltzmann limit at deep-cryogenic temperatures (below a critical
temperature Tc). This led to the introduction of band-edge states to explain SS(T)
How to double research citations?
https://www.psypost.org/2021/07/the-sci-hub-effect-can-almost-double-the-citations-of-research-articles-study-suggests-61425
[RsyPost] For their study, the researchers examined 8,661 scientific articles published in three multidisciplinary journals (Nature, Science, and Proceedings of the National Academy of Sciences), three economic journals (The Quarterly Journal of Economics, Journal of Political Economy, and Econometrica), three consumer research journals (Journal of Consumer Research, Journal of Retailing and Consumer Services, and Journal of Consumer Psychology), and three neuroscience journals (Nature Reviews Neuroscience, Nature Neuroscience, and Neuron).
The articles were published between September 2015 and February 2016. About half of them had been downloaded from Sci-Hub, while the other half had never been downloaded from the website.
PsyPost is an independently-owned psychology and neuroscience news website dedicated to reporting the latest research on human behavior, cognition, and society. The publication covers the latest discoveries in psychology, psychiatry, neuroscience, sociology, and similar fields.
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