DIY chip for $10k Efabless, a community chip creation platform

DIY chip for $10k
Efabless, a community chip creation platform, today announced the launch of its new chipIgnite program to bring #chip #design and #fabrication to the masses.https://t.co/rmaDoHNaJZ #semi pic.twitter.com/VnbxVThEf2

— Wladek Grabinski (@wladek60) May 21, 2021

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from Twitter https://twitter.com/wladek60

May 21, 2021 at 09:59AM
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[Program] SICT2021 aims to bridge the gap between research in the Information and Communications Technology (ICT) and the overarching and inter-related social, environmental, and economic questions of our time https://t.co/fyMzfIun8Z #semi https://t.co/gtU7xulUHt

[Program] SICT2021 aims to bridge the gap between research in the Information and Communications Technology (ICT) and the overarching and inter-related social, environmental, and economic questions of our time https://t.co/fyMzfIun8Z #semi pic.twitter.com/gtU7xulUHt

— Wladek Grabinski (@wladek60) May 21, 2021

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May 21, 2021 at 09:52AM
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#TSMC trumps #IBM’s “#2nm” chip tech hyperbole with “#1nm” claim https://t.co/xWTVO8ygW6 #semi https://t.co/EUetFKHidw

#TSMC trumps #IBM’s “#2nm” chip tech hyperbole with “#1nm” claimhttps://t.co/xWTVO8ygW6#semi pic.twitter.com/EUetFKHidw

— Wladek Grabinski (@wladek60) May 19, 2021

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from Twitter https://twitter.com/wladek60

May 19, 2021 at 02:54PM
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[paper] An Accurate Analytical Modeling of Contact Resistances in MOSFETs

G. Bokitko, D. S. Malich, V. O. Turin*, and G. I. Zebrev

An Accurate Analytical Modeling of Contact Resistances in MOSFETs

Preprint · May 7, 2021 DOI: 10.13140/RG.2.2.29348.40321

National Research Nuclear University MEPHI, Moscow, Russia;
*Orel State University, Russia;

Abstract: As the MOSFET channel lengths decrease, the influence of parasitic source-drain resistance on the current characteristics becomes more and more important. The contact resistance is becoming a growing impediment to transistor power and performance scaling. This is a common challenge for SOI FETs, FinFETs and GAAFETs and any other type of transistor. Most of the modern compact models that are used in circuits simulations are too much technology oriented. We find it important to construct an analytical approach that could be served as a basis for compact modeling. This approach is based on analytical solution Kirchhoff’s equations and on the diffusion-drift field effect transistor model.

Fig: Equivalent MOSFET circuit with series resistance

[paper] Generalized Devices for SPICE Simulation of Soft Errors

Chiara Rossi, André Chatel and Jean-Michel Sallese*

Modeling Funneling Effect With Generalized Devices for SPICE Simulation of Soft Errors

in IEEE Transactions on Electron Devices,

doi: 10.1109/TED.2021.3076028 

* EPFL, 1015 Lausanne (CH)

Abstract: Recent advances in CMOS scaling have made circuits more and more sensitive to errors and dysfunction caused by ionizing radiation, even at ground level, requiring accurate modeling of such effects. Besides generation, transport, and collection of radiation-induced excess carriers, another phenomenon, called funneling, has to be modeled for an accurate prediction of soft errors. The funneling effect occurs when the radiation track crosses a space charge region and generates excess carriers with a density higher than the doping close to it. These carriers distort the electric field of the space charge region, deeply changing the transport mechanism, from diffusion in a field-free semiconductor to drift. The objective of this work is to include funneling as part of the generalized lumped devices model in order to obtain a complete tool for SPICE-compatible simulations of single-event effects (SEEs). The latter approach has been recently proposed to simulate radiation-induced charges in the silicon substrate and is based on the so-called generalized lumped devices that simulate charge generation, propagation, and collection using standard circuit simulators. The generalized devices are here extended to include funneling and used to simulate an alpha particle impinging on the bulk of nMOS and pMOS transistors. The results obtained are validated with TCAD numerical simulations. Finally, a static random-access memory (SRAM) struck by an alpha particle is analyzed. The model predicts that the occurrence of a soft error, i.e., flipping of memory state, may depend on whether or not there is funneling. This justifies the need for accurate modeling of funneling phenomena to predict SEEs in ICs.

FIG: Generalized devices network obtained for the pMOS substrate. The mesh is drawn in gray dashed lines. The network is not shown around the radiation track; only the mesh is reported, which is denser to linearize the generation profile and excess carrier gradients.

Aknowlwdgement: This work was supported by the Swiss National Science Foundation (NSF) under Grant 200021_165773.