[paper] Generalized Devices for SPICE Simulation of Soft Errors

Chiara Rossi, André Chatel and Jean-Michel Sallese*

Modeling Funneling Effect With Generalized Devices for SPICE Simulation of Soft Errors

in IEEE Transactions on Electron Devices,

doi: 10.1109/TED.2021.3076028 

* EPFL, 1015 Lausanne (CH)

Abstract: Recent advances in CMOS scaling have made circuits more and more sensitive to errors and dysfunction caused by ionizing radiation, even at ground level, requiring accurate modeling of such effects. Besides generation, transport, and collection of radiation-induced excess carriers, another phenomenon, called funneling, has to be modeled for an accurate prediction of soft errors. The funneling effect occurs when the radiation track crosses a space charge region and generates excess carriers with a density higher than the doping close to it. These carriers distort the electric field of the space charge region, deeply changing the transport mechanism, from diffusion in a field-free semiconductor to drift. The objective of this work is to include funneling as part of the generalized lumped devices model in order to obtain a complete tool for SPICE-compatible simulations of single-event effects (SEEs). The latter approach has been recently proposed to simulate radiation-induced charges in the silicon substrate and is based on the so-called generalized lumped devices that simulate charge generation, propagation, and collection using standard circuit simulators. The generalized devices are here extended to include funneling and used to simulate an alpha particle impinging on the bulk of nMOS and pMOS transistors. The results obtained are validated with TCAD numerical simulations. Finally, a static random-access memory (SRAM) struck by an alpha particle is analyzed. The model predicts that the occurrence of a soft error, i.e., flipping of memory state, may depend on whether or not there is funneling. This justifies the need for accurate modeling of funneling phenomena to predict SEEs in ICs.

FIG: Generalized devices network obtained for the pMOS substrate. The mesh is drawn in gray dashed lines. The network is not shown around the radiation track; only the mesh is reported, which is denser to linearize the generation profile and excess carrier gradients.

Aknowlwdgement: This work was supported by the Swiss National Science Foundation (NSF) under Grant 200021_165773.

[thesis] SPICE modeling of light and radiation effects in ICs

A novel approach for SPICE modeling of light and radiation effects in ICs

Chiara ROSSI

Présentée le 29 janvier 2021

à la Faculté des sciences et techniques de l’ingénieur Groupe de scientifiques IEL

Programme doctoral en microsystèmes et microélectronique

pour l’obtention du grade de Docteur ès Sciences

DOI:10.5075/epfl-thesis-8422

Modeling the interaction of ionizing radiation, either light or ions, in integrated circuits is essential for the development and optimization of optoelectronic devices and of radiation-tolerant circuits. Whereas for optical sensors photogenerated carriers play an essential role, high energy ionizing particles can be a severe issue for circuits, as they create high density of excess carriers in ICs substrate, causing parasitic signals. In particular, recent advances in CMOS scaling have made circuits more sensitive to errors and dysfunctions caused by radiation-induced currents, even at the ground level. TCAD simulations of excess carriers generated by light or radiation are not dedicated to large scale circuit simulations since only few devices can be simulated at a time and computation times are too long. Conversely, SPICE simulations are faster, but their accuracy is strictly dependent on the correctness of the compact models used to describe the devices, especially when dealing with photocurrents and parasitic radiation-induced currents.

The objective of this thesis is to develop a novel modeling approach for SPICE compatible simulations of electron-hole pairs generated by light and by high energy particles. The approach proposed in this work is based on the Generalized Lumped Devices, previously developed to simulate parasitic signals in High Voltage MOSFET ICs. Here, the model is extended to include excess carriers generation. The developed approach allows physics-based simulations of semiconductor structures, hit by light or radiation, that can be run in standard circuit simulators without the need for any empirical parameter, only relying on the technological and geometrical parameters of the structure, and without any predefined compact model. The model is based on a coarse mesh of the device to obtain an equivalent network of Generalized Lumped Devices. The latter predicts generation of excess carriers and their propagation, recombination and collection at circuit nodes through the definition of equivalent voltages, proportional to the excess carrier concentrations, and equivalent currents, proportional to the excess carrier gradients. The model is validated with commercial TCAD numerical simulations for different scenarios. Regarding light effects, the proposed strategy is applied to simulate various optoelectronic devices. Complete DC I-V characteristics of a solar cell and transient response of a photodiode are studied. Next, phototransistors are considered. After, a full pixel of a 3T-APS CMOS image sensor is analyzed. The photosensing device, described with Generalized Devices, is co-simulated with the in-pixel circuit, described with compact models. The impact of semiconductor parameters on pixel output and on crosstalk between adjacent pixels is predicted. Finally, radiation-induced soft errors in ICs are examined. Alpha particles at different energies hitting the substrate are simulated. Parasitic currents collected at contacts are studied as a function of particles position and energy. Funneling effect, which is a phenomenon specific to high injection, is also included in the model.

This work shows that the Generalized Lumped Devices approach can be successfully used for SPICE simulations of optoelectronic devices and for prediction of radiationinduced parasitic currents in ICs substrate. This thesis is a first step towards a complete and flexible tool for excess carriers modeling in standard circuit simulators.

Fig: Layout, mesh (gray dashed lines) and equivalent network of Generalized Lumped Devices (Generalized Homojunctions, Resistors and Diodes). The structure is uniformly illuminated from the left side, justifying a 1D discretization scheme.