24th International Conference on Microelectronic Test Structures (ICMTS)

The IEEE Electron Devices Society sponsors the 24th International Conference on Microelectronic Test Structures (ICMTS).

The conference will be held on April 5-7, 2011, in downtown Amsterdam (The Netherlands) at the Royal Academy of Arts and Sciences, and will be preceded by a one-day Tutorial Short Course on Microelectronic Test Structures on April 4. The program further includes a company exhibit and various social events in and around the Academy. 

Registration to the conference is now open. If you wish more info, please visit their website http://icmts2011.ewi.utwente.nl/ for further information.

[mos-ak] Final Program MOS-AK/GSA Workshop in San Francisco

Please visit the MOS-AK/GSA San Francisco web site with the final
workshop program:
http://www.mos-ak.org/california/

* Free On-line Registration Form:
http://www.mos-ak.org/california/registration.php

* Venue: The JW Marriott Union Square, San Francisco, CA
http://www.marriott.com/hotels/travel/sfojw-jw-marriott-san-francisco-union-square/

* Agenda
Dec. 8, 2010: MOS-AK/GSA Workshop co-located with the CMC Meeting and
IEDM Conference
9:00 - 12:00: Morning Session - Chair: Ian Getreu
13:00 - 16:00: Afernoon Session - Chair: Larry Nagel
http://www.mos-ak.org/california/

MOS-AK/GSA Happy Hour at Noma Gallery
after 18:00 - Discussion, networking and...
80 Maiden Ln. 3rd fl, San Francisco, CA
http://www.nomagallerysf.com/artists/NOMA_GALLERY/index.html

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Senior Research Engineer - MEMS circuits

Responsibilities:

Electro-mechanical computing has recently emerged as a very promising solution for ultra-low-power and high temperature circuit applications. The candidate will be responsible of the development of nano-electromechanical components for computation applications (logic and memory devices). This research will include device physics and modeling, design, fabrication in the IME cleanroom and characterization of electro-mechanical devices and circuits. Reliability and failure testing of memory arrays will be conducted.

Requirements:

PhD degree in Mechanical Engineering, Electrical Engineering or Material Sciences. Hands-on experience on wafer level MEMS related works, including microfabrication process and work in a cleanroom environment. Familiar with electrical measurement techniques (device and memory arrays). Strong interest for MEMS multi-physics modeling. Excellent communication skills and teamwork with strong self-motivation. Interaction with industrial/academic partners expected.

Please contact Dr Vincent Pott for more information.

Position to remain open until a candidate is selected (apply online).

First comprehensive and systematic course on statistical variability

I am delighted to bring to your attention the first comprehensive and systematic course on statistical variability.

Dates: 11-12 January 2011 in Grenoble.

This first edition of the course is in collaboration with the SINANO Institute and the FP7 NoE NANOSIL. 

The course covers:

· Variability classification
· Sources of statistical variability
· Simulation of statistical variability
· Variability trends in conventional and novel MOSFETs
· Random telegraph noise statistics
· Statistical aspects of reliability
· Statistical compact model strategies
· Statistical circuit simulation

You can find the syllabus at:
http://www.goldstandardsimulations.com/courses/syllabus/ 

You will be able to register for the course soon at:

http://www.goldstandardsimulations.com/courses/.

[mos-ak] C4P MOS-AK/GSA Workshop in San Francisco on December 8th, 2010

C4P MOS-AK/GSA Workshop in San Francisco on December 8th, 2010
http://www.mos-ak.org/california/

We, together with the lead sponsors Accelicon Technologies and Cascade
Microtech, are delighted to declare that we have confirmed a first-
class location for the MOS-AK/GSA Workshop in San Francisco on
December 8th, 2010: the JW Marriott Union Square <http://
www.marriott.com/hotels/travel/sfojw-jw-marriott-san-francisco-union-square/>.
Attendees will need to secure their own lodging and transportation to
the event. The JW Marriott is centrally located near Union Square,
near IEDM, and public transportation is abundant.

The MOS-AK/GSA Workshop in San Francisco will be organized as in the
timeframe of the IEDM and CMC Meetings. The MOS-AK/GSA Workshop is
HiTech forum to discuss the frontiers of the electron devices modeling
with emphasis on simulation-aware models. Original papers presenting
new developments and advances in the compact/spice modeling and its
Verilog-A standardization are solicited. Suggested topics include (but
are not limited to):
* Compact Modeling (CM) of the electron devices
* Verilog-A language for CM standardization
* New CM techniques and extraction software
* CM of passive, active, sensors and actuators
* Emerging Devices, CMOS and SOI-based memory cells
* Microwave, RF device modeling, high voltage device modeling
* Nanoscale CMOS devices and circuits
* Technology R&D, DFY, DFT and IC Designs
* Foundry/Fabless Interface Strategies

On-line abstract submission will be open on Nov.5, 2010.

Further details and updates http://www.mos-ak.org/california/

Local Organizing Committee:
Junko Nakaya, Cascade Microtech
Tim K.Smith, Accelicon Technologies

Extended MOS-AK/GSA Committee:
Jodi Shelton, President, Global Semiconductor Alliance (GSA)
Chelsea Boone GSA; Senior Research Analyst
Wladek Grabinski, GMC Suisse; MOS-AK/GSA Group Manager
MOS-AK/GSA North America:
Chair: Pekka Ojala, Exar Corporation
Co-Chair: Geoffrey Coram, Analog Devices
Co-Chair: Prof. Jamal Deen, U.McMaster
Co-Chair: Roberto Tinti, Agilent EEsof Division
MOS-AK/GSA South America:
Chair: Prof. Gilson I Wirth; UFRGS; Brazil
Co-Chair: Prof. Carlos Galup-Montor, UFSC; Brazil
Co-Chair: Sergio Bampi, UFRGS, Brazil
Co-Chair: Prof. Antonio Cerdeira Altuzarra, Cinvestav - IPN, Mexico
MOS-AK/GSA Europe:
Chair: Ehrenfried Seebacher, austriamicrosystems AG
Co-Chair: Alexander Petr, XFab
Co-Chair: Prof. Benjamin Iniguez, URV
Co-Chair: James Victory, Sentinel-IC
MOS-AK/GSA Asia/Pacific:
Chair: Goichi Yokomizo, STARC, Japan
Co-Chair: Sadayuki Yoshitomi, Toshiba, Japan
Co-Chair: Prof. Xing Zhou, NTU, Singapore
Co-Chair: Prof. A.B. Bhattacharyya, JIIT

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