IRPhE 2020 Aghveran, Armenia

International Conference on Microwave & THz Technologies,

Wireless Communications and OptoElectronics

September 23-25, 2020, Aghveran, Armenia

IRPhE 2020 Call for Papers

The aim of the IRPhE’ 2020 Conference is to provide an open forum for the presentation and discussion of current research in Microwave and THz technologies, wireless communications, alternative electronic devices, photonics and its applications.

The main topics of the conference are and not limited to:

• Microwave devices, antennas, propagation and remote sensing
• THz technique, spectroscopy and applications
• Alternative semiconductor and dielectric materials, electronic devices
• Wireless communications and related information technologies
• Microwave photonics

For further information visit the website: http://www.irphe.am/?q=conference

Submission Information

Original one page abstracts will be accepted for review in Word and PDF formats.The accepted abstracts will be published in an abstract book and distributed during the conference.

All the authors who have presented their work at the conference will be invited to submit 4-page follow-up papers for publication special IJHSES issue on the "Microwave and THz technologies"

Abstracts must be submitted via email: science@irphe.am.

MOS-AK India #45395 is now published in IEEE Xplore

2019 IEEE Conference on Modeling of Systems Circuits and Devices 

(MOS-AK India) - #45395 

is now published in IEEE Xplore

Conference Record #45395

Dear Arifuddin Sohel, Desai UB, Govindacharyulu P.A, Wladek Grabinski, Venkatesh N

Congratulations! 2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India) has been posted to the IEEE Xplore digital library effective 2019-11-18.

Along with publication in IEEE Xplore, IEEE assures wide distribution of conference proceedings by providing abstracting and indexing information of all individual conference papers to worldwide databases. IEEE makes every reasonable attempt to ensure that abstracts and index entries of content accepted into the program are included in databases provided by independent abstracting and indexing services. Each abstracting and indexing partner makes its own editorial decision on what content to include. IEEE cannot guarantee entries are included in any particular database.

IEEE Meetings, Conferences & Events (MCE)

445 Hoes Lane, Piscataway, NJ 08854 USA

https://www.ieee.org/conferences-organizers

IEEE: Advancing Technology for Humanity

[IEEE EDS Update] MIXDES 2019, Rzeszów (PL)

26th International Conference “Mixed Design of Integrated Circuits and Systems"'
MIXDES 2019 

By Marcin Janicki

On June 27–29, 2019, Rzeszów, Poland, the International Conference MIXDES 2019 took place. The event was organized by the Lodz University of Technology together with the Warsaw University of Technology. The conference was co-sponsored by Poland Section IEEE ED & CAS Societies, Polish Academy of Sciences (Section of Microelectronics and Electron Technology), and Commission of Electronics and Photonics of Polish National Committee of International Union of Radio Science—URSI. The 3-day conference program included 97 presentations from 28 countries. The following six general invited talks were presented during the conference plenary sessions:

• Advanced MOS Device Technology for Low Power Logic LSI Shinichi Takagi (The University of Tokyo, Japan)
• Quantum Bits and Quantum Computing Architecture Farzan Jazaeri (EPFL, Switzerland)
• Towards Energy-Autonomous Integrated Systems Through Ultra-low Voltage Analog IC Design Viera Stopjaková (Slovak University of Technology in Bratislava, Slovakia)
• THz Technologies and Applications Thomas Skotnicki (Institute of High Pressure Physics PAS, Poland)
• What is Killing Moore’s Law? Challenges in Advanced FinFET Technology Integration Arkadiusz Malinowski (GLOBALFOUNDRIES, USA)
• Yield and Reliability Challenges at 7nm and Below Andrzej Strojwąs (Carnegie Mellon University, USA)

The sessions also included presentations in the frame of four special sessions:

• Compact Modeling for Nanoelectronics organized by D. Tomaszewski (Institute of Electron Technology, Poland) and W. Grabiński (GMC, Switzerland)
• Intelligent Distributed Systems organized by M. Drozd (LTC Sp. z o.o., Poland), R. Sztoch, P. Sztoch (FINN Sp. z o.o., Poland), B. Sakowicz and D. Makowski (Lodz University of Technology, Poland)
• Large Scale Research Facilities organized by A. Napieralski, W. Cichalewski (Lodz University of Technology, Poland)
• Thermonuclear Fusion Projects organized by S. Simrock (ITER, France), D. Makowski (Lodz University of Technology, Poland), D. Bocian and M. Scholz (Institute of Nuclear Physics, Poland

The next MIXDES 2020 Conference will take place in Wrocław, Poland. The Preliminary Call for Papers is available at http://www.mixdes.org/downloads/call2020.pdf. More information about the past and next MIXDES Conferences can be found at http://www.mixdes.org.

Edited by Mariusz Orlikowski

MIXDES 2019 Conference Secretary

ICCDCS 2017

Tenth International Caribbean Conference on Devices, Circuits and Systems (ICCDCS 2017)

June 5-7 2017, Cozumel, México

08:00 to 9:00	Registration	Registration	Registration
08:45 to 9:00	Opening Ceremony
09:00 to 10:00	Key Note 1: "Adaptive Heterogenous Multi-Core Technologies- Intelligent, Interconnected and Integrated Cyber-Physical Systems (I3CPS)", Jürgen Becker	Key Note 3: "The Life and Times of Eugeni García", Benjamín Íñiguez	Key Note 6: "On the Extraction Methods for MOSFET Series Resistance and Mobility Degradation using a Single Test Device",Adelmo Ortiz Conde
10:00 to 10:30	Break	Break	Break
10:30 to 12:30	Session 1	Session 3	Session 5
10:30 to 10:50	"Model Based Photopic Electroretinogram Source Separation: A Multiresolution Analysis Approach", Prashanth Chetlur Adithya, Alaql Abdulrahman, Radouil Tzekov, Ravi Sankar and Wilfrido Moreno	"A Programmable CMOS Voltage Controlled Ring Oscillator for Radio-Frequency Diathermy On-chip Circuit", Antonio Corres- Matamoros, Esteban Martinez-Guerrero and Jose E. Rayas-Sanchez	"Health Index Assessment for Power Transformers with Thermal Upgraded Paper up to 230kV, Using Fuzzy Inference. Part II: A Sensibility Analysis", Diego Chacón, Juan Pablo Lata and Ricardo Medina
10:50 to 11:10	"Analytical Model Parameter Determination for Microwave On-Chip Inductors up to the Second Resonant Frequency", José Valdés Rayón, Reydezel Torres and Roberto Murphy	"A logarithmic CMOS image sensor with wide output voltage swing range", Fernando Campos, Mário Bordon, Marcelo Silva and Jacobus Swart	"Implementation Model Using a Hippocratic Protocol in Mobile Terminals with NFC Technology", Carlos Kowalevicz, Jose Pirrone Puma and Monica Huerta
11:10 to 11:30	"Energy Consumption Improvement based on Distance Adaptive Modulation in Optical Elastic Network", Sabi Bandiri, Rafael Braga, Tales Pimenta and Danilo Spadoti	"Improving Magnitude Response in Two-Stage Corrector Comb Structure", Gordana Jovanovic Dolecek and Lyda Herrera Sepulveda	"Internet of Things as an Attack Vector to Critical Infrastructures of Cities", Pablo Leonidas Gallegos-Segovia, Jack Fernando M. Larios-Rosillo and Erwin Jairo Sacoto-Cabrera
11:30 to 11:50	"Switching Region Analysis for SOTB Technology", Carlos Cortes Torres, Nobuyuki Yamasaki and Hideharu Amano	"Analysis of the influence of the buffer layer in the characteristic impedance of electro-optic modulators", Ana Gabriela Correa Mena, Luis Alejandro González Mondragón, Leidy Johana Quinteros Rodríguez, José Valdés Rayón and Ignacio Enrique Zaldívar Huerta	"Sensors for Parkinson's Disease Evaluation", Raquel Torres, Monica Huerta, Ricardo Gonzalez, Roger Clotet and Juan Pablo Bermeo
11:50 to 12:10	"Scalable Models to Represent the Via-Pad Capacitance and Via-Traces Inductance in Multilayer PCB High-Speed Interconnects", Abraham Isidoro Muñoz, Miguel Angel Tlaxcalteco Matus, Reydezel Torres Torres and Gaudencio Hernandez Sosa	"Impact of neglecting the metal losses on the extraction of the relative permittivity from PCB transmission line measurements", Erika Yazmin Teran Bahena and Reydezel Torres Torres	"QoS Evaluation of VPN in a Raspberry Pi devices over Wireless Network", Luis Caldas, Juan Jara and Mónica Huerta
12:10 to 12:30	"Implementation of a Reconfigurable Neural Network in FPGA", Janaina Oliveira, Robson Moreno, Odilon Dutra and Tales Pimenta	"Reconfigurable FIR Filter Coefficient Optimization in Post-Silicon Validation to Improve Eye Diagram for Optical Interconnects",Ismael Duron-Rosales, Francisco E. Rangel-Patino, Jose E. Rayas-Sanchez, Jose L. Chavez-Hurtado and Nagib Hakim	"A Proposed Digital Predistorter Based on NLMS and PSO Algorithms", Omar Alngar, Walid El-Deeb and El-Sayed El-Rabaie
12:30 to 15:00	Lunch	Lunch	Closing remarks
15:00 to 16:00	Key Note 2: "Following the Path of 3D Integration", Malgorzata Chrzanowska-Jeske	Key Note 4: “Modeling and Verification of Heterogeneous Systems”, Filipe Vinci
16:00 to 16:15	Break	Poster Introduction*
16:15 to 17:55	Session 2	Session 4
16:15 to 16:35	"MRAM control Transistor Resilience against Heavy-Ion Impacts", Walter Enrique Calienes Bartra, Raphael Brum, Guilherme Flach and Ricardo Reis	Break w/poster session (16:15 to 17:00)
16:35 to 16:55	"A Charge-controlled Memristor Model for Image Edge Detection with a Memristive Grid", Arturo Sarmiento and Yojanes Rodríguez-Velásquez
16:55 to 17:15	"Characterization and modelling of Ag/TiO2/ITO devices exhibiting bipolar memristive properties", Jesús Jiménez-León, Arturo Sarmiento, Carlos De La Cruz Blas and Cristina Gomez-Polo
17:15 to 17:35	"Assessing the accuracy of the open, short and open-short de-embedding methods for on-chip transmission line s-parameters measurements", Juan Garcia Santos and Reydezel Torres	Key Note 5: (17:00 to 18:00) "Innovation by ASIC design and emerging substream markets"Jacobus Swart
17:35 to 17:55	"Evaluation of Interconnects Based on Electromigration Criteria and Circuit Performance", Rafael Nunes, Roberto Orio and Jacobus Swart
19:00	Welcome Cocktail
19:30		Conference Banquet

Poster Session:

"Differentiated synchronization plus FHIR a solution for EMR's Ecosystem", Roger Clotet, Emilio Hernández and Monica Karel Huerta

"Design and Validation of a Portable Radio-Frequency Diathermy Prototype", Antonio Corres-Matamoros, Esteban Martinez-Guerrero and Jose E. Rayas-Sanchez

"Stimulating social interaction among elderly people through sporadic social networks", Jorge Osmani Ordoñez-Ordoñez, Jack Fernando Bravo-Torres, Oscar David Sari-Villa, Esteban Fernando Ordoñez-Morales, Martín López-Nores and Yolanda Blanco-Fernández

"Sensing Climatic Variables in a Orchid Greenhouse", Luis Fernandez, Mónica Huerta, Giovanni Sagbay, Roger Clotet and Angel Soto

"Low cost system for monitoring physiological signals using FPGA and Android Tablet", J. Bucheli, D. Rivas, J. Gavilema, D. Mullo, J. L. Carrillo, M. Huerta

[call for papers] 2017 IEEE S3S Conference

Overview: This industry - wide event has gathered, for over 30 years, industry leaders and widely known experts, in a social - oriented environment. Our contributed papers and invited talks are focused on SOI Technology, Low - Voltage Devices/Circuits/Architectures, and 3D Integration. These 3 technologies will play a major role in tomorrow's industry as they enable application - tailored and Energy / Cost efficient circuit designs.

Important Dates

Paper Submission Deadline: May 22, 2017

Acceptance Notification: July 1, 2017

The conference at a glance

Monday to Wednesday, Oct. 16-18, 2017: Technical Sessions

Thursday, Oct.19: Fully - Depleted SOI Circuit Design; Full-day Tutorial
Tuesday, Oct.17: Monolithic 3D Half-day Tutorial

---

Scope: We welcome papers in the following areas:
Silicon On Insulator (SOI)
• Advanced Materials, Substrate and Processes • Device Physics, Characterization and Modeling • Device/Circuit Integration • SOI Design, Circuits and Applications	• Non-Digital Devices and Applications (RF, HV, Photonics, NEMS, MEMS, Analog...) • New SOI Structures, Circuits and Applications
Low-Voltage Microelectronics
• Space-Based and Unattended Remote Sensors • Biomedical Devices • Low-Voltage Handheld/wireless systems • Ultra-Low-Power Digital Computation • Analog and RF Technologies	• Low Voltage Memory Technologies • Energy Harvesting Techniques • Asynchronous Circuits • Novel Device and Fabrication Technology
3D Integration
• Low Thermal Budget Processing • Fabrication Techniques and Bonding Methods • Design and Test Methodologies • Processes for Multi Wafer Stacking • 3D IC EDA and Design Technology	• Heterogeneous Structures • 3D Manufacturing and Logistics • Reliability of 3D Circuits • Fault Tolerant 3D Designs

---

Paper Submission:
Prospective authors should prepare a 2page abstract (follow online guidelines).
Acceptance is based on paper’s technical quality and relevance.

---

Conference manager contact Joyce Lloyd
6930 De Celis Pl., #36
Van Nuys, CA 91406
Tel: +1 818 795 3768
Fax: +1 818 855 8392

[EUROSOI ULIS] Deadline for abstract submission extended to January 29, 2017

Submit your abstract for  Conference to be held in Athens in April 2017 as soon as possible. We would like to inform you that, due to several requests, the deadline for abstract submission has been extended to January 29, 2017, Please note that there will be both Oral and Poster Sessions 

Call for Papers

The organizing committee invites scientists and engineers working in the above fields to actively participate by submitting high quality papers. Original 2-page abstracts with illustrations will be accepted for review in pdf format. The accepted abstracts will be published in a Proceedings book with an ISBN. A 4-page follow-up paper delivered before will be published in IEEE Xplore Digital Library. The authors of the best papers will be invited to submit a longer version for publication in a special issue of Solid-State Electronics. A best paper award will be attributed to the best paper by the SINANO Institute. Both an Oral and a A Poster Session will be organized.

INVITED SPEAKERS

Prof. Maryline Bawedin, IMEP - INP Grenoble MINATEC, "The mystery of the Z2-FET 1T-DRAM memory"

Dr. Frank Schwierz, University of Ilmenau, "The Prospects of 2D Materials for Ultimately-Scaled CMOS"

Dr. Cosmin Roman, ETH Zurich, "Micro and Nano transducers for autonomous sensing applications"

Dr. Carlo Cagli,  CEA-LETI,  "Memories"

Dr. Anda Mocuta, IMEC, "Nanoscale FET"

The EUROSOI ULIS Conference Chairperson: 

Prof. Androula G. Nassiopoulou

NCSR Demokritos 

Institute of Nanoscience and Nanotechnology, 

Athens, Greece 

ESSDERC ESSCIRC in Graz (A)

 ESSDERC 2015: 45th European Solid-State Device Conference

 ESSCIRC 2015: 41th European Solid-State Circuits Conference

 September 14-18, 2015 - Graz, Austria

The aim of ESSDERC and ESSCIRC is to provide an annual European forum for the presentation and discussion of recent advances in solid-state devices and circuits. The increasing level of integration for system-on-chip design made available by advances in silicon technology is, more than ever before, calling for a deeper interaction among technologists, device experts, IC designers, and system designers. While keeping separate Technical Program Committees, ESSCIRC and ESSDERC are governed by a common Steering Committee and share Plenary Keynote Presentations and Joint Sessions bridging both communities. Attendees registered for either conference are encouraged to attend any of the scheduled parallel sessions, regardless to which conference they belong.

Read more:

• Program at a glance (Sept. 14 to 18, 2015 including Tutorials and Workshops)
• Program folder

Micro&Nano 2015 - 2nd Announcement

6th Micro & Nano Conference on Micro - Nanoelectronics, Nanotechnologies and MEMs
4-7 October, 2015, Athens, Greece
http://conference-micronano2015.micro-nano.gr

Second Announcement

The "Micro&Nano 2015" Conference will be held at the Fenix Hotel, in Glyfada, Athens, Greece. The Best Western Hotel Fenix is conveniently located in Glyfada, an attractive resort in the south coast of Athens. More details on the Conference venue can be found on the conference website:

<http://conference-micronano2015.micro-nano.gr>

Conference Topics:

• Micro and Nano- Fabrication
• Materials for Electronics, Photonics and Sensors
• Electronic, Optoelectronic and Photonic Devices
• Sensors and Actuators

All abstracts should not exceed the limit of 300 words. Please follow the abstract template that can be found here. The deadline for abstract submission is on 30 June 2015.

The Conference abstracts will be published in the "Abstract Book" that will be distributed to all the participants, at the beginning of the Conference. Selected papers will be published, after peer-review, in special issues of the following international journals:

• Nanoscale Research Letters (the nanoscience related articles)
• Microelectronic Engineering

[read more: http://conference-micronano2015.micro-nano.gr]

MIXDES 2015, June 25-27, 2015; Torun, Poland

 22nd International Conference "Mixed Design of Integrated Circuits and Systems"

 MIXDES 2015, June 25-27, 2015; Torun, Poland

The deadline for regular paper submission is approaching (March 2nd, 2015). If you are going to contribute, I encourage you to register your papers as soon as possible. You will be able to update the paper details and the document file at any time till the final paper version deadline (May 15th, 2015). The early submission will allow us to take care of your paper just now, especially start the reviewer assignments and begin the formatting verification process.

[read more...]

ESSCIRC/ESSDERC 2015 website is now active

 ESSCIRC/ESSDERC 2015 website is now active: www.esscirc-essderc2015.org

 The deadline for paper submission is 2 April, 2015.
 Looking forward to seeing you in Graz!

Prof. Wolfgang Pribyl: General Chair ESSCIRC/ESSDERC 2015
Franz Dielacher, Gernot Hueber: ESSCIRC TPC Chairs
Martin Schrems, Tibor Grasser: ESSDERC TPC Chairs

ESSDERC/ESSCIRC 2014 - Full conference program is now available

The technical program, tutorial program, and workshop program of ESSDERC/ESSCIRC 2014
are now available at  ESSDERC/ESSCIRC 2014  website: http://www.esscirc-essderc2014.org 

Please remember to register to the conference and book a hotel room at before June 20, after 
which we cannot guarantee that you will find a hotel room at our rebated prices.

The event is technically co-sponsored by the
    IEEE Electron Device Society,
    IEEE Solid-State Circuit Society
    IEEE Circuits and Systems Society

We hope to see you in Venice

Best Regards  Gaudenzio Meneghesso
ESSDERC/ESSCIRC 2014  General Chair

Roberto Bez and Paolo Pavan
ESSDERC 2014 TPC Chairs

Pietro Andreani and Andrea Bevilacqua 
ESSCIRC 2014 TPC Chairs


JOINT PLENARY TALKS 
Scott DeBoer, Micron, ID, USA, A Semiconductor Memory Manufacturing and Development Perspective
Thomas H. Lee, Stanford University, CA, USA Terahertz Electronics: The Last Frontier 
Fabio Marchiò, STMicroelectronics, Italy, Automotive Electronics: Application & Technology Megatrends
Walter Snoeys, CERN, Switzerland, How Chips Helped Discover the Higgs Boson at CERN
An Steegen, IMEC, Belgium, Logic Scaling Beyond 10nm, a Power-Performance-Area-Cost Trade-off 
Sehat Sutardja, Marvell Semiconductor, CA, USA Tremendous Benefits of Moore’s Law Have Yet to Come

ESSCIRC PLENARY TALKS
Hooman Darabi, Broadcom Corporation, CA, USA Blocker Tolerant Software Defined Receivers

Un-Ku Moon, Oregon State University, OR, USA Emerging ADCs
Kathleen Philips, IMEC-Holst Centre, The Netherlands Ultra-Low Power Short Range Radios

ESSDERC PLENARY TALKS
Umesh Mishra, UCSB and TRanphorm, CA, USA,  GaN-based solutions from KHz to THz 

Eric Pop, Stanford University, CA, USA, Energy Efficiency and Conversion in 1D and 2D Electronics
Takao Someya, University of Tokyo, Japan Bionic Skins Using Flexible Organic Devices

ESSCIRC TUTORIALS

Power Management for SoCs (Full Day), Organizer: Christoph Sandner, Infineon, Austria
High Performance Amplifiers (Half Day), Organizer: Angelo Nagari, STMicroelectronics, France
Phase Noise: from Fundamentals to Circuit Aspects (Half Day) Organizer: Christian Enz, EPFL, Switzerland

ESSDERC TUTORIALS
CMOS Technology at the nm Scale Era (Full Day) Organizer: Maud Vinet, CEA LETI, France

RRAM: from Technology to Applications (Half Day) Organizer: Bogdan Govoreanu, IMEC, Belgium 
3D: from Technology to Applications (Half Day) Organizer: Pascal Vivet, CEA LETI, France

ESSDERC/ESSCIRC Workshops
Beyond-CMOS for advanced More Moore and More than Moore applications 
Organizers: Francis Balestra and Enrico Sangiorgi, Sinano Institute - Grenoble INP/CNRS, France
MOS-AK: Over Two Decades of Enabling Compact Modeling R&D Exchange   
Organizer: Wladek Grabinski, MOS-AK Group (EU),
Status of the GaN and SiC based device development   
Organizer: Enrico Zanoni, University of Padova, DEI, Italy
THz-Workshop: Millimeter- and Sub-Millimeter-Wave circuit design and characterization   
Organizer: Thomas Zimmer, University Bordeaux, France
Marie Curie ATWC   
Organizer: Rinaldo Castello, University of Pavia and Marvell, Italy

Devices That You Definitely Will (and Just Might) Use: Emerging Transistor Technologies for the Near-and Long-Term

 WEDNESDAY June 04, 4:00pm - 6:00pm | Room 302 

 TRACK: EDA

 TOPIC AREA: EMERGING TECHNOLOGIES

 SPECIAL DAC SESSION 63: Devices That You Definitely Will (and Just Might) Use: Emerging Transistor Technologies for the Near-and Long-Term

Chair:  Michael Niemier; Univ. of Notre Dame, IN
Organizers:  Michael Niemier; Univ. of Notre Dame, IN
Xiaobo Sharon Hu; Univ. of Notre Dame, IN

Want to learn about the latest developments in FinFET-based processor design? What other transistor technologies might follow FinFETs and would they bring new design and modeling challenges? Come to this session to hear about both near- and long-term transistor technologies and their prospects for continuing Moore’s Law-based performance scaling trends. The session will begin with a discussion of FinFET technology; subsequent presentations will discuss tunnel transistors (TFETs) as well as other emerging FET technologies that could reenable voltage scaling. The session will conclude with a discussion of modeling efforts that consider the impact of new device technologies on von Neumann architectures as well as hybrid analog/digital circuits and architectures.

63.1 FinFET's and Their Implications for Design Now and in the Future

• Speaker: Rob Aitken; ARM Ltd., San Jose, CA
  Greg Yeric; ARM Ltd., Austin, TX
  Brian Cline; ARM Ltd., Austin, TX
  Lucian Shifren; ARM Ltd., San Jose, CA

63.2 Emerging Devices for Logic: Can a Low-Power Switch Be Fast?

• Speaker: Thomas Theis; IBM T.J. Watson Research Center, Yorktown Heights, NY

63.3 Energy Efficient Tunnel-FET Transistors for Beyond CMOS Logic

• Speaker: Uygar Avci; Intel Corp., Portland, OR
  Daniel Morris; Intel Corp., Portland, OR
  Ian Young; Intel Corp., Hillsboro, OR

63.4 Steep Slope Devices: Enabling New Architectural Paradigms

• Speaker: Vijaykrishnan Narayanan; Pennsylvania State Univ., State College, PA
  Karthik Swaminathan; Pennsylvania State Univ., State College, PA
  Huichu Liu; Pennsylvania State Univ., State College, PA
  Moon Seok Kim; Pennsylvania State Univ., State College, PA
  Xueqing Li; Pennsylvania State Univ., State College, PA
  Jack Sampson; Pennsylvania State Univ., University Park, PA

[more about the DAC Conference]

ESSDERC/ESSCIRC 2014 - Paper submission deadline extension

the Organizing Committee decided to extend the paper submission deadline of the 44th ESSDERC and 40th ESSCIRC to:

April 16th, 2014 23:59 (GMT - 07:00 am)

This is a hard deadline and no further extensions will be granted. After the deadline is elapsed, further paper submissions will not be accepted. The notification of paper acceptance, May 27, 2014, has not changed. Detailed information about the conferences is provided at the ESSCIRC/ESSDERC 2014 website.

[read more...]

SISPAD2014: 2nd Call for Papers

Second Call for Papers

SISPAD2014

September 9 – 11, 2014

Workshop, September 8, 2014

Mielparque Yokohama, Yokohama, JAPAN

Co-sponsored by Japan Society of Applied Physics Technical 

Co-sponsored by IEEE Electron Devices Society

This conference provides an opportunity for the presentation and discussion of the latest advances in modeling and simulation of semiconductor devices, processes, and equipment for integrated circuits.

Topics:

• Modeling and simulation of all sorts of semiconductor devices, including FinFETs, ultra-thin SOI devices, emerging memory devices, optoelectronic devices, TFTs, sensors, power electronic device, widegap semiconductor devices, spintronic devices, tunnel FETs, SETs, carbon-based nanodevices, organic electronic devices, and bioelectronic devices
• Modeling and simulation of all sorts of semiconductor processes, including first-principles material design and growth simulation of nano-scale fabrication
• Fundamental aspects of device modeling and simulation, including quantum transport, thermal transport, fluctuation, noise, and reliability
• Compact modeling for circuit simulation, including low-power, high frequency, and power electronics applications
• Process/device/circuit co-simulation in context with system design and verification
• Equipment, topography, lithography modeling
• Interconnect modeling, including noise and parasitic effects
• Numerical methods and algorithms, including grid generation, user-interface, and visualization
• Metrology for the modeling of semiconductor devices and processes

Plenary Speakers:

• Augusto Benvenuti, Micron Technology,
  “Current status and future prospects of non-volatile memory modeling”
• Massimo V. Fischetti, University of Texas at Dallas,
  “Physics of electronic transport in low-dimensionality materials for future FETs”
• Kimimori Hamada, Toyota Motor Corporation,
  “TCAD challenge on development of power semiconductor devices for automotive applications”

Invited Speakers:

• Mario Ancona, Naval Research Laboratory,
  “Nonlinear thermoelectroelastic simulation of III-N devices”
• Asen Asenov, University of Glasgow,
  “Progress in the simulation of time dependent statistical variability in nano CMOS transistors”
• Jean-Pierre Colinge, Taiwan Semiconductor Manufacturing Company,
  “Nanowire transistors: pushing Moore's law to the limit”
• Tibor Grasser, Vienna University of Technology,
  “Advanced modeling of charge trapping: RTN, 1/f noise, SILC, and BTI”
• Kohji Mitsubayashi, Tokyo Medical and Dental University,
  “Novel biosensing devices for medical applications”
• Christian Sandow, Infineon Technologies,
  “Exploring the limits of the safe operation area of power semiconductor devices”
• Mark Stettler, Intel Corporation,
  “Device and process modeling: 20 years at Intel's other fab”

Workshops:

Two companion workshops will run concurrently prior to the start of the conference on Monday September 8, 2014:

• Compact Modeling "Enabling Better Insight of Device Features"
  Organizer: Mitiko Miura-Mattausch (Hiroshima University)
• Carrier Transport in Nano-Transistors: Theory and Experiments
  Organizer: Hideaki Tsuchiya (Kobe University) and Yoshinari Kamakura (Osaka University)

Abstract Submission: 

Authors are invited to submit a two-page abstract (A4 or 22×28cm) including figures. Full submission information is available at the ing web page: <https://sites.google.com/site/sispad2014/>. Authors of accepted papers will be notified by May 15, 2014. Camera-ready copy of a four-page manuscript will be required from the authors for inclusion in the Conference Proceedings by June 30, 2014.

Deadline for submission of abstract: March 31, 2014

Chip in Aracaju 2014 - Call for Papers

27th SBCCI 2014 29th SBMICRO 2014 4th WCAS 2014
September 1st to 5th 2014, Aracaju (SE), Brazil         

http://www.chip-in-aracaju.ufs.br

CHIP IN ARACAJU 2014 Conference to be held in the city of Aracaju, Brazil, from September 1^st to 5^th 2014. The conference co-locates two main symposia (SBCCI, SBMicro), one student forum (SFORUM), one workshop (WCAS) and the industrial exhibition.

27^th SBCCI (Symposium on Integrated Circuits and Systems Design) is an international symposium with an estimated attendance of about 200 experts from academia and industry. Among those 25% are expected to come from outside Brazil. This symposium represents the main event in chip design and design automation in Brazil. It is co-sponsored by the Brazilian Computing Society (SBC), the Brazilian Microelectronics Society (SBMicro), ACM SigDA and, the IEEE Circuits and Systems Society (CASS), and IFIP W 10. The proceedings will be published by the IEEE and will remain available at the IEEE Xplore and ACM Digital Library. 

Abstract Submission: March 23^th 2014          

Paper Submission Deadline: March 30^th 2014

Call for papers: 

http://www.chip-in-aracaju.ufs.br/archives/CFP%20-%20SBCCI2014.pdf

SBMicro 2014 (29^th Symposium on Microelectronics Technology and Devices) is an international symposium that usually counts with about 100 attendees focusing on process technologies. It is co-sponsored by the Brazilian Microelectronics Society (SBMicro), the Brazilian Computing Society (SBC), the Electrochemical Society (ECS) and, the IEEE Electron Devices Society (EDS). The proceedings will be published by the IEEE and ECS Digital Library.

Submission Deadline: March 31^th 2014        

Notification of Acceptance: May 18^th, 2014

Call for papers: 

http://www.chip-in-aracaju.ufs.br/archives/CFP%20-%20SBMICRO2014.pdf

WCAS 2014 (4th Workshop on Circuits and System Design) is devoted to the presentation and discussion of design experiences with a high degree of relevance in industrial and educational contexts, as well as innovative design methodologies and applications of specific design technologies in an industrial context. The main idea of the workshop is to offer the chance (primarily to industry) of pointing out to the community real-life design and technology challenges that should be addressed in the short-to-medium term.

Submission deadline (2 to 4 pages): June 1^st 2014        

Acceptance notification: July 13^th

Call for papers: http://www.chip-in-aracaju.ufs.br/archives/CFP%20WCAS2014.pdf

SFORUM 2014 (14th Microeletronics Students Forum) is an event promoted by the Brazilian Microelectronics Society (SBMicro) and the Brazilian Computer Society (SBC).

Paper Submission Deadline:June 2^nd 2014         

Notification of Acceptance: July 16^th, 2014

Call for papers: 

http://www.chip-in-aracaju.ufs.br/archives/SFORUM2014CFP.pdf

Companies and Industries: In addition to the technical sessions associated with the regular papers, each symposium normally invites 6 distinguished speakers to present tutorials and invited talks on state-of-the art topics. Furthermore, traditionally, the conference includes an exhibition with stands for microelectronics and

electronic vendors.

[Call for Papers] SISPAD2014

https://sites.google.com/site/sispad2014/

This is a call for papers for the 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD2014), to be held September 9-11, 2014, in Yokohama, Japan. This conference provides an opportunity for the presentation and discussion of the latest advances in modeling and simulation of semiconductor devices, processes, and equipment for integrated circuits.

Abstract submission deadline is March 31, 2014.

Workshops:
Two companion workshops will run concurrently prior to the start of the conference on Monday 8th September 2014:

• Workshop 1: Compact Modeling -Enabling Better Insight of Device Features-
  Organizer: Mitiko Miura-Mattausch (Hiroshima University)
• Workshop 2: Carrier Transport in Nano-MOS Transistors: Theory and Experiments(tentative)
  Organizer: Hideaki Tsuchiya (Kobe University) and Yoshinari Kamakura (Osaka University)

Plenary Speakers:

• Augusto Benvenuti (Micron Technology)
  Current status and future prospects of non-volatile memory modeling
• Massimo V. Fischetti (University of Texas at Dallas)
  Physics of electronic transport in low-dimensionality materials forfuture FETs
• Kimimori Hamada (Toyota Motor Corporation)
  TCAD challenge on development of power semiconductor devices for automotive applications

Invited Speakers:

• Mario Ancona (Naval Research Laboratory)
  Nonlinear thermoelectroelastic simulation of III-N devices
• Asen Asenov (University of Glasgow)
  Progress in the simulation of time dependent statistical variability in nano CMOS transistors
• Jean-Pierre Colinge (Taiwan Semiconductor Manufacturing Company)
  Nanowire transistors: pushing Moore's law to the limit
• Tibor Grasser (Vienna University of Technology)
  Advanced modeling of charge trapping: RTN, 1/f noise, SILC, and BTI
• Kohji Mitsubayashi (Tokyo Medical and Dental University)
  Novel biosensing devices for medical applications
• Christian Sandow (Infineon Technologies)
  Exploring the limits of the safe operation area of power semiconductor devices
• Mark Stettler (Intel Corporation)
  Device and process modeling: 20 years at Intel's other fab

SISPAD 2014 1st Call for Papers

2014 International Conference on Simulation of Semiconductor Processes and Devices

September 9-11, 2014

Workshop, September 8

Mielparque Yokohama, Yokohama, Japan

The call for papers is also available on SISPAD2014 Web site. Deadline for submission of SISPAD abstracts: March 31, 2014


Any inquiries on submission should be sent to:

• Steering Chair:  Shinji Odanaka  (Osaka Univ)
• Conference Chair:  Nobuya Mori  (Osaka Univ)
• Program Chair:  Kenichiro Sonoda  (Renesas)
• Program Co-Chair:  Shigeyasu Uno  (Ritsumeikan Univ)

[read more...]

MIEL2014 Abstracts Deadline Extension

IEEE 29th International Conference on Microelectronics (MIEL 2014) is to be held on 11-14 May 2014 at the Serbian Academy of Science and Arts, Belgrade, Serbia. The extended submission deadline for 2-page extended abstracts of regular contributions had been set to 26th, but, due to many requests by authors, we will continue receiving the submissions by October 31st 2013.

More detailed information on MIEL 2014 can be found in the attached Call for Papers, as well as on the conference web site http://miel.elfak.ni.ac.rs/. We will be looking forward to receiving your submission and seeing you at our conference next year in May.

[read more...]

SISPAD Abstract Submission

2014 International Conference on Simulation of Semiconductor Processes and Devices

September 9 – 11, 2014

Workshop, September 8

Mielparque Yokohama, Yokohama, Japan

Deadline for submission of SISPAD abstract: March 1, 2014

Any inquiries on submission should be sent to:

• Program Chair:  Ken’ichiro Sonoda (Renesas)
• Program Co-Chair:  Shigeyasu Uno (Ritsumeikan Univ)

[read more...]

NANO 2013

Symposium on Nanostructured Materials to be held May 21-22, 2013 at the University of Rzeszow, Poland. The Symposium will be a major event during the grand opening of the Center for Microelectronics and Nanotechnology. This conference is devoted to the current trends in research on layer-structured materials and one-dimensional nanomaterials. Emphasis will be placed on the state-of-the-art metrology for detecting defects and impurities using modern TEM, SIMS, and Nano-Raman methods etc. Specific areas of interest include:

• MBE technology, 
• nanopatterning, 
• nanolithography, 
• photolithography and electron lithography for the production of integrated circuits, 
• magneto-transport at low temperatures, 
• optical properties of nanostructures, 
• interaction between academic and industrial research
  (instrument manufacture, IC and optoelectronics industry, and materials suppliers).

[read more...]