[paper] Bridging the gap between design and simulation of low voltage CMOS circuits

C. M. Adornes, D. G. Alves Neto, M. C. Schneider and C. Galup-Montoro

Bridging the gap between design and simulation of low voltage CMOS circuits

2021 IEEE Nordic Circuits and Systems Conference (NorCAS), 2021, pp. 1-5,

DOI: 10.1109/NorCAS53631.2021.9599867

Abstract: This work proposes a simplified MOSFET model based on the Advanced Compact MOSFET (ACM) model, which contains only four parameters to assist the designer in understanding how the main MOSFET parameters affect the design. The 4-parameter model was implemented in Verilog-A to simulate different circuits designed with the ACM model. A CMOS inverter and a ring oscillator were designed and simulated, either using the 4-parameter ACM model or the BSIM model. The simulation results demonstrate that the 4-parameter model is very suitable for ultra-low-voltage (ULV) modeling. In the ultra-low-voltage domain, some of the secondary effects of the MOSFET are not relevant and thus not included in the 4-parameter model. A simplified MOSFET model for the ULV domain is of great importance to applications such as energy harvesting, sensor nodes for the Internet of Things, and always-on circuits.

C. M. Adornes Video Presentation NorCAS 2021

Acknowledgment: The authors would like to thank the Brazilian agencies CAPES, finance code 001, and CNPq for supporting this work.

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[paper] Systematic approach for IG-FinFET amplifier design using gm/Id method

Alireza Hassanzadeh and Sajad Hadidi

Systematic approach for IG-FinFET amplifier design using gm/Id method

Analog Integrated Circuits and Signal Processing (2021)

https://doi.org/10.1007/s10470-021-01917-9

EE Department, Shahid Beheshti University, Tehran, Iran

Abstract: In this paper, a systematic approach has been used to apply gm/Id method for the design of Independent Gate (IG) FinFET amplifiers. The design of high-performance amplifiers using gm/Id method has been successfully applied to nanometer devices. IG-FinFETs have been widely used in digital circuit implementations. However, the application of IG-FinFETs in analog circuits is limited and brings many advantages including low power, low voltage operation of transistors. Independent gates of FinFET can receive different voltages that facilitate low voltage operation of the circuit. Simulation-based gm/Id method has been applied to IG-FinFET transistors and a systematic methodology has been developed for the design of IG-FinFET amplifiers. The Berkeley BSIM-IMG 55 nm technology parameters have been used for HSPICE simulations. The designed amplifier has a DC gain of about 45 dB while consuming 6.5 µW from a single 1 V power supply.

Fig: gm/Id vs. normalized Id(Vbg)