Showing posts with label Independent gate. Show all posts
Showing posts with label Independent gate. Show all posts

Aug 10, 2021

[paper] Systematic approach for IG-FinFET amplifier design using gm/Id method

Alireza Hassanzadeh and Sajad Hadidi
Systematic approach for IG-FinFET amplifier design using gm/Id method
Analog Integrated Circuits and Signal Processing (2021)
https://doi.org/10.1007/s10470-021-01917-9

EE Department, Shahid Beheshti University, Tehran, Iran

Abstract: In this paper, a systematic approach has been used to apply gm/Id method for the design of Independent Gate (IG) FinFET amplifiers. The design of high-performance amplifiers using gm/Id method has been successfully applied to nanometer devices. IG-FinFETs have been widely used in digital circuit implementations. However, the application of IG-FinFETs in analog circuits is limited and brings many advantages including low power, low voltage operation of transistors. Independent gates of FinFET can receive different voltages that facilitate low voltage operation of the circuit. Simulation-based gm/Id method has been applied to IG-FinFET transistors and a systematic methodology has been developed for the design of IG-FinFET amplifiers. The Berkeley BSIM-IMG 55 nm technology parameters have been used for HSPICE simulations. The designed amplifier has a DC gain of about 45 dB while consuming 6.5 µW from a single 1 V power supply.

Figgm/Id vs. normalized Id(Vbg)