Video Tutorial: What is Verilog-A

Video Tutorial: What is Verilog-A

Verilog-A is a behavioural modelling language for analog circuits from the Verilog Family. It is the subset of Verilog-AMS. Verilog-A HDL is derived from the IEEE 1364 Verilog HDL specification. The intent of Verilog-A HDL is to let designers of analog systems and integrated circuits create and use modules that encapsulate high-level behavioural descriptions as well as structural descriptions of systems and components.

Reference: 

[1] OVI Verilog-A LRM , 1996

[2] https://literature.cdn.keysight.com/litweb/pdf/ads2004a/pdf/verilogaref.pdf

[3] A New Approach to Compact Semiconductor device Modelling with Qucs Verilog-A analog module synthesis, M.E Brinson & V Kuznetsov, International Journal of Numnerical Mdelling, 2015

[4] https://github.com/cogenda/VA-BSIM48/blob/master/bsim4_release.va

[PhD Thesis] III-V MOS-HEMTs for 100-340GHz Communications Systems

UNIVERSITY OF CALIFORNIA

Santa Barbara

III-V In_xGa_1-xAs / InP MOS-HEMTs for 100-340GHz Communications Systems

A dissertation for PhD degree in Electrical and Computer Engineering

by Brian David Markman

Abstract: This work summarizes the efforts made to extend the current gain cutoff frequency of InP based FET technologies beyond 1THz. Incorporation of a metal-oxide-semiconductor field effect transistor (MOSFET) at the intrinsic Gate Insulator-Channel interface of a standard high electron mobility transistor (HEMT) has enabled increased g_m,i by increasing the gate insulator capacitance density for a given gate current leakage density. Reduction of RS,TLM from 110 Ω.μm to 75Ω.μm and Ron(0) from 160Ω.μm to 120Ω.μm was achieved by removing/thinning the wide bandgap modulation doped link regions beneath the highly doped contact layers. Process repeatability was improved by developing a gate metal first process and D_it was improved by inclusion of a post-metal H₂ anneal. In_xGa_1-xAs / InAs composite quantum wells clad with both InP and In_xAl_1-xAs were developed for high charge density and low sheet resistance to minimize source resistance. 

Figure a) InP-based HEMT b) III-V DC optimized MOSFET c) proposed InP-based MOS-HEMT

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[Citation] Markman, B. D. (2020). III-V In_xGa_1-xAs / InP MOS-HEMTs for 100-340GHz Communications Systems. UC Santa Barbara. ProQuest ID: Markman_ucsb_0035D_14853. Merritt ID: ark:/13030/m5v4681j. Retrieved from https://escholarship.org/uc/item/6st812pb

#Congratulations to Dr. Arokia Nathan J.J. Ebers Award winner

#Congratulations to 2020 #IEEE #ElectronDevicesSociety J.J. Ebers Award winner, Dr. Arokia Nathan @IEEEorg @IEEEAwards @Cambridge_Uni #semi https://t.co/zQ5YIDm3wl

— Wladek Grabinski (@wladek60) October 29, 2020

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from Twitter https://twitter.com/wladek60

October 29, 2020 at 08:49AM
via IFTTT

Fwd: Patrick Fay DL - III-N Nanowire FETs for Low-Power Applications

Patrick Fay DL - III-N Nanowire FETs for Low-Power Application

The EDS Germany Chapter and NanoP proudly presents Patrick Fay from University of Notre Dame, Indiana, USA
for a Distinguished Lecture on "III-N Nanowire FETs for Low-Power Applications". The lecture will be held on
23th November 2020 at 3pm Berlin time.  To view complete details for this event, click here to view the announcement

Date and Time

• Date: 23 Nov 2020
• Time: 03:00 PM to 04:00 PM
• All times are Europe/Berlin
• Add Event to Calendar
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Location

The Distiguished Lecture will be held via Zoom. Login information provided before the event and requires registration.

• Virtual
• Germany

Hosts

• Germany Section Chapter, ED15
• Co-sponsored by NanoP, Technische Hochschule Mittelhessen - University of Applied Sciences

Registration <https://events.vtools.ieee.org/m/245747>

• Starts 29 October 2020 08:00 AM
• Ends 21 November 2020 12:00 AM
• All times are Europe/Berlin
• No Admission Charge
  

EDTM 2021, Chengdu (CN): March 9-12, 2021

EDTM Conference 2021, Chengdu, China, between March 9th to 12th, 2021

Paper Submission Deadline: November 7 2020

	The IEEE Electron Devices Technology and Manufacturing (EDTM) Conference 2021 is a four-day meeting to be held in Chengdu, China, during March 9th to 12th, 2021. Sponsored by IEEE Electron Devices Society (EDS), EDTM2021 is a premier conference, providing a unique forum for discussions on a broad range of device/manufacturing-related topics. EDTM2021 starts on Tuesday, March 9, 2021 with Tutorial & Short Courses, followed by three days of Plenary talks and parallel Oral sessions. Joint Poster sessions and Exhibition will be held on the same site. EDTM2021 Theme: Intelligent Technologies for Smart and Connected Life. ▪ Technical Areas EDTM2021 solicits papers in all areas of electron devices, including materials, processes, devices, packaging, modeling, reliability, manufacturing and yield, tools, testing, and any emerging device technologies. EDTM2021 cordially invites authors to submit your papers. Please refer to the EDTM2021 website for more details, or clink links below: EDTM2021 website: https://ewh.ieee.org/conf/edtm/2021/ Call for Papers ▪ Sponsorship & Exhibition EDTM2021 also warmly invites sponsors and exhibitors to participate in and support the conference where you can showcase your new technologies and products to attendees from around the world. Call for Sponsorship Call for Exhibitors ▪ Awards EDTM2021 will select Best Paper Award, Best Student Paper Award and Best Poster Paper Award. ▪ Publications All selected and presented papers will be included in the EDTM2021 Proceedings that will be published at the IEEE Xplore. Selected papers will be invited to submit the extended manuscripts that will be reviewed for possible publication in the IEEE Journals of Electron Devices Society (J-EDS), which is an Open Access journal. ▪ Important Dates Paper Submission Starts August 1, 2020 Paper Submission Deadline November 7 2020   Notification of Acceptance December 20, 2020 EDTM2021 Conference March 9 - 12, 2021 ▪ Location Chengdu, located in southwest of China, is not just the home for Grand Pandas. An emerging technology and business hub full of hi-tech companies from around the world, it is also a trendy city where you will find everything that you could imagine for you to enjoy your leisure time, from the famous Sichuan food to mind-soothing teas to natural scenics to historical wonders. The wonderful city is just an easy flight away from many places around the Globe. ▪ Contacts General Chair: Albert Wang, University of California, Riverside, aw@ece.ucr.edu General Co-Chair: Tianchun Ye, IME-CAS, tcye@ime.ac.cn TPC Chair: Huaqiang Wu, Tsinghua University, wuhq@tsinghua.edu.cn TPC Co-Chair: Subramanian Iyer, University of California, Los Angeles, s.s.iyer@ucla.edu COVID-19 Watch: Chengdu remains safe. EDTM2021 is planned as an in-person/on-site event. Meanwhile, we are closely monitoring the development of global COVID-19 outbreak. A contingency plan will allow virtual presentations and participation for those with travel restrictions and concerns. Both safety and participation experiences will be ensured for EDTM2021. EDTM2021 website: https://ewh.ieee.org/conf/edtm/2021/