The 20nm Moore's Law Challenge - FinFET versus SOI technology... with John Chen, Nvidia

From Electronics weSRCH:

http://electronics.wesrch.com/weqEL1UYOB

Some say Moore's Law for semiconductors has stopped. But the world of 20nm technology is coming fast.  My guest, John Chen, Vice President, Wafer Foundry Group and Global Operations of Nvidia, was here to talk about it. He talks about the strengths and weaknesses of FinFET and SOI, including the power benefits and the design challenges.  Then we examine the question of Moore's Law slowing, followed up with the need for greater collaboration between fabless and foundry in a way that looks like a Virtual IDM.

The interview is in the original link, and it's quite interesting...

[mos-ak] [Final Program] 5th International MOS-AK/GSA Workshop in San Francisco, Dec. 12, 2012

Together with the Organizing Committee and Extended MOS-AK/GSA TPC Committee and the MOS-AK prime sponsors Agilent Technologies and Mentor Graphics, we have pleasure to invite to the 5th International MOS-AK/GSA Workshop in San Francisco, Dec. 12, 2012 http://www.mos-ak.org/sanfrancisco_2012/ The event will be organized in timeframe of the IEDM and CMC meetings.

Venue:

swissnex San Francisco

730 Montgomery Street

San Francisco, CA 94111, USA

Final Workshop Program <http://www.mos-ak.org/sanfrancisco_2012/>

Workshop Agenda:

• MOS-AK/GSA Workshop - Dec. 12, 2012 (9:00am - 5:00pm)
  
• 9:00am - 12:00 Morning Session
• 1:00pm - 4:00pm Afternoon Session
  
• 4:00pm - 5:00pm Panel: Status and Future of Verilog-A Compact Modeling Standardization
• Moderator: Larry Nagel
• 5:00pm End of the MOS-AK/GSA workshop

-- Extended MOS-AK/GSA Committee

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Workshop on Advanced Materials and Devices

The Workshop on Advanced Materials and Devices will be held on March 13 to 15, 2013, at the University of Havana, Cuba. This meeting is a continuation of the“Workshop Espana-Mexico-Brazil”, first organized on March 16 to 18 2011 at CINVESTAV, Mexico. As in its previous issue, the main objective of the Workshop is to discuss the results of research projects done by collaborating groups, as well as to plan future activities of interest to the participants.

The workshop will count with the participation of researchers from different universities of Spain, Mexico, Brazil and Cuba.

As a more general objective, the meeting is interested in including new colleagues from other places. R9 EDS Chapters committee is also interested in promoting Latin American EDS members to join to these activities.

The extended abstracts will be published and distributed at the Workshop.

Please link to the corresponding entry on this page, to download the format for preparing the abstract.

The deadline for abstract presentation is December 24, 2012.

Abstracts should be sent to mestrada@cinvestav.mx

Recommended hotels are Hotel Nacional and Hotel Habana Libre

Special prices for the activity will be posted son.

Other important information will be incorporated to the page as the activity approaches.

Organizing committee:

Rodrigo Picos Universitat del Illes Balears, Spain

Benjamin Iniguez Universitat Rovira I virgili, Spain

Magali Estrada CINVESTAV-IPN, Mexico

Maria Sanchez Universidad de la Habana

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[mos-ak] [2nd announcement] 5th International MOS-AK/GSA Workshop in San Francisco, Dec. 12, 2012

Together with the Organizing Committee and Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the 5th International MOS-AK/GSA Workshop in San Francisco, Dec. 12, 2012 http://www.mos-ak.org/sanfrancisco_2012/ The event will be organized in timeframe of the IEDM and CMC meetings.

Venue:

swissnex San Francisco

730 Montgomery Street

San Francisco, CA 94111, USA

Important Dates:

• Call for Papers - Oct. 2012
  
• on-line abstract submission: <http://www.mos-ak.org/sanfrancisco_2012/abstracts.php>
• Submission deadline - Nov. 15, 2012
  
• Final Workshop Program - Nov. 30 2012
  
• free on-line registration: <http://www.mos-ak.org/sanfrancisco_2012/registration.php>
• MOS-AK/GSA Workshop - Dec. 12, 2012
  

R&D Topics to be covered include the following:

• Advances in semiconductor technologies and processing
  
• Compact Modeling (CM) of the electron devices
  
• Verilog-A language for CM standardization
  
• New CM techniques and extraction software
  
• CM of passive, active, sensors and actuators
  
• Emerging Devices, CMOS and SOI-based memory cells
  
• Microwave, RF device modeling, high voltage device modeling
  
• Nanoscale CMOS devices and circuits
  
• Technology R&D, DFY, DFT and IC Designs
  
• Foundry/Fabless Interface Strategies
  

-- Extended MOS-AK/GSA Committee

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[mos-ak] [Call for Papers] 10th International Workshop on Compact Modeling

10th International Workshop on Compact Modeling (IWCM 2013)

January 22 (Tuesday), 2013; Pacifico Yokohama, Yokohama, Japan

Scope:

The workshop provides an opportunity for the discussion and the presentation of advances in modeling and simulation of nano-scale devices and circuits.

Topics:

• Compact modeling for all kinds of devices
  
• Parameter extraction methodology and strategy
  
• Circuit simulation techniques and methods
  

Abstract Submission:

Authors are requested to prepare a camera-ready abstract with a minimum 2 and maximum 8 pages including figures for  publication in the workshop proceedings. The electronic file of the paper should be submitted in PDF or MS-Word format to hjm@hiroshima-u.ac.jp.  IWCM 2013 is held co-located with ASP-DAC 2013 and paper templates in LaTex and Word formats are downloadable from the ASP-DAC 2013 website. Deadline for abstract submission is November 30th, 2012.

Organization Committee:

Chair: H. J. Mattausch (Hiroshima University, Japan)

Co-Chair: M. Chan (Hong Kong University of Science & Technology, H.K.)

Committee Members: 

Y. Cao (Arizona State University, USA)

W. Grabinski (EPFL, Switzerland)

J. He (Peking University, China)

J. J. Liou (University of Central Florida, USA)

T. Nakagawa (AIST, Japan)

D. Navarro (Silvaco, Japan)

M. Miura-Mattausch (Hiroshima University, Japan)

Y. J. Park (Seoul National University, Korea)

Z. Yu (Tsinghua University, China)

Contact:

If you have any question, please contact hjm@hiroshima-u.ac.jp.

Registration is free, but Yen 2000 are requested for the proceedings.

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QucsStudio 1.4.2

A new version of QucsStudio has just been released for general use. The latest version is mainly  bug fixes but does contain a number of new/improved features. A list of the changes are given below:

• some corrections in help system
• component names in noise contribution analysis with subcircuit prefix
• reduced time step warnings in transient analysis
• bugfix: differential voltages in equations
• in equations: allow suffix in node names
• bugfix: directory MinGW\mingw32\bin\ exists again
• bugfix: crash in diagram dialog if clicking on empty variable area
• new component: photodiode
• new equation function: stoa()
• bugfix: spaces allowed between function name and "("
• added InP permittivity in property list
• bugfix: correct text in C++ symbol string
• error message for wrong index in equation variables

This is likely to be one of the last releases in the QucsStudio 1.4 series.  Work has started on QucsStudio series 2.0.0.  QucsStudio 2.0.0 is expected to offer users significant improvements in simulation and modelling capabilities.  The first of the new releases will coincide with the tenth anniversary of the first release of Qucs next year.

QucsStudio can be downloaded from the QucsStudio homepage at http://www.mydarc.de/DD6UM/QucsStudio/qucsstudio.html

Contact: Mike Brinson