Oct 8, 2025

[mos-ak] [Special Issue] 7th International Sino MOS-AK Workshop


Special Issue on the 7th International Sino MOS-AK Workshop
Jun Zhang, Wladek Grabinski, Yuehang Xu (editors)
Int JNM, 38: e70114.
First published: 07 September 2025
1. College of Integrated Circuit Science and Engineering, Nanjing University, Jiangsu (CN)
2. MOS-AK and GMC Consulting (CH)
3. School of Electronic Science and Engineering, Uni. Chengdu, Sichuan (CN)

As device structures become increasingly complex, with the continuous emergence of novel materials, unconventional architectures, and new physical phenomena, the coupling of multiple physical domains, including thermal, electrical, and optical effects, is becoming ever more prevalent. At the same time, rising development and manufacturing costs place additional demands on modelers to deliver representations that are both accurate and computationally efficient across the entire chain from device physics to circuit behavior. Modeling serves two complementary purposes: Theoretical models provide insight into the operating principles of devices, while also guiding design optimization and enabling engineers to fully exploit intertwined physical effects. Analytical modeling, however, often requires careful trade-offs among accuracy, generality, and simplicity. Models must be predictive enough to inform design while offering meaningful physical insight. In modern semiconductor devices, which often feature three-dimensional geometries, solving the coupled semiconductor physics equations analytically is extremely challenging or even impossible. Closed-form solutions are typically unattainable, so judicious simplifications are necessary to ensure that models remain tractable and practically useful.

The papers in this Special Issue address these challenges by balancing physical fidelity with computational efficiency. They deepen our understanding of device physics while providing models that are both insightful and practical, with applications spanning cryogenic electronics, wide-bandgap devices, and radiation-hardened systems.

Su et al. present a charge-based analytical model for bulk MOSFETs, that is, valid down to 10 mK. Their work clarifies the interface-trap-dominated mechanisms that lead to threshold voltage divergence between NMOS and PMOS devices and quantifies significant analog parameter enhancements, including a 73% increase in PMOS cutoff frequency at 4 K. These findings are essential for quantum-control electronics. Complementing this, Mao et al. provide a comprehensive review of four physics-based compact models for GaN HEMTs, namely MVSG, ASM HEMT, EPFL, and QPZD. They analyze how each model addresses challenges such as trapping effects, self-heating, and process variability, and highlight emerging opportunities for combining physical models with machine learning to accelerate parameter extraction and quantify uncertainties. In the area of radiation-tolerant electronics, Xu et al. introduce a machine-learning approach using an ant-colony-optimized neural network. By adaptively sampling critical waveform regions, their method achieves an RMS error of only 0.82% in predicting single-event transient currents, surpassing the fidelity limits of traditional double-exponential pulse models and enabling high-precision radiation effect simulation for aerospace applications. Meanwhile, Deng et al. demonstrate a practical strategy for AI-assisted SPICE integration. They employ geometry-parameterized scaling laws for spiral inductors and machine-augmented Power MOS trans-conductance models to accelerate parameter extraction by an order of magnitude while preserving full SPICE compatibility. This approach significantly streamlines industrial design workflows.

Collectively, these contributions point to a trend toward physics-informed, data-driven co-design methodologies. By combining rigorous physical insight with computationally efficient, machine learning–aware workflows, they enable robust optimization of devices and circuits across a wide range of applications, from quantum interfaces to aerospace systems.

Future research should prioritize the development of standardized interfaces between AI tools and physical models, the extension of models to three-dimensional integrated wide-bandgap architectures, and the establishment of co-design frameworks for emerging ultra wide–bandgap materials capable of operating in environments ranging from near-zero Kelvin to orbital radiation conditions. We sincerely thank all authors for their outstanding contributions, which have advanced the frontier of semiconductor modeling science.

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Oct 5, 2025

[Deadline] extended to Oct.15 2026


10th IEEE Electron Devices Technology and Manufacturing
(EDTM 2026) Conference
https://ieee-edtm.org/
March 1-4, 2026 Penang, Malaysia 

EDTM2026 paper submission date has been extended to 15th October 2025

Submit your papers today in any of the 13 tracks and see you in Penang, Malaysia from 1st - 4th March 2026.




Oct 4, 2025

[workshop] Advances in Semiconductor and Emerging Devices for Chip Design

5-Day Online International Workshop on
Recent Advances in Semiconductor and Emerging Devices for Chip Design
Oct. 6-10, 2025
Organized by the Department of Electronics, Dhanamanjuri University (DMU), Manipur,
in Collaboration with IEEE Silchar Subsection

Upcoming 5-Day International Workshop on “Recent Advances in Semiconductor and Emerging Devices for Chip Design” (6–10 October 2025) organized by Dhanamanjuri University (DMU) Manipur, in collaboration with IEEE Silchar Section. This unique event, led by Dr. Khoirom Johnson Singh, Ph.D. and his dedicated team, brings together global experts from India, Europe, and beyond. Register Online

With speakers covering topics from GaN devices and memristors to cryogenic CMOS, nanosheet FETs, biomedical circuits, and spintronics for novel computing, this workshop will serve as a melting pot of ideas, a platform for young researchers and students to learn, question, and seed new collaborations.






















Education equips young minds with the foundations of knowledge, preparing them to understand technological advancements and their role in shaping society. Yet, in research, knowledge alone is not enough. To truly innovate, we must disseminate our work, engage with peers, and foster collaborations across disciplines and borders. This is where the seeds of research truly take root and grow.

Collaboration is more than sharing data or co-authoring papers. It is about bringing together diverse perspectives, connecting physics with engineering, theory with experimentation, and academia with industry. Interdisciplinary approaches not only accelerate breakthroughs, but also open new directions that no single researcher could achieve alone.





[paper] Is there anything left to do in TCAD?

Z. Stanojevic, F. Schanovsky, G. Rzepa, X. Klemenschits, H. Demel, 
O. Baumgartner, C. Kernstock, and M. Karner
Is there anything left to do in TCAD?
SISPAD  in Grenoble, Sept. 24 2025
https://sispad2025.inviteo.fr/

1. Global TCAD Solutions GmbH., Bosendorferstraße 1/12, 1010 Vienna (A) 

Abstract: Over the past decade, the development of commercial technology computer-aided design (TCAD) software has followed an evolutionary rather than revolutionary path. Alongside established continuum and particle-based approaches in both process and device simulation, advanced carrier transport models - such as deterministic bulk and subband Boltzmann transport equation (BTE) solvers and non-equilibrium Green’s functions (NEGF) - have been incorporated into the TCAD toolkit for single-device simulation. At the system level, the field of design-technology co-optimization (DTCO) has expanded to encompass variability, reliability, and the extension of TCAD methodologies from devices to circuits. However, most of these innovations were introduced over a decade ago, prompting the question: What remains to be developed in TCAD? We address this question by analyzing current limitations and potential future directions in TCAD development across three key dimensions: (1) fidelity, (2) integration, and (3) efficiency - each with particular relevance in commercial and industrial contexts. We examine ongoing challenges in classical TCAD, advanced transport modeling, and DTCO flows, and point to potential directions for future developments. Among these, we include various methodologies related to machine learning and hardware accelerators, particularly within the efficiency dimension.


FIG: Device 3D structure generated from a layout (GDSII) and a technology file

See also...

Oct 3, 2025

[paper] THz MOST based on aligned carbon nanotube arrays

Jianshuo Zhou, Zipeng Pan, Li Ding, Lin Xu, Xiaohan Cheng, Haitao Li, Fenfa Yao, Chuanhong Jin, Maguang Zhu, Lijun Liu, Huiwen Shi, Zhiyong Zhang and Lian-Mao Peng
Terahertz metal–oxide–semiconductor transistors based on aligned carbon nanotube arrays. 
Nat Electron (2025)
DOI: https://doi.org/10.1038/s41928-025-01463-6

1. Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, Peking University
2. Hunan Institute of Advanced Sensing and Information Technology, Xiangtan University, Xiangtan, China
3. Chongqing Institute of Carbon-based Integrated Circuits, Peking University, Chongqing, China
4. Academy for Advanced Interdisciplinary Studies, Peking University, Beijing, China
5. State Key Laboratory of Silicon and Advanced Semiconductor Materials, Zhejiang University, Hangzhou, China
6. Frontiers Science Center for Nano-optoelectronics, Peking University, Beijing, China


Abstract: Films of aligned semiconducting carbon nanotubes could be used to build complementary metal–oxide–semiconductor field-effect transistors for digital integrated circuits and radio-frequency transistors for terahertz analogue integrated circuits. However, the operating frequencies of such devices remains too low for potential application in the sixth generation of wireless communications. Here we report metal–oxide–semiconductor field-effect transistors that are based on aligned carbon nanotube films and have a cut-off frequency beyond 1 THz. By optimizing gate structures and fabrication processes, we create devices with a gate length of 80 nm that have a carrier mobility of over 3,000 cm2 V−1 s−1, as well as an on-state current of 3.02 mA µm−1, a peak transconductance of 1.71 mS μm−1 at a bias of −1 V, and a saturation velocity of 3.5 × 107 cm s−1. By introducing a Y-shaped gate, we also create devices with gate lengths of 35 nm that have an extrinsic cut-off frequency (fT) of up to 551 GHz and a maximum oscillation frequency (fmax) of 1,024 GHz. Finally, we use devices with a gate length of 50 nm to fabricate mmWave-band (30 GHz) radio-frequency amplifiers that have a gain of up to 21.4 dB.

Fig: Characteristics of Y-gate structure in A-CNT MOSFETs.

Acknowledgements: This work is supported by the National Key Research & Development Program (grant number 2022YFB4401603 to L.D.) and Natural Science Foundation of China (grant numbers 62171004 to L.D., 92477201 to L.-M.P. and 62225101 to Z.Z.).