Postdoc in Semiconductor Devices, and circuit design

Postdoc in Semiconductor Devices, and circuit design

Sønderborg, Denmark

We [sdu.dk] are seeking an enthusiastic new colleague as a PostDoc in the field of Semiconductor Devices, and circuit design. As a postdoc in our team, you will have the opportunity to contribute to cutting-edge research and innovation in this rapidly evolving field with a strong collaboration with international industry partners.

The position is located in the section of Electrical Engineering in Sønderborg within the Centre for Industrial Electronics (CIE). The Centre has currently approximately 30 faculty members including senior (full and associate professors), junior (assistant professors and postdocs), PhDs, and support staff. The task portfolio of the PostDocs will be linked to one main project and several smaller projects within CIE. CIE is embedded in a powerhouse in electronics, which includes researchers and developers at universities and industries on both sides of the Danish-German border. CIE is a new initiative striving for high quality and great impact of its research, innovation, and education. Central to achieving this objective is access to state-of-the-art facilities and collaborations with industries. In the semiconductor research group in CIE, we are a member of European projects and already settled our international collaborations with the pioneer industry.

The positions aim to build strong knowledge and competencies within the field of semiconductor devices, especially in the fields of wide band gap semiconductor devices, circuit design, failure mechanisms, and simulations.

Job description

• Conduct research in the field of WBG semiconductors with a focus on GaN and SiC devices.
• Innovate design structures through simulation-based approaches calibrated by experimental data.
• Apply TCAD simulation and design tools, build demonstrators, and verify your simulation by experimental measurements.
• Familiar with the fabrication process to realize devices in the clean room and explore their potential applications.
• Experimental characterization of devices (static and dynamic) to analyze the device behavior.
• Stay updated with the latest advancements in WBG semiconductor devices and contribute to the development of innovative solutions.
• You will be involved in the daily supervision of PhD, Master, and Bachelor students who perform research on similar topics.
• You will publish and present your work both at international conferences and in scientific journals with high impact.

Profile and requirements 

• Ph.D. in Electrical Engineering, Semiconductor Physics, or a related field.
• Strong background in theory and simulation of WBG semiconductor devices, device modeling, and circuit design.
• Hands-on experience in fabrication processes such as lithography, Mask design, etching, and deposition appreciated.
• Background in characterization techniques, failure mechanisms, and reliability tests.
• Ability to work independently as well as collaboratively in a research team.
• Strong communication skills to effectively present research findings and contribute to scientific discussions.
• Ability to publish in high-impact conferences and journals.

Starting date: March 2024.
Type of contract: Full-time
Employment: 2-year position

Further information is available from 

Professor Thomas Ebel, Head of CIE, phone: +45 93 50 72 05 

Associate Professor Samaneh Sharbati, phone: +45 65 50 82 60

Conditions of employment
Employment as a postdoc requires scientific qualifications at PhD level. Employment as a postdoc is temporary and will cease without further notice at the end of the period. The successful applicant will be employed in accordance with the agreement between the Ministry of Finance and the Danish Confederation of Professional Associations

The assessment process
Read about the Assessment and selection process. Shortlisting may be used.

Application procedure

• The application must be in English and must include:Motivated application
• Detailed Curriculum Vitae
• Certificates/Diplomas (MSc and PhD)
• List of publications, indicating the publications attached
• Examples of the most relevant publications. Please attach one pdf-file for each publication
• Reference letters and other relevant qualifications may also be included.

Formalities
Documents should not contain a CPR number (civil registration number) – in this case, the CPR number must be crossed out. The application and CV must not exceed 10 MB. If you experience technical problems, you must contact hcm-support@sdu.dk.

The application deadline is 20. February 2024 at 23.59.

Further information for international applicants about entering and working in Denmark.

Further information about The Faculty of Engineering.

The University of Southern Denmark wishes to reflect the surrounding community and therefore encourages everyone, regardless of personal background, to apply for the position.

Open PhD Position at THM

Open PhD Position

Compact Modeling of Reconfigurable Transistors

(full-time)

Payment depending on qualification up to salary group 13 TV-H

(approx. 60k€ … 65k€ per year)

The position in Prof. Dr. Alexander Kloes' Research Group Nanoelectronics/Device Modeling at Technische Hochschule Mittelhessen (THM), University of Applied Sciences, Campus Giessen, is expected to be filled from May 2024 for a duration of 3 years. It is intended to enable the successful candidate to obtain a doctorate degree in a cooperative doctorate procedure between the THM University of Applied Sciences and the Universitat Rovira i Virgili (URV, Spain).

The project in the research field of microelectronics aims at compact modelling of reconfigurable MOS transistors. The goal of the project is the development of a DC/AC Verilog-A compact model for standard design tools to be used for new circuit design concepts in the field of hardware security. Starting point is a physics-based analytical compact current model for Schottky Barrier Transistors which has already been published by the research group at THM. The task is part of a joint project with academic and industrial partners in areas from device technology to logic synthesis. Beside TCAD simulations, for verification by measurements, the project is in close collaboration with a global company for the fabrication of test structures.

Your Tasks:

• Research in the field of microelectronics and physics of semiconductor devices
• PhD project on the development of a compact model for reconfigurable MOSFETs
• Implementation in standard design tools in close collaboration with partners
• Participation in teaching and general tasks of the group is expected

Requirements for the position:

• Master’s comparable degree in Electrical Engineering or Physics
• Excellent theoretical knowledge and practical expertise in the field of solid-state electronics and physics
• Good knowledge in mathematics
• Good programming skills
• Good English language skills are necessary, basic German language skills are desirable

We offer:

• A stimulating and interdisciplinary research environment with very good infrastructure
• Flexible working hours
• Offers for the compatibility of family and career
• Attractive advanced training opportunities
• Free use of public transport within the scope of Hessian state

For further information, please contact Prof. Alexander Kloes

Details of the research group can be found at http://go.thm.de/dmrg.

[paper] Modeling a 2D Electrostatic Potential in MOS Devices

Francois Lim, Benjamin Iñiguez, Alexander Kloes

A new analytical method for modeling a 2D electrostatic potential in MOS devices, 

applicable to compact modeling

J. Appl. Phys. 28 January 2024; 135 (4): 044501

DOI: 10.1063/5.0188863

Abstract: This paper presents a new conformal mapping method to solve 2D Laplace and Poisson equations in MOS devices. More specifically, it consists of an analytical solution of the 2D Laplace equation in a rectangular domain with Dirichlet boundary conditions, with arbitrary values on the boundaries. The advantages of the new method are that all four edges of the rectangle are taken into account and the solution consists of closed-form analytical expressions, which make it fast and suitable for compact modeling. The new model was validated against other similar methods. It was found that the new model is much faster, easier to implement, and avoids many numerical issues, especially near the boundaries, at the cost of a very small loss in accuracy.

FIG: (a) The calculated 2D potential from the closed-form analytic model,
for a Double Gate MOSFET with tsc=12nm, tox=1.6nm, and L=25nm.
(b) Corresponding equipotentials. 

Acknowledgments: This work was funded by the Spanish Ministry of Science through Contract No. PRX21/00726.

[C4P] NEWCAS 2024

The 22nd IEEE International NEWCAS Conference

Sherbrooke, Quebec, Canada

June 16-19, 2024.

The NEWCAS Conference will reflect the wide spectrum of topics, research and practice in the field of circuits and systems and offer an international forum for exchanging ideas and results. There will also be tutorials, special sessions and keynote talks by prominent experts on current topics in microsystems research.

The NEWCAS Topics Include, but Are Not Limited to:

 

Analog/mixed-signal circuits Biomedical circuits and systems Digital circuits and systems Communications circuits and systems RF & microwave circuits Photonic integrated circuits CAD and design tools Test and verification Energy harvesting and power management Low-power low-voltage Microsystems and embedded systems Circuits and systems for AI algorithms

Neural networks and neuromorphic circuits Sensory circuits and systems Imaging and image sensors Emerging technologies and technology trends Microsystems and embedded systems Circuits and systems for AI algorithms Neural networks and neuromorphic circuits Sensory circuits and systems Imaging and image sensors Emerging technologies and technology trends Quantum computing

AUTHORS SCHEDULE

• DEADLINE for full paper submission: February 1, 2024
• DEADLINE for tutorial and special sessions proposals: February 1, 2024
• NOTIFICATION of acceptance: April 4, 2024
• SUBMISSION DEADLINE of Final manuscript: May 1, 2024

For detailed information on proposal and paper submission procedure, please refer to the conference website: newcas2024.org

[C4P] RISC-V Summit Europe

https://riscv-europe.org/summit/2024/

The RISC-V Summit Europe is the premier event that connects the European movers and shakers - from industry, government, research, academia and ecosystem support - that are building the future of innovation on RISC-V.

RISC-V, the open standard instruction set architecture (ISA), is enabling a range of new applications and research that will define the future of computing in Europe. The region has been central to RISC-V’s success, with one-third of RISC-V’s global community based in Europe. 

RISC-V Summit Europe takes place from Monday 24th to Friday 28th June, 2024. The combination of strong industrial and academic communities is key to the success of RISC-V in Europe, and for this reason the conference is designed to help attendees to explore both commercial and research applications.

Present your work

Presentations on inspirational ideas and technical progress are invited to present 

at RISC-V Summit Europe.

RISC-V Summit Europe brings together developers, architects, technical decision and policy makers from across the European RISC-V ecosystem. Attendees from academia, research, SMEs, industry, and open source communities will come together to exchange knowledge, ideas, technologies, and research, shaping the future of RISC-V computing in Europe.

Taking place from June 24-28, 2024, the event will have a single track of keynotes, invited and selected talks, alongside an exhibition showcasing the latest developments across industry and research, including technology demonstrations and poster sessions. Submissions are invited either for:

🚀  Industry Sessions Exciting large-scale research efforts, announcement and success-stories.

👩‍🔬  R&D Sessions Leading edge academic and industry research & development insights.

Important dates

• Abstract submission deadline: March 15th, 2024, AoE (Anywhere on Earth).
• Author notification: April 29th, 2024.
• Final abstract PDF and slides deadline: May 31st, 2024 AoE.
• Poster PDF deadline: June 14, 2024 AoE.
• RISC-V Summit Europe: June 24-28, 2024, Munich.

The Steering Committee aims to provide a limited budget for stipends. More information will be available on the conference website before the submission deadline.