Jan 29, 2024

Open PhD Position at THM

Open PhD Position
Compact Modeling of Reconfigurable Transistors
(full-time)
Payment depending on qualification up to salary group 13 TV-H
(approx. 60k€ … 65k€ per year)

The position in Prof. Dr. Alexander Kloes' Research Group Nanoelectronics/Device Modeling at Technische Hochschule Mittelhessen (THM), University of Applied Sciences, Campus Giessen, is expected to be filled from May 2024 for a duration of 3 years. It is intended to enable the successful candidate to obtain a doctorate degree in a cooperative doctorate procedure between the THM University of Applied Sciences and the Universitat Rovira i Virgili (URV, Spain).
The project in the research field of microelectronics aims at compact modelling of reconfigurable MOS transistors. The goal of the project is the development of a DC/AC Verilog-A compact model for standard design tools to be used for new circuit design concepts in the field of hardware security. Starting point is a physics-based analytical compact current model for Schottky Barrier Transistors which has already been published by the research group at THM. The task is part of a joint project with academic and industrial partners in areas from device technology to logic synthesis. Beside TCAD simulations, for verification by measurements, the project is in close collaboration with a global company for the fabrication of test structures.

Your Tasks:
  • Research in the field of microelectronics and physics of semiconductor devices
  • PhD project on the development of a compact model for reconfigurable MOSFETs
  • Implementation in standard design tools in close collaboration with partners
  • Participation in teaching and general tasks of the group is expected
Requirements for the position:
  • Master’s comparable degree in Electrical Engineering or Physics
  • Excellent theoretical knowledge and practical expertise in the field of solid-state electronics and physics
  • Good knowledge in mathematics
  • Good programming skills
  • Good English language skills are necessary, basic German language skills are desirable
We offer:
  • A stimulating and interdisciplinary research environment with very good infrastructure
  • Flexible working hours
  • Offers for the compatibility of family and career
  • Attractive advanced training opportunities
  • Free use of public transport within the scope of Hessian state

For further information, please contact Prof. Alexander Kloes

Details of the research group can be found at http://go.thm.de/dmrg.

Jan 28, 2024

[paper] Modeling a 2D Electrostatic Potential in MOS Devices

Francois Lim, Benjamin Iñiguez, Alexander Kloes
A new analytical method for modeling a 2D electrostatic potential in MOS devices, 
applicable to compact modeling
J. Appl. Phys. 28 January 2024; 135 (4): 044501
DOI: 10.1063/5.0188863

Abstract: This paper presents a new conformal mapping method to solve 2D Laplace and Poisson equations in MOS devices. More specifically, it consists of an analytical solution of the 2D Laplace equation in a rectangular domain with Dirichlet boundary conditions, with arbitrary values on the boundaries. The advantages of the new method are that all four edges of the rectangle are taken into account and the solution consists of closed-form analytical expressions, which make it fast and suitable for compact modeling. The new model was validated against other similar methods. It was found that the new model is much faster, easier to implement, and avoids many numerical issues, especially near the boundaries, at the cost of a very small loss in accuracy.

FIG: (a) The calculated 2D potential from the closed-form analytic model,
for a Double Gate MOSFET with tsc=12nm, tox=1.6nm, and L=25nm.
(b) Corresponding equipotentials. 

Acknowledgments: This work was funded by the Spanish Ministry of Science through Contract No. PRX21/00726.





[C4P] NEWCAS 2024

The 22nd IEEE International NEWCAS Conference
Sherbrooke, Quebec, Canada
June 16-19, 2024.


The NEWCAS Conference will reflect the wide spectrum of topics, research and practice in the field of circuits and systems and offer an international forum for exchanging ideas and results. There will also be tutorials, special sessions and keynote talks by prominent experts on current topics in microsystems research.

The NEWCAS Topics Include, but Are Not Limited to:
 
Analog/mixed-signal circuits
Biomedical circuits and systems
Digital circuits and systems
Communications circuits and systems
RF & microwave circuits
Photonic integrated circuits
CAD and design tools
Test and verification
Energy harvesting and power management
Low-power low-voltage
Microsystems and embedded systems
Circuits and systems for AI algorithms
Neural networks and neuromorphic circuits
Sensory circuits and systems
Imaging and image sensors
Emerging technologies and technology trends
Microsystems and embedded systems
Circuits and systems for AI algorithms
Neural networks and neuromorphic circuits
Sensory circuits and systems
Imaging and image sensors
Emerging technologies and technology trends
Quantum computing



AUTHORS SCHEDULE
  • DEADLINE for full paper submission: February 1, 2024
  • DEADLINE for tutorial and special sessions proposals: February 1, 2024
  • NOTIFICATION of acceptance: April 4, 2024
  • SUBMISSION DEADLINE of Final manuscript: May 1, 2024
For detailed information on proposal and paper submission procedure, please refer to the conference website: newcas2024.org

Jan 24, 2024

[C4P] RISC-V Summit Europe



The RISC-V Summit Europe is the premier event that connects the European movers and shakers - from industry, government, research, academia and ecosystem support - that are building the future of innovation on RISC-V.
RISC-V, the open standard instruction set architecture (ISA), is enabling a range of new applications and research that will define the future of computing in Europe. The region has been central to RISC-V’s success, with one-third of RISC-V’s global community based in Europe. 
RISC-V Summit Europe takes place from Monday 24th to Friday 28th June, 2024. The combination of strong industrial and academic communities is key to the success of RISC-V in Europe, and for this reason the conference is designed to help attendees to explore both commercial and research applications.

Present your work
Presentations on inspirational ideas and technical progress are invited to present 
at RISC-V Summit Europe.

RISC-V Summit Europe brings together developers, architects, technical decision and policy makers from across the European RISC-V ecosystem. Attendees from academia, research, SMEs, industry, and open source communities will come together to exchange knowledge, ideas, technologies, and research, shaping the future of RISC-V computing in Europe.

Taking place from June 24-28, 2024, the event will have a single track of keynotes, invited and selected talks, alongside an exhibition showcasing the latest developments across industry and research, including technology demonstrations and poster sessions. Submissions are invited either for:
🚀  Industry Sessions
Exciting large-scale research efforts, announcement and success-stories.
👩‍🔬  R&D Sessions

Leading edge academic and industry research & development insights.


Important dates
  • Abstract submission deadline: March 15th, 2024, AoE (Anywhere on Earth).
  • Author notification: April 29th, 2024.
  • Final abstract PDF and slides deadline: May 31st, 2024 AoE.
  • Poster PDF deadline: June 14, 2024 AoE.
  • RISC-V Summit Europe: June 24-28, 2024, Munich.
The Steering Committee aims to provide a limited budget for stipends. More information will be available on the conference website before the submission deadline.


Jan 23, 2024

[C4P] OSDA 2024

4th Workshop on Open-Source Design Automation
March 25, 2024, 14:00-18:00
and will be co-hosted with DATE Conference
in VCC in Valencia, Spain

There is no doubt that proprietary EDA tools are successful, mature, and fundamental for hardware development. However, the “walled garden” approach created by closed-source tool flows can hamper novel FPGA/ASIC-based applications and EDA innovation alike by requiring that researchers either operate within the limits of what has already been imagined, or require that they attempt to simulate their effects on incomplete models, potentially leading to incorrect conclusions.

Another recent development has been growing activity in the open-source community to produce open equivalents of EDA tools, as well as efforts to document FPGA architectures. For instance, Yosys has been widely used for behavioral synthesis since 2012 and Project Icestorm, the first fully open-source FPGA design flow has been available since 2015; together they enabled Trenz Electronic’s icoBOARD, a Raspberry Pi accessory that could be programmed entirely using its ARM CPU, a platform not otherwise supported by the vendor. The availability of low-cost FPGA development boards such as the icoBOARD, TinyFPGA, IceZUM Alhambra, the iceBreaker board, amongst others have also played a part in fostering this “Open FPGA” movement. With OpenLANE and the Skywater process development kit, an open-source tool flow emerged that synthesizes RTL models to GDSII, gracefully enabling open-source ASIC design. The advantages of open design automation -- as Linux has provided for operating systems -- are many: unrestricted research and development, improved quality due to competition, teaching benefits, as well as lowering the barrier and risk to entry, and time to market, of start-ups for building novel applications, tools, and silicon. With such an open-source ecosystem in place, ASICs and reprogrammable logic could achieve the same success and inspire the next generation of hardware engineers as the Raspberry Pi has done for software engineers.

OSDA intends to provide an avenue for industry, academics, and hobbyists to collaborate, network, and share their latest visions and open-source contributions, with a view to promoting reproducibility and re-usability in the design automation space. DATE provides the ideal venue to reach this audience since it is the flagship European conference in this field -- particularly poignant due to the recent efforts across the European Union (and beyond) that mandate “open access” for publicly funded research to both published manuscripts as well as software code necessary for reproducing its conclusions. A secondary objective of this workshop is to provide a peer-reviewed forum for researchers to publish “enabling” technology such as infrastructure or tooling as open-source contributions -- standalone technology that would not normally be regarded as novel by traditional conferences -- such that others inside and outside of academia may build upon it.

Topics - we request contributions of the following topics, including but not limited to:
  • Open-source EDA tools -- the latest developments, breakthroughs, challenges and surveys on the toolflows required to target real silicon parts: synthesis, verification, place and route, etc.
  • Open-source IP -- contributions that enrich the IP ecosystem and reduce the need to “re-invent the wheel”, e.g. PCIe and DDR controllers, debug infrastructure, etc.
  • Design methodologies provided as open-source -- such as hardware description languages (e.g. MyHDL, Chisel), domain specific (DSL), high level synthesis (HLS), or asynchronous methods.
  • Directions on where the open-source EDA movement should go, current weaknesses in the toolchain, and/or perspectives from industry on how open-source can affect aspects of safety, security, verification, IP protection, time-to-market, datacenter/cloud infrastructure, etc.
  • Discussions and case studies on how to license, acquire funding, and commercialize technologies surrounding open-source hardware, which may be different to open software.
Important Dates
Event Date
Early-Bird submission Jan. 20, 2024
Early-Bird notification Jan 23, 2024
Regular submission deadline Feb. 15, 2024
Regular notification Feb. 22, 2024
Camera-ready final version March 16, 2024
Workshop March 25, 2024, 14:00-18:00

Organizing committee
  • Christian Krieg (OSDA and TU Wien, Austria)
  • Matthew Guthaus (UC Santa Cruz, USA)
  • Claire Xenia Wolf (YosysHQ, Austria)
Program committee
  • Andrea Borga
  • Jean-Paul Chaput
  • Tim Edwards
  • Xin Fang
  • Francesco Gonnella
  • Daniel Grosse
  • Matthew Guthaus
  • Hipolito Guzman-Miranda
  • Steve Hoover
  • Tsung-Wei Huang
  • Andrew Kahng
  • Lucas Klemmer
  • Dirk Koch
  • Christian Krieg
  • Jim Lewis
  • Mieszko Lis
  • Steffen Reith
  • Stefan Riesenberger
  • Davide Rossi
  • Frans Skarman
  • Antonino  Tumeo
  • Vamsi Vytla