[PhD Thesis] Chiara ROSSI; A novel approach for SPICE modeling of light and radiation effects in ICs; Présentée le 29 janvier 2021 à EPFL Lausanne pour l’obtention du grade de Docteur ès Sciences; DOI:10.5075/epfl-thesis-8422 https://t.co/nKSO7dyI1I #semi https://t.co/ruaQTavMH1

[PhD Thesis] Chiara ROSSI; A novel approach for SPICE modeling of light and radiation effects in ICs; Présentée le 29 janvier 2021 à EPFL Lausanne pour l’obtention du grade de Docteur ès Sciences; DOI:10.5075/epfl-thesis-8422https://t.co/nKSO7dyI1I #semi pic.twitter.com/ruaQTavMH1

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[thesis] SPICE modeling of light and radiation effects in ICs

A novel approach for SPICE modeling of light and radiation effects in ICs

Chiara ROSSI

Présentée le 29 janvier 2021

à la Faculté des sciences et techniques de l’ingénieur Groupe de scientifiques IEL

Programme doctoral en microsystèmes et microélectronique

pour l’obtention du grade de Docteur ès Sciences

DOI:10.5075/epfl-thesis-8422

Modeling the interaction of ionizing radiation, either light or ions, in integrated circuits is essential for the development and optimization of optoelectronic devices and of radiation-tolerant circuits. Whereas for optical sensors photogenerated carriers play an essential role, high energy ionizing particles can be a severe issue for circuits, as they create high density of excess carriers in ICs substrate, causing parasitic signals. In particular, recent advances in CMOS scaling have made circuits more sensitive to errors and dysfunctions caused by radiation-induced currents, even at the ground level. TCAD simulations of excess carriers generated by light or radiation are not dedicated to large scale circuit simulations since only few devices can be simulated at a time and computation times are too long. Conversely, SPICE simulations are faster, but their accuracy is strictly dependent on the correctness of the compact models used to describe the devices, especially when dealing with photocurrents and parasitic radiation-induced currents.

The objective of this thesis is to develop a novel modeling approach for SPICE compatible simulations of electron-hole pairs generated by light and by high energy particles. The approach proposed in this work is based on the Generalized Lumped Devices, previously developed to simulate parasitic signals in High Voltage MOSFET ICs. Here, the model is extended to include excess carriers generation. The developed approach allows physics-based simulations of semiconductor structures, hit by light or radiation, that can be run in standard circuit simulators without the need for any empirical parameter, only relying on the technological and geometrical parameters of the structure, and without any predefined compact model. The model is based on a coarse mesh of the device to obtain an equivalent network of Generalized Lumped Devices. The latter predicts generation of excess carriers and their propagation, recombination and collection at circuit nodes through the definition of equivalent voltages, proportional to the excess carrier concentrations, and equivalent currents, proportional to the excess carrier gradients. The model is validated with commercial TCAD numerical simulations for different scenarios. Regarding light effects, the proposed strategy is applied to simulate various optoelectronic devices. Complete DC I-V characteristics of a solar cell and transient response of a photodiode are studied. Next, phototransistors are considered. After, a full pixel of a 3T-APS CMOS image sensor is analyzed. The photosensing device, described with Generalized Devices, is co-simulated with the in-pixel circuit, described with compact models. The impact of semiconductor parameters on pixel output and on crosstalk between adjacent pixels is predicted. Finally, radiation-induced soft errors in ICs are examined. Alpha particles at different energies hitting the substrate are simulated. Parasitic currents collected at contacts are studied as a function of particles position and energy. Funneling effect, which is a phenomenon specific to high injection, is also included in the model.

This work shows that the Generalized Lumped Devices approach can be successfully used for SPICE simulations of optoelectronic devices and for prediction of radiationinduced parasitic currents in ICs substrate. This thesis is a first step towards a complete and flexible tool for excess carriers modeling in standard circuit simulators.

Fig: Layout, mesh (gray dashed lines) and equivalent network of Generalized Lumped Devices (Generalized Homojunctions, Resistors and Diodes). The structure is uniformly illuminated from the left side, justifying a 1D discretization scheme.

[papers] Compact/SPICE Modeling

[1] Kotecha, Ramachandra M., Md Maksudul Hossain, Arman Rashid, Asif Emon, Yuzhi Zhang, and Homer Ei C. Alan Mantooth. "Compact Modeling of High-Voltage Gallium Nitride Power Semiconductor Devices for Advanced Power Electronics Design." IEEE Open Journal of Power Electronics (2021)

Fig: (a) Structure of field-plated GaN transistor (b) Equivalent sub-circuit topology

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[2] Sengupta, Sarmista, and Soumya Pandit. "A Unified Model of Drain Current Local Variability due to Channel Length Fluctuation for an n-Channel EδDC MOS Transistor." (researchsquare.com 2021).

Fig: Schematic diagram of an Epitaxial δ doped n-channel MOS transistor used for design purpose and the graded retrograde approximation of the channel profile of EδDC transistor.

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[3] Patil, C.V., Suma, M.S. Compact modeling of through silicon vias for thermal analysis in 3-D IC structures. Sādhanā 46, 35 (2021). https://doi.org/10.1007/s12046-020-01549-1

Fig: Through Silicon Via 2D representation and its equivalent subcircuit.

[TechCrunch] CHIPS Alliance hires new director to push #opensource #chips ecosystem into next gear https://t.co/hAWwzdXknn #semi https://t.co/xHgTbWv2kU

[TechCrunch] CHIPS Alliance <https://t.co/Dj8XJ6nQo2> hires new director to push #opensource #chips ecosystem into next gear https://t.co/hAWwzdXknn #semi pic.twitter.com/xHgTbWv2kU

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[paper] On-Chip Coplanar Waveguides

José Valdés-Rayón, Roberto S. Murphy-Arteaga and Reydezel Torres-Torres; 

Determination of the Contribution of the Ground-Shield Losses 

to the Microwave Performance of On-Chip Coplanar Waveguides 

IEEE Transactions on MTT; Feb.3, 2021 

DOI: 10.1109/TMTT.2021.3053548 

* National Institute of Astrophysics, Optics and Electronics (INAOE), Department of Electronics, Tonantzintla, Puebla 72840, Mexico.

Abstract: In this article, we characterize and model two parasitic effects that become apparent in the performance of coplanar waveguide interconnects in CMOS. One is the transverse resistance introduced by a patterned ground shield in coplanar waveguide interconnects, which significantly contributes to the shunt losses. The other one is the parasitic coupling between the input and output ports through the ground shield. The latter effect is particularly accentuated in relatively short lines and complicates the determination of the propagation constant using line-line algorithms at several tens of gigahertz. We demonstrate that using the proposed methodology, excellent model-experiment correlation can be achieved in the modeling of these types of interconnects up to at least 60 GHz.

Funding: CONACyT-Mexico