Mar 24, 2020

#paper: A. Yesayan, F. Jazaeri and J. Sallese, "Analytical Modeling of Double-Gate and Nanowire Junctionless ISFETs," in IEEE TED, vol. 67, no. 3, pp. 1157-1164, March 2020 doi: 10.1109/TED.2020.2965167 https://t.co/ZQqam0Idam https://t.co/fLVyDK5rfB


from Twitter https://twitter.com/wladek60

March 24, 2020 at 04:29PM
via IFTTT

#paper M. H. Mohamed Sathik, P. Sundararajan, F. Sasongko, J. Pou and S. Natarajan, "Comparative Analysis of IGBT Parameters Variation Under Different Accelerated Aging Tests," in IEEE TED, vol. 67, no. 3, pp. 1098-1105 doi: 10.1109/TED.2020.2968617 https://t.co/pcQI7dpLeO https://t.co/9Sz1Vqnaf2


from Twitter https://twitter.com/wladek60

March 24, 2020 at 11:15AM
via IFTTT

#paper: W. Chen, J. Cheng and X. B. Chen, "A Novel IGBT With High-k Dielectric Modulation Achieving Ultralow Turn-Off Loss," in IEEE TED, vol. 67, no. 3, pp. 1066-1070, March 2020 doi: 10.1109/TED.2020.2964879 https://t.co/uoh7n0NYFa https://t.co/wdqFNSMBur


from Twitter https://twitter.com/wladek60

March 24, 2020 at 10:24AM
via IFTTT

Mar 23, 2020

[paper] Charge-based Modeling of Ultra Narrow Cylindrical Nanowire FETs

Charge-based Modeling of Ultra Narrow Cylindrical Nanowire FETs 
Danial Shafizade, Majid Shalchian and Farzan Jazaeri
IEEE TED, Vol. XX, No. XX, 15 March 2020

Abstract: This brief proposes an analytical approach to model the dc electrical behavior of extremely narrow cylindrical junctionless nanowire field-effect transistor (JLNW-FET). The model includes explicit expressions, taking into account the first order perturbation theory for calculating eigenstates and corresponding wave functions obtained by the Schrodinger equation in the cylindrical coordinate. Assessment of the proposed model with technology computer-aided design (TCAD) simulations and measurement results confirms its validity for all regions of operation. This represents an essential step toward the analysis of circuits mainly biosensors based on junctionless nanowire transistors.

MicroTec: Semiconductor Process and Device Simulator

Software Package for 2D Process and Device Simulation
Version 4.0 for Windows
User’s Manual
Publisher: Siborg Systems Inc
Editor: Michael S. Obrecht

MicroTec allows 2D silicon process modeling including implantation, diffusion and oxidation and 2D steady-state semiconductor device simulation like MOSFET, DMOS, JFET, BJT, IGBT, Schottky, photosensitive devices etc. Although MicroTec is significantly simplified compared to widely available commercial simulators, it nevertheless is a very powerful modeling tool for industrial semiconductor process/device design. In many instances MicroTec outperforms existing commercial tools and it is remarkably robust and easy-to-use.

FIG: MicroTec SibGraf GUI windows