Barcelona, Spain
February 15-16, 2016 (2 days)
The course will highlight board and system-level manufacturing test and supportability issues. In order to achieve the unambiguous isolation of the faulty circuits, testability has to be assessed at the design stage – often before the circuit details are known. We will examine how this can be achieved using diagnostic assessment and modeling techniques. Finally, the course will evaluate the value of DFT and BIST at all levels of assembly from an economic perspective. You will leave the course with a thorough understanding of techniques, and guidelines you can put to use right away to manage automatic test and ATE at your company. The DFT and BIST methods will profit both manufacturing and support, while at the same time greatly improve the quality of units under test UUTs.
Who should attend: This course is not only of interest to designers and test engineers, but it will also be of great value to reliability, logistics, quality and manufacturing engineers. Managers concerned with testability and BIST techniques as part of DFX, as well as those with general interest of IEEE and military standards in DFT should find this course a great value.
Instructor: Louis Y. Ungar; Details and Availability [read more...]
