IEDM'08

The 2008 IEEE International Electron Devices Meeting (IEDM) will be held in the Hilton San Francisco Hotel in San Francisco, CA, from December 15 to 17 2008.

IEDM is the top conference in the field of electron devices. It is of course the most competitive one. Only truly outstanding papers are accepted. It is highly recommended that experimental results are shown, also some good simulation papers can be also accepted.

Two short courses will be held on Sunday, december 14: 22 nm Technology and More than Moore: Technologies for Functional Diversification.

This year there will also be plenary presentations by Peter Fromherz of Max Planck Institute; Tatsuo Saga from Sharp; Stefan K. Lai from Ovonyx, Inc.

Deadline for abstract submissions is June 27 2008 at 5.00 pm Pacific Standard Time.

Topics include all aspects related to electron devices, grouped in several areas:

-CMOS DEVICES & TECHNOLOGY (CDT)
-CHARACTERIZATION, RELIABILITY and YIELD (CRY)
-DISPLAYS, SENSORS, AND MEMS (DSM)
-MEMORY TECHNOLOGY (MT)
-MODELING AND SIMULATION (MS)
-PROCESS TECHNOLOGY (PT)
-QUANTUM, POWER, AND COMPOUND SEMICONDUCTOR DEVICES (QPC)
-SOLID STATE AND NANOELECTRONIC DEVICES (SSN)

This year the area of Modeling and Simulation (MS) explicitly includes "physical and compact models for devices and interconnects". And it is said "Submissions should advance the art of modeling and simulation or apply existing techniques to gain new insights into devices".

If you have important results to show, I vively recommend to send an abstract to IEDM. It is the best place to present them, and to discuss them with the top people. Even if your abstract is rejected, or if you do not have any new results to show, I encourage researchers to attend IEDM, including compact modeling researchers.

OSC'08

The 2008 Organic Semiconductor Conference (OSC-08) will take place in Frankfort (Germany), from September 28 to October 1 2008. The conference will be held in the Congress Centre, at the Frankfort Messe.

OSC-08 includes three tracks with presentations by invited speakers plus one track with peer review papers, a poster session, and also an exhibition of leading organic semiconductor technology companies, as well as an exhibitor forum.

Topics include all aspects related to development, manufacturing and investment in organic semiconductor technologies and organic electronics. Besides, this year, for the first time OSC-08 will also cover carbon nanotubes, graphenes and fullerenes.

The deadline for review paper submission is May 25 2008.

The invited speakers come from both academia and industry. Among them, there are very prestigious researchers such as Hagen Klauk (Max Planck Institute for Solid State Research), Karlheinz Bock (Fraunhofer IZM), Takao Someya (University of Tokyo), Edzer Huitema (Polymer Vision), or Jan Genoe (IMEC).

Papers on Volume 52, Issue 6, of Solid-State Electronics

Some new papers on the Volume 52, Issue 6, Pages 839-996 (June 2008) of Solid-State Electronics.

A universal electron mobility model of strained Si MOSFETs based on variational wave functions
Renrong Liang, Debin Li and Jun Xu

Substrate current characterization and optimization of high voltage LDMOS transistors
Jun Wang, Rui Li, Yemin Dong, Xin Zou, Li Shao and W.T. Shiau

Small-signal performance and modeling of sub-50 nm nMOSFETs with f_T above 460-GHz
V. Dimitrov, J.B. Heng, K. Timp, O. Dimauro, R. Chan, M. Hafez, J. Feng, T. Sorsch, W. Mansfield, J. Miner, A. Kornblit, F. Klemens, J. Bower, R. Cirelli, E.J. Ferry, A. Taylor, M. Feng and G. Timp

Modeling of strained CMOS on disposable SiGe dots: Shape impacts on electrical/thermal characteristics
Sébastien Frégonèse, Yan Zhuang and Joachim N. Burghartz

A physical model of floating body effects in polysilicon thin film transistors
W.J. Wu, R.H. Yao, T. Chen, R.S. Chen, W.L. Deng and X.R. Zheng

Enjoy your reading!

Synopsys Launches HSPICE Integrator Program With 25 Founding Members

It seems that Synopsys is trying to get back the leading position in the simulators market. Have a look at the post in their news section (disregard the self-publicity they do... it's natural in a company...). I copy here the post, because the final destination of a compact model is to be implemented... and one has to know which are the leading tools...

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today launched its HSPICE® Integrator Program to further promote integration between Synopsys' HSPICE simulation solution and other electronic design automation (EDA) products. The HSPICE Integrator Program enables qualified EDA vendors to integrate their products with the de facto standard HSPICE simulator, HSPICE RF simulator, and WaveView Analyzer™. In addition, qualified HSPICE Integrator Program members have access to HSPICE integrator application programming interfaces (APIs). Collaboration between HSPICE Integrator Program members will enable customers to achieve more thorough design verification in a shorter period of time from the improvements offered by inter-company EDA design solutions.


Founding members of the HSPICE Integrator Program include: Accelicon Technologies Inc., Agilent EEsof EDA, Altos Design Automation, Inc., Apache Design Solutions, Applied Simulation Technology, ATEEDA, AWR, Computer Simulation Technology (CST), Helic S.A., Interra Systems Inc., Jedat Inc., Mephisto Design Automation (MDA), MunEDA GmbH, Nangate Inc., Novas Software, OEA International, Inc., Orora Design Technologies, Inc., Physware, Inc., ProPlus Design Solutions, Inc., Signal Integrity Software, Inc. (SiSoft), Sigrity, Inc., Silicon Canvas, Solido Design Automation Inc., Veritools Inc., and Z Circuit Automation. For more information, visit the HSPICE Integrator Program, http://www.synopsys.com/hspice_integrator/

Memristor

A friend of us (Francisco J. Garcia) has pointed out a recent paper in Nature Letters (Vol 453| 1 May 2008| doi:10.1038/nature06932). I post here the abstract, because it is very interesting, though not very related to compact modeling:

Authors: Dmitri B. Strukov, Gregory S. Snider, Duncan R. Stewart & R. Stanley Williams

ABSTRACT: Anyone who ever took an electronics laboratory class will be familiar with the fundamental passive circuit elements: the resistor, the capacitor and the inductor. However, in 1971 Leon Chua reasoned from symmetry arguments that there should be a fourth fundamental element, which he called a memristor (short for memory resistor). Although he showed that such an element has many interesting and valuable circuit properties, until now no one has presented either a useful physical model or an example of a memristor.

Here we show, using a simple analytical example, that memristance arises naturally in nanoscale systems in which solid-state electronic and ionic transport are coupled under an external bias voltage. These results serve as the foundation for understanding a wide range of hysteretic current–voltage behaviour observed in many nanoscale electronic devices2–19 that involve the motion of charged atomic or molecular species, in particular certain titanium dioxide cross-point switches20–22.

There is a remarks to be done, following Francisco, since you can find a patent of a very similar device:
Genrikh et al
US Patent Application Publication No. US 2007/0200158 A1, Aug. 30, 2007
ELECTRODE STRUCTURE HAVING AT LEAST TWO OXIDE LAYERS AND NON-VOLATILE MEMORY DEVICE HAVING THE SAME
Assignee: Samsung Electronics, Co., Ltd.
Filed: Jan. 19, 2007