[paper] Circuit-Based Compact Model of Electron Spin Qubit

Mattia Borgarino

Circuit-Based Compact Model of Electron Spin Qubit

Special Issue Recent Advances in Silicon-Based RFIC Design;

Electronics 2022, 11(4), 526; 

DOI: 10.3390/electronics11040526

   
University of Modena and Reggio Emilia, Modena (IT)

Abstract: Today, an electron spin qubit on silicon appears to be a very promising physical platform for the fabrication of future quantum microprocessors. Thousands of these qubits should be packed together into one single silicon die in order to break the quantum supremacy barrier. Microelectronics engineers are currently leveraging on the current CMOS technology to design the manipulation and read-out electronics as cryogenic integrated circuits. Several of these circuits are RFICs, as VCO, LNA, and mixers. Therefore, the availability of a qubit CAD model plays a central role in the proper design of these cryogenic RFICs. The present paper reports on a circuit-based compact model of an electron spin qubit for CAD applications. The proposed model is described and tested, and the limitations faced are highlighted and discussed.

FIG: Compact model of the electron spin qubit.

Funding: This research received no external funding.

[paper] Compact Model for SIS Josephson Junctions

A Compact Model for Superconductor-Insulator-Superconductor (SIS) Josephson Junctions

Shamiul Alam, Mohammad Adnan Jahangir and Ahmedullah Aziz, Member, IEEE

Department of Electrical Engineering and Computer Science

University of Tennessee, Knoxville, TN, USA

in IEEE Electron Device Letters, 

DOI: 10.1109/LED.2020.3002448

Abstract: We present a Verilog-A based compact model for the superconductor-insulator-superconductor (SIS) Josephson junction. The model can generate both hysteretic and non-hysteretic current-voltage (I-V) response for the SIS junctions utilizing the Stewart-McCumber damping parameter. We calibrate our model with different SIS samples and demonstrate accurate matching between the simulated and experimental results. We implement temperature effect on the energy gap and the critical current of the superconductor to explore the dynamic trends in device characteristics. We calculate the junction inductance and stored energy as functions of junction current and temperature. We simulate the read/write operations of an SIS junction based cryogenic memory cell to illustrate the usability of our model.

Fig: (a) Device structure of an SIS Josephson junction
(b) the RCSJ model of a Josephson junction.