Showing posts with label MOS-AK. ESSDERC. Show all posts
Showing posts with label MOS-AK. ESSDERC. Show all posts

Jul 21, 2021

[Final Program] 18th MOS-AK ESSDERC/ESSCIRC Workshop Grenoble; Sept. 6, 2021

MOS-AK ESSDERC/ESSCIRC Workshop Grenoble
Arbeitskreis Modellierung von Systemen und Parameterextraktion
Modeling of Systems and Parameter Extraction Working Group
18th MOS-AK ESSDERC/ESSCIRC Workshop
Grenoble, Sept. 6, 2021

Together with local Host and MOS-AK Organizers as well as all the Extended MOS-AK TPC Committee, we invite you to the consecutive 18th MOS-AK ESSDERC/ESSCIRC Workshop. Scheduled Virtual/Online MOS-AK event aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and TCAD/EDA tool developers and vendors.

The MOS-AK Workshop Program is available online: 

Venue: Online MOS-AK Webinar;
use the online form/link below to register.

Online Registration is open
any related enquiries can be sent to registration@mos-ak.org

Post-workshop publications, selected, the best papers will be recommended for further publication in the special compact/SPICE modeling issue of the Solid State Electronics.

-- W.Grabinski; MOS-AK (EU)

Enabling Compact Modeling R&D Exchange

WG210721