Wednesday, June 1, 2011

[mos-ak] C4P MOS-AK/GSA ESSDERC/ESSCIRC Workshop in Helsinki on Sept.16 2011

C4P MOS-AK/GSA ESSDERC/ESSCIRC Workshop in Helsinki on Sept.16 2011

Together with the Organizing Committee and Extended MOS-AK/GSA TPC
Committee, we have pleasure to invite to the MOS-AK/GSA Workshop in
Helsinki on Sept.16 2011 with special panel: 40th Anniversary of SPICE
(panelists tentative alphabetic list):
* Narain D. Arora, Siltera, USA
* Christian Enz, CSEM, CH
* Andrei Vladimirescu, EECS, Berkeley
* Andreas Wild, ENIAC - JU, EU
and MOS-AK/GSA Transistor Level IC Design Challenge Opening

The MOS-AK/GSA Workshop is HiTech forum to discuss the frontiers of
the electron devices modeling with emphasis on simulation-aware
models. Original papers presenting new developments and advances in
the compact/spice modeling and its Verilog-A standardization are
solicited. The main topics of the workshop are: (but are not limited
* Compact Modeling (CM) of the electron devices
* VHDL-AMS/Verilog-A for CM standardization
* New CM techniques and extraction software
* CM of passive, active, sensors and actuators
* Emerging devices, CMOS and SOI-based memory cells
* Microwave, RF device modeling, high voltage device modeling
* Transistor Level IC support
* Nanoscale CMOS devices and circuits
* Reliability and thermal management of electron devices
* Technology R&D, DFY, DFT and IC designs
* Foundry/Fabless interface strategies

The terms of participation:
Authors are asked to submit a short (~200words) abstract using on-line
submission form by JUNE 30

Intending authors should also note the following deadlines:
* Announcement and Call for Papers - May 2011
* on-line abstract submission deadline - June 30, 2011
* Final Workshop Program - August 2011
* MOS-AK/GSA Workshop - Sept. 16, 2011

On-line workshop registration:
Further details and updates:
Email contact:

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