May 7, 2012

[book] Lectures on the modeling elements of integrated circuits in microelectronics

Лекции по моделированию элементов интегральных схем микроэлектроники
Игорь Иванович Абрамов
ISBN: 978-3-8484-8201-6
LAP Lambert Academic Publishing (2012-04-11)

Apr 15, 2012

[mos-ak] MOS-AK/GSA India workshop on-line publications

MOS-AK/GSA India workshop on-line publications are available, 
visit: 
http://www.mos-ak.org/india/

The Workshop was co-organized by Indian National Academy of Engineering (INAE), supported by Ministry of Communication and IT (DIT), Government of India, Council of Scientific and Industrial Research (CSIR); Jaypee Institute of Information Technology (JIIT), Noida; with sponsorship provided by the microelectronic and semiconductor industry leaders: AMS, IBM, TI, STM, Cadence, Mentor Graphics and Masamb.

I would like to thank all MOS-AK/GSA speakers for sharing their compact modeling competence, R&D experience and delivering valuable MOS-AK/GSA presentations. I am sure, that our modeling event in Noida was a beneficial on to all the attendees as well as to all MOS-AK/GSA Group.

The MOS-AK India workshop press coverage is listed below
http://mos-ak.org/india/press.php

I hope, we would have a next chance to meet us with your academic and industrial partners at future MOS-AK/GSA modeling events (check the list below).

- with regards - WG (for the MOS-AK/GSA Committee
––––––––––––––––––––––––––––––––––---------------- 
MOS-AK/GSA Dresden April 26-27, 2012 
MIXDES Special Modeling Sesion Warsaw May 24-26, 2012 
MOS-AK/GSA Bordeaux Sept.21, 2012 
MOS-AK/GSA San Francisco Q4 2012 
––––––––––––––––––––––––––––––––––----------------

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Apr 10, 2012

PhD course on Nano-scale MOS transistors

Semi-classical modeling and applications
Udine, May 28 - June 1, 2012

Luca Selmi, David Esseni, Pierpaolo Palestri
DIEGM, Università degli Studi di Udine

The course aims at giving a description (in terms accessible to both physicists and electronic engineers) of advanced models for modern nano-MOSFET architectures exploiting technology boosters (strain, high-k materials, etc.) for enhanced channel mobility and reduced leakage. The prerequisite knowledge in physics is limited to the basic concepts of classical electrostatics and electrodynamics and elementary notions of quantum mechanics.

All information dealing with the application for such a scholarship and the eligibility criteria can be found on
http://www.euro-dots.org/Students-rules.asp
and
http://www.euro-dots.org/Students-steps.asp

To register, please call +39 0432 558251 or e-mail it to palestri@uniud.it

DEADLINE FOR ADVANCED REGISTRATION: APRIL 28, 2012

Apr 5, 2012

4th Regional Seminar "Computer simulation and design of micro- nano- and microelectromechanical systems"

Natural Sciences Faculty FSEIHPE "State University - teaching, research and production complex"
Physics Department
Teaching and research laboratory instrument-technological modeling of micro-and nano-electronics 

March 30, 2012, Orel, Naugorskoe Av. 29

Seminar Program [translated by Google

  1. S. Matyukhin 1, Welcome to the participants
    1 State University-UNPK
  2. A VO Turin, 2 Zebra G.I.2 3 Dorofeev, AA, Device-technological simulation of self-heating in GaN HEMT ,
    1-UNPK State University,
    2 NRNU "MiFi"
    3 3FGUP NPP "Pulsar"
  3. A VO Turin, 2 Zebra GI, 3 Inigez B3, 4, Shur MS, Correct account of non-zero differential conductivity in a compact model of MOSFET in saturation due to self-heating effect and because korotkokanalnyh effects ,
    1-UNPK State University,
    2 NRNU "MiFi"
    3 University of Rovira and Virginia, Spain,
    4 Rensselaerovsky Polytechnic Institute, USA
  4. Garanovich D. Drozdov, DG, EM Savchenko Design devices from electrostatic discharge protection for bipolar integrated circuits ,
    FSUE NPP "Pulsar"
  5. Drozdov, DG, EM Savchenko, Siomko VO Study of models for the calculation of heterostructure transistors based on AlGaN / GaN
    FSUE NPP "Pulsar"
  6. Siomko VO, Drozdov, DG, EM Savchenko, Research methods for calculating the breakdown voltage of transistors based on heterostructures AlGaN / GaN
    FSUE NPP "Pulsar"
  7. A Kozil Z., S. Birner 2, 3 Dupuis, AR, Nextnano: device-technological modeling of transport in quantum well semiconductor lasers with a double restriction
    1-UNPK State University,
    2 Walter Schottky Institut, Technische Universität Munchen, Germany,
    3 Matco Industries Inc., Scarborough, Ontario, Canada
  8. Kozil Z., Differential resistance characteristics of the current-voltage characteristics of semiconductor lasers with a double restriction and optical efficiency
    State University-UNPK
  9. Titushkin DA, Matyukhin SI, Modeling of electron-optical system, light-emitting diodes in the package Sentaurus TCAD software company Synopsys ,
    State University-UNPK
  10. Makulevsky GR, Malyj DO, Matyukhin S., Investigation of the dependence of characteristics of RO DHS laser waveguide structure by taking into account the thermal effects ,
    State University-UNPK
  11. Malyj DO, Makulevsky G.R, Matyukhin SI, Effect of heat on the electrical and optical characteristics of semiconductor lasers, DHS PO using the instrument-technological methods of modeling
    State University-UNPK
  12. Tsyrlov AM, Cherkasov, MA, Technical requirements for analysis tools and simulation of high-power devices, switching equipment ,
    JSC «Proton»
  13. Chernyshov, KN, Matyukhin S., Computer simulation of the diffusion technology of IGBT ,
    State University-UNPK
  14. 1.2 AA Pisarev, a Matyukhin SI, 2 Stavtsev AV Computer simulation of the thyristor
    1-UNPK State University,
    2 ZAO "Proton-Electrotex"
  15. A Stoudennikov AS, a Turin VO 2 Tsyrlov AM, Compact modeling of silicon vertical MOSFET with double diffusion in the program Quite Universal Circuit Simulator
    1-UNPK State University,
    2 of "Proton"
  16. 1 Turin, VO, VV Ivanov 1, 2 Tsyrlov AM, 3 Martemyanov IS, Simulation of a silicon vertical MOSFET with double diffusion in the program Synopsys TCAD ,
    1-UNPK State University,
    2 of "Proton"
    3 ETU "LETI" 

Job Offer for Compact Modeling (april, 2012)

Remember: we are only re-posting this information, and we're not related to the offer in any other form.

Device Modeling / Compact Modeling Lead / Manager

A top tier Research Group of Semiconductor MNC - Client of HanDigital - Bangalore (Bengaluru Area, India)

Job Description

  • Manage and lead a strong technical team to effectively
  • Develop compact models for FETs and passive devices like diodes, resistors, inductors , capacitors
  • Design testsites and define test programs for RF/DCcharacterization
  • Work closely with globally integrated team ofdevice modelers, technology developers and circuit designers
  • Client interfacing to address concerns on device models, PDK or circuit performance.

Desired Skills & Experience

Experience : PhD with 10 to 12 Yrs / MS with 12 to 15 Yrs
 
Total Years of relevant experience :Minimum 5 or more years of experience in Device Modeling ; Hands-on experience with RF device / circuit design  and characterization.
 
Technical Knowhow required for the job
  • Strong background in semiconductor device physics and characterization particularly in silicon platform is required
  • Familiarity with industry standard BSIM or PSP models
  • Experience with EDA tools like Cadence, Spectre, HSpice and ADS
Additional Details :
  • Excellent written & oral communication skills
  • Excellent Technical leadership skills
  • Direct working experience with foundries ( Desired ,  Not a Mandatory )

Company Description

Our client is Bangalore based research center is responsible for the definition and development of industry leading technologies such as Copper Interconnect, Silicon onInsulator (SOI), High-Performance Logic-Based Embedded DRAM technologies, and SiGe for RF and analog applications, and high-k material technologies.
 
The research group is also the leading organization in defining the most advanced technologies forthe 45 nm and 22 nm nodes, including research in various aspects of Lithography, strained silicon, and Magnetic RAM (MRAM). The research center develops all of semiconductor technologies including SOI, Bulk CMOS, RFCMOS, HVCMOS,SiGe HBT BiCMOS, and nanodevice technologies.

Additional Information

Posted:
April 5, 2012
Type:
Full-time
Experience:
Mid-Senior level
Functions:
Research, Engineering, Design 
Industries:
Semiconductors 
Compensation:
Best in the Industry
Referral Bonus:
  • Applicable
Employer Job ID:
Device / Compact Modeling Manager
Job ID:
2815431

Job Offer in SanDisk (april, 2012)

Remember: we are only re-posting this information, and we're not related to the offer in any other form.

Job Description

In this position, the individual will work in the NAND Flash team to generate IBIS models for the NAND IO’s to be finally used by the internal System team & external customers. In this highly visible role you will perform the following duties:
  • Develop IBIS models for the Legacy and DDR IO’s.
  • Develop HSPICE models for Legacy and DDR IO’s.
  • Interact with the US & the India team.
  • Over a period of time develop a team for IBIS models.
  • Develop an automated methodology on developing the models

Desired Skills & Experience

This position requires a Bachelor or Master Degree in Electrical/ (Micro) Electronics / VLSI Engineering or equivalent. 2 to 8 years of experience in IBIS models development for the complex Input/Output Buffers. Understanding about the functionality of complex IO’s.Should have deep understanding about HSPICE simulators & IBIS tools e.g Magma Silicon Smart. Excellent Team player.

Company Description

SanDisk Corporation is the global leader in flash memory cards - from research, manufacturing and product design to consumer branding and retail distribution. SanDisk's product portfolio includes flash memory cards for mobile phones, digital cameras and camcorders; digital audio/video players; USB flash drives for consumers and the enterprise; embedded memory for mobile devices; and solid state drives for computers. SanDisk is a Silicon Valley-based S&P 500 company, with more than half its sales outside the United States.

Additional Information

Posted:
April 4, 2012
Type:
Full-time
Experience:
Mid-Senior level
Functions:
Engineering 
Industries:
Semiconductors 
Job ID:
2809898

Mar 30, 2012

[mos-ak] C4P MOS-AK/GSA Dresden Workshop (April 26-27, 2012)

Together with the Fraunhofer IIS, local organizer and Extended MOS-AK/GSA TPC Committee, we have pleasure to invite to the MOS-AK/GSA Dresden Workshop at Fraunhofer IIS, Zeunerstraße 38, D-01069 Dresden on April 26-27, 2012; with XFAB visit and networking event.

On-Line free registration is open:
http://mos-ak.org/dresden/registration.php

MOS-AK/GSA Meetings are organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/Spice modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD tool vendors. Topics to be covered include the following:
 * Advances in semiconductor technologies and processing
 * Compact Modeling (CM) of the electron devices
 * Verilog-A language for CM standardization
 * New CM techniques and extraction software
 * CM of passive, active, sensors and actuators
 * Emerging Devices, CMOS and SOI-based memory cells
 * Microwave, RF device modeling, high voltage device modeling
 * Nanoscale CMOS devices and circuits
 * Technology R&D, DFY, DFT and IC Designs
 * Foundry/Fabless Interface Strategies

Speakers tentative list (in alphabetic order) includes:
 * Klaus Gaertner, WIAS Berlin
 * Thomas Gneiting, Admos
 * Joachim Haase, Fraunhofer, IIS
 * Benjamin Iniguez, URV Tarragona
 * Wolfgang Mathis, Uni Hannover
 * Paolo Nenzi, Uni Roma
 * Andrej Rumiantsev, Cascade
 * Franz Sischka, Agilent
 * Jiri Slezak, On-Semi
 * Daniel Tomaszewski, ITE Warsaw
 * Dietmar Warning, Atmel

Intending participants and authors should also note the following deadlines:
 * Call for Papers - Mar. 30, 2012
 * Final Workshop Program - April 10, 2012
 * MOS-AK/GSA Workshop - April 26-27, 2012

On-Line abstracts submission is open:
http://www.mos-ak.org/dresden/abstracts.php

Further details and updates: <http://www.mos-ak.org/dresden> 
Email contact: <dresden@mos-ak.org>
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Mar 28, 2012

Introducing the 2012 IEEE Fellows

The IEEE Fellows class for 2012 has been announced on 5 March 2012. The Institute salutes these 329 IEEE senior members from around the world who have been named IEEE Fellows for 2012. They join an elite group of more than 6000 IEEE Fellows, who have contributed to the advancement or application of engineering, science, and technology.

Mar 26, 2012

2nd Training Course on Compact Modeling

Building on the success of its first edition in 2012, the 2nd Training Course on Compact Modeling (TCCM) will be held in Tarragona (Catalonia, Spain) on June 28-29 2012. It will be organized by will be organized by the NEPHOS Group, of the Department of Electronic, Electrical and Automatic Control Engineering at the Universitat Rovira i Virgili (Tarragona).. The General Chairman is Prof. Benjamin Iñiguez.

The Training Course on Compact Modeling will consist of 12 of lectures addressing relevant topics in the compact modeling of advanced electron devices. These lectures will be conducted by top experts in the field. Most of the lectures will target compact modeling issues applicable to many electron devices. In particular, emphasis will be given on MOSFETs (bulk, SOI, Multi-Gate and High Voltage MOS structures) and HEMTs.

The Training Course on Compact Modeling is an event sponsored by the FP7 “COMON” (COmpact MOdelling Network) IAPP Project (which is coordinated by the Universitat Rovira i Virgili) in collaboration with the IEEE EDS Compact Modeling Technical Committee.

The preliminary programme is already available at:

http://compactmodelling.eu/tccm2_programme.php

Prof. Raphaël Clerc (INPG, Grenoble, France)
"Tunnel and quasi-ballistictransport modelling in nanoscale MOS devices"

Prof. David Jiménez - Universitat Autònoma de Barcelona (UAB, Barcelona, Spain)
"Analytical quantum modelling of ultimate MOS devices"

Dr. Romain Ritzenthaler (IMEC, Belgium)
"3D analytical modelling techniques for Tri-Gate MOS structures"

Prof. Antonio Cerdeira (CINVESTAV,Mexico)
"Design-oriented compact modelling for Multi-Gate MOS devices"

Dr. Colin C. McAndrew (Freescale Semiconductors, Phoenix, AZ, USA)
"Statistical modelling techniques"

Dr. Thomas Gneiting (AdMOS GmbH, Frickenhausen, Germany)
"Flicker noise measurements and characterization"

Prof. Frédéric Martinez (Université de Montpellier 2, France)
"Low frequency noisemodeling"

Dr. Franz Sischka (Agilent Technologies, Böblingen, Germany)
"S-parameter and nonlinear RF modelling"

Prof. Giovanni Ghione (Politecnico di Torino, Italy)
"Thermal modelling of RF and microwave devices"

Prof. Jamal Deen (McMaster University, Canada)
"High frequencynoise modeling"

Prof. Mike Brinson (Metropolitan University of London, UK)
"QucsStudio: A second generation Qucs software package for compact semiconductor devicemodel development based on interactive and compiled equation-defined modellingtechniques plus circuit simulation"



Registration will be cheap, in particular before June 16 :

http://compactmodelling.eu/tccm2_registration.php

will include lunches, coffee breaks and a Gala Dinner on June 28, in a nice restaurant with TV screens to watch the Semifinals match of the Soccer European Cup ...

Besides, on June 25-27 the same group at URV will organize 8th International Conference on Organic Electronics (ICOE 2012) also in Tarragona. Participants to this Training Course will have a reduced fee for ICOE 2012.

I encourage compact modeling researchers to attend TCCM!

Mar 25, 2012

SBMicro symposium 2012

27th SYMPOSIUM ON MICROELECTRONICS TECHNOLOGY AND DEVICES CHIP IN BRASÍLIA
August 30 - 02, 2012
Hotel San Marco, Brasilia, DF - Brazil

http://chipinbsb.cic.unb.br/sbmicro.html

Call for Papers: The SBMicro symposium is an international forum dedicated to fabrication and modeling of microsystems, integrated circuits and devices, held annually in Brazil. The goal of the symposium is to bring together researchers in the areas of processing, materials, characterization, modeling, simulation and TCAD of integrated circuits, microsensors, microactuators and MEMS. The SBMicro2012 will be located in Brasília, Brazil. This international conference offers a unique blend of microelectronics and serves as a major conference for the discussion of interdisciplinary research around the world through a variety of formats, such as oral presentations, poster sessions, exhibits, panel discussions, and tutorial sessions. The best papers presented at the symposium will be invited to resubmit an extended version that will be considered for publication at the JICS - Journal of Integrated Circuits and Systems and at the Journal of the Electrochemical Society.

SBMicro2012 will occur in the same venue as SBCCI2012 - 25th Symposium on Integrated Circuits and Systems Design.

Deadline and Paper Format
  • Paper Submission Deadline: March 31th, 2012
  • Notification of Acceptance : May 18th, 2012
  • Camera-Ready Deadline : June 01th, 2012
SBMicro2012 will receive camera-ready submissions in English for consideration by the Program Committee with a maximum of 10 pages. Submission paper format details for SBMicro2012 are available at the conference website http://www.sbmicro.org.br/sbmicro. Simultaneous submissions or submissions of previously published papers will not be considered. The Program Committee will only accept electronics submission in PDF format via the conference website.
Topics of interest include, but are not limited to:
  • Semiconductor and MEMS processing;
  • Sensors and actuators;
  • Optoelectronics and photovoltaic;
  • Plasma technology and diagnostics;
  • Nanoelectronics;
  • Display technology;
  • Modeling and simulation;
  • Reliability and yield;
  • Device characterization;
  • Circuit-device interaction;
  • Energy harvesting;
  • Biomedical devices;
  • Power devices;
  • Packaging;
  • Novel materials and devices;
  • Technology roadmaps;
Engineering education.Location: Brasilia was constructed between 1956 and 1960 and inaugurated, as the new Brazilian Capital, in April 21, 1960. Its master plan ("Plano Piloto") was conceived by Lucio Costa, and its major buildings were designed by Oscar Niemeyer. Known internationally for the modernity of its architecture and urban design in the shape of an airplane (or a bird, as Lucio Costa conceived it), Brasilia has been declared by the UNESCO as "World Heritage Site". The city and its District are located in the Central-West region of the country, along a plateau known as Planalto Central.

General Chair
Ricardo Jacobi
UnB - Brazil
jacobi@unb.br

Program Chairs
Gilson Wirth
UFRGS - Brazil
wirth@inf.ufrgs.br

Dragica Vasileska
ASU - USA
vasileska@asu.edu

Local Arrangement Chairs
Carlos Llanos, UnB - Brazil
llanos@unb.br

Tutorials Chair
Henry Boudinov, UFRGS - Brazil

Panels Chair
Sérgio Bampi, UFRGS - Brazil

Finance Chair
Sandro Haddad, UnB - Brazil

Publicity Chair
Jacobus Swart, UNICAMP - Brazil

Publication Chair
Nilton Morimoto, USP - Brazil
Fernanda Kastensmidt, UFRGS - Brazil

Industry Liaison
Saulo Finco, CTI - Brazil
Jones Yudi, UnB - Brazil

Europe Liaison
Patrick Verdonk, IMEC - BE

US Liaison
Fernando Guarin, IBM - USA

LA Liaison
Mariano Aceves, INAOE - MX

Mar 20, 2012

SWOT Analysis of the Technology/Design Ecosystem", Lausanne, 30-31 May 2012

NANO-TEC Workshop 3; SWOT Analysis of Technology-Design Ecosystem: The event is part of the Coordination Action funded by the FP7 under the ICT theme, titled “ECOSYSTEMS TECHNOLOGY and DESIGN for NANOELECTRONICS” (NANO-TEC). The project started on 1 September 2010 and it aims at identifying the emerging generation of device concepts and technologies for ICT, as well as to build a joint technology-design community in order to coordinate research efforts in nanoelectronics in the European research area. 
The third workshop will tackle the topics of Solid-state quantum computing, Molecular Electronics, Nanowires, Spintronics, Graphene, MEMS and Neuromorphic Computing; finally, a panel discussion on the bridge in design from technology to application will close the event. All this will lead to the preparation of the fourth and final NANO-TEC workshop, to take place in Autumn 2012, which will provide a set of recommendations on the most promising devices and technologies identified and for future technology-design integration. In preparation for the workshop you can now join the forum available online at the following link: 

BSIMCMG is now the CMC industry standard FinFET SPICE model.

BSIMCMG is now the first industry standard FinFET SPICE model. It is available for download and use at the BSIM website. The voting took place in Jan'12 and the model was approved a standard at the March 1Q12 Osaka CMC Meeting. The CMC is yet to update their website.

Mar 7, 2012

SISPAD'2012 - Second call for papers

Call for Papers
The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of the leading-edge research and development results in the area of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided design (TCAD) and advanced modeling of novel semiconductor devices and nano electronic structures.
Date and Location
  • Conference date: September 5-7, 2012
  • Abstract submission deadline: April 1, 2012
  • Conference location: Sheraton Denver Downtown Hotel, Denver, Colorado, USA
  • Webpage: http://www.ece.umd.edu/sispad2012
Topics
Original papers are solicited in the following subject areas:
  • Electronic Transport in Semiconductor Materials and Devices
  • Device Modeling and Simulation
  • Sensors, Biosensors and Electromechanical Systems Simulation
  • Process and Equipment Modeling and Simulation
  • Compact Models
  • Physical-Level Circuit Simulation
  • New Algorithms for Process and Device Modeling
  • Simulation of Nano and Quantum Devices
  • User Interfaces and Visualization
  • Simulation of Power Devices
  • Photovoltaics and Other Green Technologies
The abstract should describe the nature of the presentation, together with references. The text must be single-spaced with 11pt or 12pt font. The abstract is limited to two pages including figures, tables and references. Abstracts should be submitted in PDF format.
For more information, please visit:
http://www.ece.umd.edu/sispad2012/

Mar 5, 2012

NDES 2012 July 11 – 13, 2012, Wolfenbüttel, Germany

The conference aims at stimulating and enabling scientists from all over the world to exchange know-ledge and ideas in the field of nonlinear dynamics and its applications in a friendly atmosphere. Nonlinear phenomena are observed in diverse areas such as physics, biology, economics, electronics and computer science. The conference will cover cutting-edge research in these highly active fields and explore new perspectives of nonlinear dynamics in interdisciplinary applications. The scope of interest includes, but it is not limited to:
  • Theory, analysis, modelling, implementations and applications of nonlinear circuits and systems in science, technology and biology
  • Nonlinear network analysis
  • Neural networks, neurodynamics, robots 
  • Nonlinear signal processing: Time-series analysis, communication, coding
  • Nonlinear devices: Sensors, lasers
  • Bifurcation and chaos, control and synchronisation
  • Geodynamics
Wolfgang Mathis (Conference Chair, Organizing Committee)
Ruedi Stoop (Conference Co-Chair, Organizing Committee)

Feb 29, 2012

Papers in March 2012

SP-HV: A Scalable Surface-Potential-Based Compact Model for LDMOS Transistors

Yao, W.  Gildenblat, G.  McAndrew, C. C.  Cassagnes, A. 
Abstract | Full Text: PDF (435KB) 

Applicability of Macroscopic Transport Models to Decananometer MOSFETs

Vasicek, M.  Cervenka, J.  Esseni, D.  Palestri, P.  Grasser, T. 

Physics-Based Modeling of GaN HEMTs

Vitanov, S.  Palankovski, V.  Maroldt, S.  Quay, R.  Murad, S.  Rodle, T.  Selberherr, S.

A Compact Analytic Model of the Strain Field Induced by Through Silicon Vias

Jan, S.-R.  Chou, T.-P.  Yeh, C.-Y.  Liu, C. W.  Goldstein, R. V.  Gorodtsov, V. A.  Shushpannikov, P. S. 
Abstract | Full Text: PDF (849KB) 
 
 

A Subthreshold Swing Model for Thin-Film Fully Depleted SOI Four-Gate Transistors

Sayed, S.  Hossain, M. I.  Khan, M. Z. R. 
Abstract | Full Text: PDF (138KB) 
 
 
 
 

The Compact Modeling of Channel Potential in Sub-30-nm NAND Flash Cell String

Kang, M.  Lee, K.  Chae, D. H.  Park, B.-G.  Shin, H. 
Abstract | Full Text: PDF (384KB) 
 
 

Measurement of Source Resistance in Top-Contact Organic Thin-Film Transistors

Singh, V. K.  Agrawal, A. K.  Mazhari, B. 
Abstract | Full Text: PDF (249KB) 
 
 
 

Demystifying Surrogate Modeling for Circuits and Systems

Yelten, M.B.  Zhu, T.  Koziel, S.  Franzon, P.D.  Steer, M.B. 
Abstract | Full Text: PDF (1492KB) 
 
 
 

Teaching Memory Circuit Elements via Experiment-Based Learning

Pershin, Y.V.  Ventra, M.D. 
Abstract | Full Text: PDF (1655KB) 
 
 
 

Feb 28, 2012

Agilent Technologies Completes Acquisition of Accelicon Technologies' Solutions for Semiconductor Device Modeling

SANTA CLARA, Calif., Feb. 21, 2012
Agilent Technologies Inc. (NYSE: A) today announced that Accelicon Technologies' software solutions and technology for device-level modeling and validation in the electronics industry are now part of Agilent. The two companies had announced an acquisition agreement on Dec. 1, 2011. Financial details were not disclosed.
The acquisition, led by Agilent's EEsof EDA organization, further enhances Agilent's leadership in semiconductor device modeling. Accurate, verified device models are critical to reduce R&D design cycles as higher frequencies, smaller technology nodes, new materials and device layouts call for more accurate process design kits. As part of the Software and Modular Solutions Division, Agilent EEsof continues to integrate its industry-leading design simulation with real measurements to improve design efficiency for engineers who develop communications systems. These improved tools and processes solve the increasing complexities they face when designing communications systems for aerospace/defense and commercial wireless applications.
Agilent's newly acquired solutions from Accelicon include MBP for device-level extraction and model generation, MQA for device-level model validation and AMA for advanced model analysis, including layout effects.
Accelicon was founded in 2002 by noted industry veteran Dr. Xisheng Zhang, who has now joined Agilent along with former Accelicon CEO Tim K. Smith. The majority of the former Accelicon employees are located in Beijing; they are also now part of Agilent.

Feb 23, 2012

8th International Conference on Organic Electronics

Tarragona, Spain June 25‐27, 2012 
Organic electronics is a rapidly growing technology that is anticipated to compare with conventional microelectronics in the near future to make transistor circuits, displays and solar cells. Other application like sensors are expected. The International Conference on Organic Electronics was held from 2005 to 2008 in Eindhoven, The Netherlands. In 2009, ICOE moved to Liverpool, United Kingdom, in 2010 to Paris, in 2011 in Rome, while the 2012 edition will be held at the campus of University Rovira i Virgili (URV) in Tarragona, Spain. The conference intends to cover all aspects of organic electronics, including materials and chemistry, transistors, OLEDs, photovoltaic cells, circuits and circuit design, manufacturing and inclusion in systems. Technical areas include, but are not limited to: 
  • Materials and chemistry 
  • Transistors 
  • OLEDs Photovoltaic cells 
  • Circuits and circuit design 
  • Manufacturing and inclusion in systems 
  • Modelling 

The conference will be held in coordination with two other events, partially related to the topic: the 10th Graduate Student Meeting on Electronic Engineering (June 21-22) and the 2nd International Training Course on Compact Modelling (TCCM 2012) (June 28-29).

Feb 20, 2012

[mos-ak] Final Program MOS-AK/GSA India Workshop on March 16-18, 2012

Final Program MOS-AK/GSA India Workshop on March 16-18, 2012
============================================================
http://www.mos-ak.org/india/

* Venue:
========
Jaypee Institute of Information Technology (JIIT),
A-10, Sector-62, Noida (U.P.), India
Phone: 0120-2400973-976, 2400987
http://www.mos-ak.org/india/#Venue

* Workshop Registration Form
============================
http://inae.org/contents/Registration%20Form.pdf

* Agenda:
=========
http://www.mos-ak.org/india/
with CMOS technology and SPICE Models Tutorial by Dr. N.D. Arora,
Silterra, Malaysia

Organizing MOS-AK/GSA Committee:
================================
A.B. Bhattacharyya, Emeritus Professor, JIIT, India (Chair)
S.C. Saxena, Vice Chancellor, JIIT, Noida (Host)
Ehrenfried Seebacher, austriamicrosystems AG, Austria (Co-Chair)
Wladek Grabinski, MOS-AK (European Arrangements Co-Chair)
M.J. Zarabi, Chairman, Vice-President, Microelectronics Forum INAE New
Delhi, India
Varambally Rajamohan, ST Microelectronics, India
Shantanu Mahapatra, IISc, India
Rajamohan Varambally, ST Microelectronics, Noida, India
Kulbhushan Misri, Freescale, Noida, India
M. Jagdesh Kumar, IIT Delhi, India
Manoj Saxena, Delhi University, South Campus, New Delhi, India

Extended MOS-AK/GSA Committee:
==============================
http://www.mos-ak.org/committee.html

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2nd Training Course on Compact Modeling

Building on the success of its first edition in 2012, the 2nd Training Course on Compact Modeling (TCCM) will be held in Tarragona (Catalonia, Spain) on June 28-29 2012. It will be organized by will be organized by the NEPHOS Group, of the Department of Electronic, Electrical and Automatic Control Engineering at the Universitat Rovira i Virgili (Tarragona).. The General Chairman is Prof. Benjamin Iñiguez.

The Training Course on Compact Modeling will consist of 12 of lectures addressing relevant topics in the compact modeling of advanced electron devices. These lectures will be conducted by top experts in the field. Most of the lectures will target compact modeling issues applicable to many electron devices. In particular, emphasis will be given on MOSFETs (bulk, SOI, Multi-Gate and High Voltage MOS structures) and HEMTs.

The Training Course on Compact Modeling is an event sponsored by the FP7 “COMON” (COmpact MOdelling Network) IAPP Project (which is coordinated by the Universitat Rovira i Virgili) in collaboration with the IEEE EDS Compact Modeling Technical Committee.

The final programme will be published very soon. Registration will be cheap. It will include lunches, coffe breaks and a Gala Dinner on June 28, in a nice restaurant with TV screens to watch the Semifinals match of the Soccer European Cup ...

Besides, on June 25-27 the same group at URV will organize 8th International Conference on Organic Electronics (ICOE 2012) also in Tarragona. Participants to this Training Course will have a reduced fee for ICOE 2012.


Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula. Tarraco (its Roman name) was one of the most important cities in the Roman Empire.
On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tàrraco a World Heritage Site.

Tarragona can be easily reached from Barcelona Airport by bus and train. It is about 100 Km South from Barcelona. Besides, Reus Airport (less than 15 Km from Tarragona) receives flights from many European cities in the summer.

Tarragona can be easily reached from Barcelona Airport by bus and train. It is about 100 Km South from Barcelona. Besides, Reus Airport (less than 15 Km from Tarragona) receives flights from many European cities in the summer.

Speaking about Tarraco's climate, the famous Roman poet Virgil wrote: "The climate blends and confuses the seasons singularly, so that all the year seems an eternal spring." Thanks to its temperate climate, with an average yearly temperature of 23ºC, its clean beaches with fine and gloden sand, and its singular artistic and architectural heritage, Tarragona is one of the most important tourism hubs in Europe.

I strongly encourage all people interested in compact modeling to attend the 2nd Training Course on Compact Modeling!

8th International Conference on Organic Electronics

The 8th International Conference on Organic Electronics (ICOE 2012) will be held in Tarragona (Catalonia, Spain) on June 25-27 2012. ICOE'12 will be organized by the NEPHOS Group, of the Department of Electronic, Electrical and Automatic Control Engineering at the Universitat Rovira i Virgili (Tarragona). Prof. Benjamin Iñiguez will be the General Chairman of ICOE 2012.

The conference covers all aspects of organic electronics, including materials and chemistry, transistors (OTFTs), OLEDs, photovoltaic cells, circuits and circuit design, manufacturing and inclusion in systems.

"Modeling" is one of the topics, and of course, it includes Compact Modeling.

DEADLINE FOR A 2-PAGE ABSTRACT SUBMISSION: MARCH 1 2012.

The venue is the "Aula Magna" in one of the campuses of University Rovira i Virgili (URV) in Tarragona.


Tarragona is located in the south of Catalonia, in the northeast corner of the Iberian Peninsula. Tarraco (its Roman name) was one of the most important cities in the Roman Empire.
On 30 November 2000, the UNESCO committee officially declared the Roman archaeological complex of Tàrraco a World Heritage Site.

Tarragona can be easily reached from Barcelona Airport by bus and train. It is about 100 Km South from Barcelona. Besides, Reus Airport (less than 15 Km from Tarragona) receives flights from many European cities in the summer.

Speaking about Tarraco's climate, the famous Roman poet Virgil wrote: "The climate blends and confuses the seasons singularly, so that all the year seems an eternal spring." Thanks to its temperate climate, with an average yearly temperature of 23ºC, its clean beaches with fine and gloden sand, and its singular artistic and architectural heritage, Tarragona is one of the most important tourism hubs in Europe.

A Gala Dinner will take place in the evening of June 26. I recommend atttendees to go; there will be no match of the Soccer European Cup on that date, so you will have something to enjoy...

Besides, on June 28-29 (just after ICOE 2012), the 2nd Training Course on Compact Modeling will be held also in Tarragona, organized by the same group at the Universitat Rovira i Virgili. ICOE participants will have a reduced fee for that Training Course, which will target many topics related to compact device modeling.

I encourage researchers working on Organic Electronics, including modeling to submit abstracts to ICOE'12.

Feb 15, 2012

SMACD-2012

The International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) will be held in Seville (Spain) in September 2012 as a dedicated forum devoted to Design Methods and Tools for Analog, Mixed-signal, RF (AMS/RF) and multi-domain (MEMs, nanoelectronic, optoelectronic, biological, etc.) integrated circuits and systems.

SMACD 2012 topics of interest include, but are not limited, to:

Performance modeling
Power and thermal modeling
Reliability modeling
Variability modeling
Compact device and circuit modeling
Multi-domain modeling (optoelectronics, MEMs, biological, biochemical, etc.)
Modeling languages and applications
Linear and non-linear model reduction
Circuit and system theory and applications
Behavioral modeling and simulation
Numerical and symbolic simulation methods
Distributed and parallel circuit simulation
Analysis and simulation techniques for emerging nanoscale devices
Analysis of reliability effects: aging, electro-migration, BTI, etc.
Simulation and estimation methods of variability and yield
Fault modeling and simulation
System-level specification and simulation
Novel system-level design flows
Innovative design methodologies enabled by behavioral, performance, and/or symbolic modeling techniques
Synthesis methods in multi-domain (MEMs, electro-optical, etc.) systems
Physical synthesis
High-frequency modeling, simulation and design
Low-power design techniques
Parasitic-aware synthesis
Variability-aware and reliability-aware design methodologies
Test and design-for-test methods
Language-based synthesis techniques

Optimization methods applied to circuit and system design: high-level synthesis, structural synthesis, sizing, etc.


If you want to know more about the SMACD Conference series, click here.

Feb 14, 2012

IM3OLED project to develop multi-scale OLED modelling tool

The EU-funded IM3OLED (Integrated Multidisciplinary & Multiscale Modeling for Organic Light-Emitting Diodes) project has officially been launched.
EU-funded IM3OLED (Integrated Multidisciplinary & Multiscale Modeling for Organic Light-Emitting Diodes) project
IM3OLED aims to help the OLED industry speed up development by creating new modelling software that allows a more systematic R&D process. This software toolset will predictively model OLEDs in 3D and at all length scales – from molecular to large-area devices. It will include molecular calculations, electrical and optical simulation, 1D-3D light extraction and scaling / integration effects.
An important aspect of software will be the inclusion of dynamic feedback loops, enabling developers to accurately predict how changes in one area of OLED development affect other areas. This will allow multiple OLED properties to be optimised simultaneously.
The overall device efficiency of an OLED depends on many factors:
  • the properties of the light emitting molecules
  • deposition on to the substrate
  • integration into a device
  • extracting the light from the active layer and the device
  • heat management and more
It is further complicated as many of these factors are interlinked – e.g. how the device heats up in operation may affect the molecules’ ability to generate light and the way light travels through the device.
This makes it extremely difficult to predict how innovations in one area will affect performance in others, leading to a trial-and-error approach in R&D.
EU-funded IM3OLED (Integrated Multidisciplinary & Multiscale Modeling for Organic Light-Emitting Diodes) project
Stephan Harkema, project coordinator, said, “IM3OLED will develop, evaluate and validate a predictive multi-scale and multi-disciplinary modeling tool. Making such a tool available will accelerate progress of OLEDs for lighting applications and allow the European OLED industry to strengthen its leading position in this environmentally important, global market.”
IM3OLED brings together industrial and academic partners from across Europe and the Russian Federation and is coordinated by TNO/Holst Centre and by National Research Nuclear University MEPhI.
Industrial partners include OLED manufacturer Philips Electronics and specialist in simulation software SMEs Fluxim of Switzerland and Kintech of Russia.
Academic partners include leading computational physics and atomic / molecular modelling groups from the Zurich University of Applied Science (ZHAW) and Russian Academy of Sciences’ Photochemistry Center (PCC RAS).
Funded through the European Union’s Seventh Framework Programme (FP7NMP Grant no 295368), the EU portion of the IM3OLED project will run for 30 months until late 2013.
www.im3oled.eu www.holstcentre.com www.mephi.ru

Feb 8, 2012

[mos-ak] MOS-AK/GSA calendar 2012

The MOS-AK/GSA Compact Modeling Committee
have scheduled following four workshops in 2012
<http://www.gsaglobal.org/events/calendar.asp>.
Please mark your calendars and make plans to join us:

*Q1* MOS-AK/GSA Modeling Workshop
http://www.mos-ak.org/india/
DATE: March 16-18, 2012
LOCATION: Noida (U.P.), India

*Q2* MOS-AK/GSA Modeling Workshop
http://www.mos-ak.org/dresden/
DATE: April 26-27, 2012
LOCATION: Dresden, Germany

*Q3* MOS-AK/GSA Modeling Workshop
http://mos-ak.org/bordeaux/
DATE: Sept.21, 2012
LOCATION: Bordeaux, France

*Q4* MOS-AK/GSA Modeling Workshop
http://www.mos-ak.org/
DATE: Dec'2012
LOCATION: San Francisco, CA

Extended MOS-AK/GSA Compact Modeling Committee
http://mos-ak.org/committee.html

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IEEE EDS Webinar: Physics and Technology of Advanced Solar Cells

This email is being sent on behalf of Paul Yu, EDS President,

and Meyya Meyyappan, EDS Vice President of Educational Activities.

Dear Colleague,

As part of our commitment to enhancing the value of membership in EDS, and to advancing the society's mission of fostering the professional growth of its members, we are pleased to invite you to attend a very special Webinar entitled Physics and Technology of Advanced Solar Cells presented by EDS Distinguished Lecturer and IEEE Fellow Prof. Vikram Dalal of Iowa State University.  More info available at http://www.mrc.iastate.edu/NewStaff/VikramDalal.htm.

The webinar will take place on Tuesday, February 14 at 3:00 PM Eastern Time (USA). Register for this event

This event is the follow-up to Prof. Dalal's successful talk entitled Introduction to Physics and Technology of Solar Cells which we presented in December.

Watch Replay.

(Note, you will need your IEEE web account login to register and access the video replay)

Title: Physics and Technology of Advanced Solar Cells
Abstract: The Shockley-Queisser (SQ) limit establishes an upper bound to the conversion efficiency of a single junction solar cell. In this talk, the various approaches to overcome the SQ limit will be discussed.  Multiple junction solar cells, multi-exciton solar cells, intermediate gap solar cells, and photon up and down conversion to increase efficiency beyond the SQ limit will also be addressed.  Multi-junction approaches have succeeded in producing highly efficient III-V solar cells.

In addition, Prof. Dalal will discuss thin film solar cells.  These cells, which use polycrystalline, amorphous or organic materials with inferior electronic properties, are now beginning to be widely used for both large scale utility power and for building-integrated and isolated products.  Prof. Dalal will address the special physical considerations needed to make efficient solar cells out of these materials, including new schemes for enhancing optical absorption and discuss the status of various technologies.

Attendance will be limited to 500 attendees, offered on a first come, first served basis.  As this event is being offered exclusively
to EDS members we request that you do not forward this invitation. Also, given the overwhelming response to our previous webinar,
it would help if you could team up with other EDS members at your institution and thus save a log in port.

Sincerely,

Paul Yu,
EDS President

Meyya Meyyappan,
EDS Vice President of Educational Activities.

IEEE, 445 Hoes Lane, Piscataway, NJ 08854 USA

< http://www.ieee.org/ >

 

Feb 7, 2012

New SPICE Model for Silicon Carbide Power MOSFET

Cree Releases SPICE Model for Silicon Carbide Power MOSFET

Behavior-based model enables power electronic design engineers to quantify benefits of silicon carbide MOSFETs in board-level circuit simulation

See the original press release, or read it here:

DURHAM, N.C., February 6, 2012 — Cree, Inc. (Nasdaq: CREE), a market leader in silicon carbide (SiC) power devices, has expanded its design-in support for the industry’s first commercially-available SiC MOSFET power devices with a fully-qualified SPICE model. Using the new SPICE model, circuit designers can easily evaluate the benefits Cree’s SiC Z-FET™ MOSFETs provide for achieving a higher level of efficiency than is possible with conventional silicon power switching devices for comparably-rated devices.

SiC MOSFETs have significantly different characteristics than silicon devices and therefore require a SiC-specific model for accurate circuit simulations. Cree’s behavior-based, temperature-dependent SPICE model is compatible with the LT spice simulation program and enables power electronics design engineers to reliably simulate the advanced switching performance of Cree CMF10120D and CMF20120D Z-FETs in board-level circuit designs.

Cree SiC MOSFETs are capable of delivering switching frequencies that are up to 10 times higher than IGBT-based solutions. Their higher switching frequencies can enable smaller magnetic and capacitive elements, thereby shrinking the overall size, weight and cost of power electronics systems.

This SiC MOSFET SPICE model adds to Cree’s comprehensive suite of design-in support tools, technical documentation, and reliability information to provide power electronics engineers with the design resources necessary to implement SiC power devices into the next generation of power systems.

The Cree SiC MOSFET SPICE model is available for download at www.cree.com/power/mosfet.asp. In addition, customers can download published specifications and detailed design guidelines and request samples. For more information about Cree’s SiC power devices, please visit www.cree.com/power.

About Cree
Cree is a market-leading innovator of semiconductor products for power and radio-frequency (RF) applications, lighting-class LEDs, and LED lighting solutions.

Cree's product families include LED fixtures and bulbs, blue and green LED chips, high-brightness LEDs, lighting-class power LEDs, power-switching devices and RF devices. Cree products are driving improvements in applications such as general illumination, electronic signs and signals, power supplies and solar inverters.

For additional product and company information, please refer to www.cree.com

This press release contains forward-looking statements involving risks and uncertainties, both known and unknown, that may cause actual results to differ materially from those indicated. Actual results may differ materially due to a number of factors, including customer acceptance of our products; the rapid development of new technology and competing products that may impair demand or render Cree’s products obsolete; and other factors discussed in Cree’s filings with the Securities and Exchange Commission, including its report on Form 10-K for the year ended June 26, 2011, and subsequent filings.

Cree is a trademark registered in the U.S. Patent and Trademark Office by and Z-FET is a trademark of Cree, Inc.

Media Contact:
Michelle Murray
Cree, Inc.
Corporate Communications
(919) 313-5505
michelle_murray@cree.com

Feb 6, 2012

SISPAD 2012, Denver, CO, USA, Call for Papers


Call for Papers

The International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) provides an international forum for the presentation of the leading-edge research and development results in the area of process and device simulation. SISPAD is one of the longest-running conferences devoted to technology computer-aided design (TCAD) and advanced modeling of novel semiconductor devices and nano electronic structures.

Date and Location

  • Conference date: September 5-7, 2012
  • Abstract submission deadline: April 1, 2012
  • Conference location: Sheraton Denver Downtown Hotel, Denver, Colorado, USA
  • Webpage: http://www.ece.umd.edu/sispad2012

Topics

Original papers are solicited in the following subject areas:

  • Electronic Transport in Semiconductor Materials and Devices
  • Device Modeling and Simulation
  • Sensors, Biosensors and Electromechanical Systems Simulation
  • Process and Equipment Modeling and Simulation
  • Compact Models
  • Physical-Level Circuit Simulation
  • New Algorithms for Process and Device Modeling
  • Simulation of Nano and Quantum Devices
  • User Interfaces and Visualization
  • Simulation of Power Devices
  • Photovoltaics and Other Green Technologies

The abstract should describe the nature of the presentation, together with references. The text must be single-spaced with 11pt or 12pt font. The abstract is limited to two pages including figures, tables and references. Abstracts should be submitted in PDF format.

For more information, please visit:

http://www.ece.umd.edu/sispad2012/