Apr 18, 2016

CMC Leadership

CMC Leadership represents the industry’s top semiconductor design companies and manufacturers.

In their role, they provide overall direction and guidance to the efforts of the members and the developers involved in CMC working groups.


Chair: Dr. Peter Lee, Micron Technology


Vice-Chair: Dr. Josef Watts, GLOBALFOUNDRIES


Secretary Richard Williams, IBM


Treasurer: Takeshi Naito, Toshiba

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Apr 15, 2016

A review of electrical characterization techniques for ultrathin FDSOI materials and devices https://t.co/TCICVWiFdW #papers #feedly


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April 15, 2016 at 10:13PM
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A new approach to compact semiconductor device modelling with Qucs Verilog-A analogue module synthesis https://t.co/IsNSKkSLtL #papers


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Apr 14, 2016

Characterization and modeling of drain current local variability in 28 and 14nm FDSOI nMOSFETs https://t.co/3bOVSMHjON #papers


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[mos-ak] [press note] Spring MOS-AK Workshop @ cfaed

The MOS-AK Association held its annual spring compact modeling and Verilog-A standardization workshop at the Center for Advancing Electronics Dresden (cfaed), TU Dresden, on March 18, 2016

Published on  in MARTIN CLAUS GROUP <https://cfaed.tu-dresden.de/claus-group/news_reader/spring-mos-ak-workshop-cfaed>


More than 40 registered academic researchers and modeling engineers attended two sessions to hear 10 technical compact modeling engineering talks. This year, compact modeling of emerging technologies such as organic transistors, carbon nanotube transistors and chemical transistors were in focus with contributions from industry and academia. "The talks and discussions revealed an increasing interest of industry and system designers to evaluate the performance and applicability of emerging technologies," summarized cfaed group leader Dr.-Ing. Martin Claus, local organizer of the workshop in Dresden. He pointed out that "compact models bridge the gap between technology development and applications by providing useful insights for guiding the technology development and by enabling circuit design." MOS-AK is a dedicated forum for engineers and scientists working in that field. The MOS-AK Dresden workshop presentations are available here: http://www.mos-ak.org/dresden_2016/

The event received full sponsorship from leading industrial partners as well as technical program promotion by the cfaed, IEEE WIE Swiss Chapter, IEEE EDS German Chapter, NEEDS Nanohub as well as Europractice.

The MOS-AK Association is coordinating several upcoming modeling events focusing on the Verilog-A compact model standardization as well as open source FOSS TCAD/EDA simulation tool developments: 

Future MOS-AK workshops

IEEE EDS Mini-Colloquium on CM

  • April 9, 2016 IIT Roorkee (IN)

MIXDES Compact Modeling Session

  • June 23-25, 2016 Lodz (PL)

IEEE EDS Mini-Colloquium on GaN HEMT

  • June 22, 2016, prior MIXDES 2016 Conference

4th Training Course on CM (TCCM)

  • June 27-28, 2016 Tarragona (SP)

In the meantime, please also visit www.mos-ak.org where the discussions of all compact/SPICE modeling topics and its Verilog-A standardization will be continued.


About MOS-AK Association: The MOS-AK is a HiTech forum to discuss the frontiers of electron device modeling with emphasis on simulation-aware compact/SPICE models and its Verilog-A standardization. The MOS-AK workshops play a central role in developing a common modeling interface among foundries, CAD vendors, IC designers and model developers by contributing and promoting different elements of compact model standardization and related tools for model development, validation and its implementation and distribution.

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Special Issue #papers: Planar Fully-Depleted SOI technology https://t.co/kuUWaIigqx


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Apr 13, 2016

25th Anniversary of the World Wide Web conference - Journal of Web Semantics - Elsevier https://t.co/qAZK9S2qXJ #papers


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Apr 6, 2016

[mos-ak] [2nd Announcement and Call for Papers] Summer MOS-AK Workshop Shanghai June 26-28, 2016

 Summer MOS-AK Workshop  
 Shanghai June 26-28, 2016 
  2nd Announcement and Call for Papers  

Together with the MOS-AK Honorary Committee represented by Profs. Tzu-Yin Chiu, SMIC and Ming-Kai Tsai, MediaTek SRC/CMC Chair, MOS-AK Workshop Scientific Program Coordinators: George Ponchak, Lingling Sun, Yuhua Cheng, Larry Nagel and Andrei Vladimirescu, local workshop organizer Min Zhang, SIMTAC (Shanghai) as well as all the Extended MOS-AK TPC Committee, we have pleasure to invite to the MOS-AK Workshop which will be held at SIMTAC in Shanghai between June 26-28, 2016. Planned MOS-AK workshop is organized with aims to strengthen a network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Important Dates:
Call for Papers - March. 2016
2nd Announcement - April 2016
Final Workshop Program - May 2016
International MOS-AK Workshop:
June 26 - MOS-AK Training Course
June 27 - 1st Day Workshop
June 28 - 2nd Day Workshop

Venue:
SIMIT/SIMTAC
Shanghai (CN)

Topics to be covered include the following among other related to the compact/SPICE modeling :
  • Advances in semiconductor technologies and processing
  • Compact Modeling (CM) of the electron devices
  • Verilog-A language for CM standardization
  • New CM techniques and extraction software
  • Open Source TCAD/EDA modeling and simulation
  • CM of passive, active, sensors and actuators
  • Emerging Devices, CMOS and SOI-based memory cells
  • Microwave, RF device modeling, high voltage device modeling
  • Nanoscale CMOS devices and circuits
  • Technology R&D, DFY, DFT and reliability/ageing IC Designs
  • Foundry/Fabless Interface Strategies
Speakers: tentative list of MOS-AK Experts:
  • Franz Sischka, SisConsult, (D)
  • Mostafa Emam, Incize (B)
  • Paulius Sakalas, CEDIC, TUD, (D)
  • Thomas Gneiting AdMOS (D)
  • Wladek Grabinski, MOS-AK (EU)
  • Bertrand Ardouin, XMOD (F)
  • Zhiping Yu, Stanford University (USA)
  • Lining Zhang, HKUST (HK)
Online MOS-AK Abstract Submission:
Authors should submit an abstract using on-line MOS-AK submission:
http://www.mos-ak.org/shanghai_2016/
(any related inquiries can be sent to abstracts@mos-ak.org)

Online Workshop Registration:
http://www.mos-ak.org/shanghai_2016/
(any related inquiries can be sent to register@mos-ak.org)

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special issue of the International Journal of High Speed Electronics and Systems

Extended MOS-AK Committee

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Apr 5, 2016

MNE&MS 2016: Seminar Announcement

MNE&MS 2016
Seminar Announcement

The 8th traditional seminar “Computer simulation and design of micro-and nanoelectronics and micro-electromechanical systems” (MNE&MS 2016), organized by the Nanotechnology Center “OrelNano” and Physics Department will take place at the Orel State University after Ivan Turgenev, 29 Naugorskoe Shosse (in 212 Auditorium), Orel, Russia, on April 29th 2016 from 10am to 5pm.

The main objective of the MNE&MS 2016 is to allow regional electronics industry companies and Universities present results in research and development in micro-and nanoelectronics, power electronics, and microelectromechanical systems (MEMS) to potential customers, interested professionals, and students. Hence, the scope of seminar covers the most of Key Enabling Technologies (KETs), that is the basis for innovations in a range of products across all industrial sectors.

The Seminar also aims to introduce to Companies and Universities the latest developments in the electronics development automation (EDA), in particular in technology computer aided design (TCAD) and in compact modeling. Seminar includes session with oral presentations, poster session and an Exhibition of products of participating companies.

Selected papers will be recommended for publication in journals “Fundamental and Applied Problems of Technics and Technology” and “Information Systems and Technologies”. In addition, selected papers will be recommended for publication in proceedings of “Nanosystems, nanomaterials and nanotechnologies” of the XIV International Scientific Practical Internet – Conference “Energy and Resource Saving – XXI Century”. Information about previous regional seminars is available online.

Will be coffee breaks during seminar. In campus there is students diner and hotel (Naugorskoe Shosse 29 A). On April 30, Saturday, Organizing Committee can organize trip to the Spasskoye-Lutovinovo - State Memorial and Natural Reserve Museum of famous Russian writer Ivan Turgenev.

Our University located in South-West of Central Russia in historical town Orel (or Oryol), that was founded in 1566. Orel placed on Oka and Orlik rivers junction in 382 km from Moscow and has beautiful surroundings with number of historical landmarks.

Contact phones: +79208250040
Hotel reception phone is +7(4862)419882 or +79038816347
Official language of seminar – Russian.
There is no registration fee.
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Location: Oryol, Oryol Oblast, Russia

Apr 1, 2016

[Incize] Senior Semiconductor R&D Engineer

Incize is recruiting a senior semiconductor R&D engineer for a three-year research project. The project aims to develop an innovative semiconductor characterization technique that is of great interest for the semiconductor industry.

What Incize offers:

  • Permanent contract
  • Infinite opportunities to learn
  • Friendly and flexible environment
  • Competitive salary

What Incize requires:

  • PhD in physics, electronics or material science
  • Knowledge of semiconductor physics, microwave theory, optics and their applications
  • Experience  in  designing  and  running  experiments  in  microwave  and  optics domains
  • Experience in TCAD and ADS simulations
  • Clean-room experience is an advantage
  • Passion for research and innovation
  • 2-3 years of experience in R&D after PhD

Your Responsibilities

  • Development of a new characterization method and its theoretical background
  • Planning and execution of experiments
  • Numerical TCAD and ADS simulations
  • Literature search

How to apply
Please send your CV, a list of publications and a cover letter to info@incize.com with the subject line job_RD01_2016_lastname. References should be provided upon request.

About Incize
Incize provides characterization and modelling services for semiconductor foundries and fabless companies. It is a spin-off from Université catholique de Louvain and is based in Louvain-la-Neuve, Belgium. Visit www.incize.com to find out more.

Chemin du Cyclotron, 6
B-1348 Louvain-la-Neuve, Belgium
T: +32 10 39 22 60
F: +32 10 39 20 01


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Location: Louvain-la-Neuve, 1348 Ottignies-Louvain-la-Neuve, Belgium

Mar 31, 2016

EDA Consortium Becomes Electronic System Design Alliance https://t.co/LjaPOvr40a #papers


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Self-Criticism and the Academy https://t.co/nIwOBqP42d #papers


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Mar 30, 2016

[mos-ak] Linux developers offered free compliance and copyright training

The Linux Foundation, the organisation working on open source software initiatives, is offering developers an open source compliance course which is available for free.

Individuals interested in taking Open Source Compliance Basics for Developers may register for the course.

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As Moore's Law Ends, What's Next For #Intel Corporation? -- The Motley Fool https://t.co/l6mu52Bbua #papers


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March 30, 2016 at 10:27PM
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SEMI Pacific Northwest Breakfast Forum

SEMI is having another Pacific Northwest, half-day breakfast forum:
“The Age of Automotive Electronics."

Time: Tuesday, Apr 26, 2016, 07:30 AM to 11:30 AM
Location: Intel Corp. RA3, 2501 NW 229th Ave., Hillsboro, OR 97124

Visit the Semi site for details.
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Location: Hillsboro, OR, USA

Mar 28, 2016

Empowering stakeholders: FP7 project EU BON shares know-how on biodiversity data policies https://t.co/5Jb5p6Nn7f #papers #openinnovation


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March 28, 2016 at 01:38PM
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Isaac Newton's Recipe for Magical 'Philosopher's Stone' Rediscovered https://t.co/7Fqh2mVcmo #papers


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March 28, 2016 at 01:35PM
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Article: The Role of a Data Scientist in 2016 https://t.co/leF28oIpE9 #papers


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March 28, 2016 at 01:35PM
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Mar 27, 2016

Steep Subthreshold Switching With Nanomechanical FET Relays https://t.co/Yl7gYyKHpl #papers #feedly


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March 27, 2016 at 11:26AM
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Interconnect Design and Benchmarking for Charge-Based Beyond-CMOS Device Proposals https://t.co/SKLgeSQxIl #papers


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Mar 26, 2016

Compact Modeling of Negative $V_{t}$ Shift Disturb in NAND Flash Memories https://t.co/Bs4GUOMccM #papers #feedly


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Mar 25, 2016

[mos-ak] [online publications] Spring MOS-AK/Dresden Workshop

Recent, Spring MOS-AK Workshop at the Center for Advancing Electronics Dresden (CFAED) Technische Universität Dresden was organized to discuss SPICE/compact modeling and its Verilog-A standardization. The workshop's presentations are available online, now:
<http://www.mos-ak.org/dresden_2016>
list of presented posters is available online, too:
<http://www.mos-ak.org/dresden_2016/posters.php>

Note also, that selected, best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES). The open IJHSES call for the CM papers will be also posted within the next week.

Please distribute further information about next MOS-AK related events among all who are interested in the SPICE/compact modeling and its Verilog-A standardization:

Future MOS-AK workshops:
http://www.mos-ak.org/shanghai_2016/
http://www.mos-ak.org/lausanne_2016/
IEEE EDS Mini-Colloquium on CM
April 9, 2016 IIT Roorkee (IN) 
MIXDES CM Session 
June 23-25, 2016 Lodz (PL) 
IEEE EDS Mini-Colloquium on GaN HEMT; Lodz (PL) 
June 22, 2016, prior MIXDES 2016 Conference
4th Training Course on CM (TCCM)
June 27-28, 2016 Tarragona (SP)

-- with regards - wladek for the Extended MOS-AK TPC Committee;
--
Arbeitskreis Modellierung von Systemen und Parameterextraktion 
Modeling of Systems and Parameter Extraction Working Group
--
Over two decades of Enabling Compact Modeling R&D Exchange
--
http://www.mos-ak.org
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Compact Model of Amorphous InGaZnO TFTs Based on the Symmetric Quadrature of the Accumulation Charge https://t.co/JOZujeE4t4 #papers #feed…


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March 25, 2016 at 04:26PM
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A Comprehensive Compact Model for GaN HEMTs, Including QSState and Transient Trap-Charge Effects https://t.co/ppJacttDhQ #papers #feedly


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March 25, 2016 at 04:15PM
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Mar 23, 2016

Moore's Law stutters: Intel officially puts “tick-tock” CPU release cycle on hiatus https://t.co/dyO9ovPlEY #papers


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March 23, 2016 at 05:24PM
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Mar 22, 2016

A procedure for the extraction of a nonlinear microwave GaN FET model https://t.co/I7qkVEnOKm #papers #feedly


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Mar 18, 2016

What China’s latest five-year plan means for science https://t.co/qHVPEjGLJJ #papers #feedly


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Mar 10, 2016

[mos-ak] [Final Program] Spring MOS-AK Workshop Dresden March 18 2016

MOS-AK Workshop in DATE Conference Timeframe
Dresden, March 18 2016
The Final MOS-AK Workshop Program

Together with the MOS-AK Workshop Scientific Program Coordinators Larry Nagel and Andrei Vladimirescu, Extended MOS-AK TPC Committee as well as local organizers Martin Claus, CFAED, TU Dresden (D), Sandra Bley, CFAED, TU Dresden (D) and Alexander Petr, XFab, (D), we have pleasure to invite to the MOS-AK Workshop which will be held in Dresden on March 18, 2016. The MOS-AK workshop is organized with aims to strengthen an academic/industry network and discussion forum among experts in the field, enhance open platform for information exchange related to compact/SPICE modeling and Verilog-A standardization, bring people in the compact modeling field together, as well as obtain feedback from technology developers, circuit designers, and CAD/EDA tool developers and vendors. 

Venue:   
Center for Advancing Electronics Dresden (CFAED)
Technische Universität Dresden
Würzburger Str. 46
01187 Dresden
Germany

Free Online Workshop Registration:
<http://www.mos-ak.org/dresden_2016/registration.php>
(any related inquiries can be sent to registration@mos-ak.org)

The Workshop Agenda and its Program is available online:
<http://www.mos-ak.org/dresden_2016/>

Postworkshop Publications:
Selected best MOS-AK technical presentation will be recommended for further publication in a special compact modeling issue of the International Journal of High Speed Electronics and Systems (IJHSES)

Extended MOS-AK Committee

WG10032016

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Mar 4, 2016

Numerical Analysis of Terahertz Emissions From an Ungated HEMT Using Full-Wave Hydrodynamic Model https://t.co/CJxKRangmP #papers #feedly


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March 04, 2016 at 08:49AM
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Feb 27, 2016

Adding Spice to Your Workbench https://t.co/TI79vLiaOO #todo #feedly #papers


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February 27, 2016 at 11:41PM
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CMOS-SOI-MEMS Thermal Antenna and Sensor for Uncooled THz Imaging https://t.co/PiU56kluPf #papers #feedly


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February 27, 2016 at 11:12PM
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Electrical Characterization of FDSOI by Capacitance Measurements in Gated p-i-n Diodes https://t.co/HtDcvhqiF1 #papers #feedly #papers


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Feb 26, 2016

An Experimental Demonstration of GaN CMOS Technology https://t.co/9Q50HGFkni #papers


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February 26, 2016 at 10:57PM
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Subthreshold Kink Effect Revisited and Optimized for Si Nanowire MOSFETs https://t.co/9Q50HGFkni #papers


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February 26, 2016 at 10:50PM
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Negative Capacitance Field Effect Transistor With Hysteresis-Free Sub-60-mV/Decade Switching https://t.co/9Q50HGFkni #papers


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Feb 24, 2016

Keysight: Full SPICE Characterization Flow

Keysight Technologies offers half a daya seminar at IEMN, Villeneuve d’Ascq. This free seminar is an opportunity to discover "Full SPICE Characterization Flow". The content is open, based on practical industrial and academic examples to illustrate the features of Keysight CAD/EDA software tools:
  • Introduction (20 min)
  • Part 1 - Measurements Automatization (30 min)
  • Part 2 - Spice Model Extraction  (60 min)
  • Part 3 - Quality Assurance Model (20 mins)
  • Q/A Session (20 min)
Place: Grand Amphithéâtre de l’IEMN, Laboratoire Centrale, Avenue Henri Poincaré F-59491 Villeneuve d’Ascq (F)
Date 17 March 2016

[Register online]
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LibreCAD: Call for Your POTM Vote

The vote for April 2016 Community Choice SourceForge Project of the Month is now available, and will run until March 15, 2016 12:00 UTC. Here is one of the candidates:
LibreCAD is a fully comprehensive 2D CAD application that you can download and install for free. LibreCAD is an Open Source community-driven project: development is open to new talent and new ideas, and our software is tested and used daily by a large and devoted user community; you, too, can get involved and influence its future development. LibreCAD has GPLv2 public license – you can use it, customize it, hack it and copy it with free user support and developer support from our active worldwide community and our experienced developer team. There is a large base of satisfied LibreCAD users worldwide, and it is available in more than 20 languages and for all major operating systems, including Microsoft Windows, Mac OS X and Linux, including Debian, Ubuntu, Fedora, Mandriva, Suse, etc. 

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Feb 22, 2016

Alliance: FOSS VLSI/CAD System



Alliance is a complete set of free cad tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools. A complete set of portable CMOS libraries is provided. Alliance is the result of a twelve year effort spent at SoC department of LIP6 laboratory of the Pierre & Marie Curie University (Paris VI, France). Alliance has been used for research projects such as the 875 000 transistors StaCS superscalar microprocessor and 400 000 transistors IEEE Gigabit HSL Router.

Alliance VLSI CAD System is free software. Binaries, source code and cells libraries are freely available under the GNU General Public License (GPL). You are welcome to use the software package even for commercial designs without any fee. You are kindly requested to mention: "Designed with Alliance © LIP6, Université Pierre et Marie Curie".

ICs Designed with Alliance
  • Smartlabs/Smarthome designed a complete circuit in the XFAB XH035 technology (2014).
  • Tokai University (Shimizu Lab) designed the SNX, a 16 bits processor in the ROHM 0.18µm (2010).
Useful Links
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Location: Paris, France
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